/[gxemul]/trunk/src/cpus/bintrans_alpha.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 21 by dpavlin, Mon Oct 8 16:18:51 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2004-2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2004-2006  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: bintrans_alpha.c,v 1.1 2005/08/29 14:36:41 debug Exp $   *  $Id: bintrans_alpha.c,v 1.4 2006/02/09 22:40:26 debug Exp $
29   *   *
30   *  Alpha specific code for dynamic binary translation.   *  Alpha specific code for dynamic binary translation.
31   *   *
# Line 122  unsigned char bintrans_alpha_imb[32] = { Line 122  unsigned char bintrans_alpha_imb[32] = {
122          0x86, 0x00, 0x00, 0x00,         /*  imb   */          0x86, 0x00, 0x00, 0x00,         /*  imb   */
123          0x01, 0x80, 0xfa, 0x6b,         /*  ret   */          0x01, 0x80, 0xfa, 0x6b,         /*  ret   */
124          0x1f, 0x04, 0xff, 0x47,         /*  nop   */          0x1f, 0x04, 0xff, 0x47,         /*  nop   */
125          0x00, 0x00, 0xfe, 0x2e,         /*  unop  */          0x00, 0x00, 0xfe, 0x2f,         /*  unop  */
126          0x1f, 0x04, 0xff, 0x47,         /*  nop   */          0x1f, 0x04, 0xff, 0x47,         /*  nop   */
127          0x00, 0x00, 0xfe, 0x2e,         /*  unop  */          0x00, 0x00, 0xfe, 0x2f,         /*  unop  */
128          0x1f, 0x04, 0xff, 0x47,         /*  nop   */          0x1f, 0x04, 0xff, 0x47,         /*  nop   */
129          0x00, 0x00, 0xfe, 0x2e          /*  unop  */          0x00, 0x00, 0xfe, 0x2f          /*  unop  */
130  };  };
131    
132    
# Line 170  static void bintrans_host_cacheinvalidat Line 170  static void bintrans_host_cacheinvalidat
170  #define ofs_c0  ((size_t)&dummy_vth32_table.bintrans_chunks[0] - (size_t)&dummy_vth32_table)  #define ofs_c0  ((size_t)&dummy_vth32_table.bintrans_chunks[0] - (size_t)&dummy_vth32_table)
171  #define ofs_cb (((size_t)&dummy_cpu.cd.mips.chunk_base_address) - (size_t)&dummy_cpu)  #define ofs_cb (((size_t)&dummy_cpu.cd.mips.chunk_base_address) - (size_t)&dummy_cpu)
172    
173  #define ofs_h_l (((size_t)&dummy_cpu.cd.mips.host_load) - ((size_t)&dummy_cpu))  #define ofs_h_l (((size_t)&dummy_cpu.cd.mips.host_OLD_load) - ((size_t)&dummy_cpu))
174  #define ofs_h_s (((size_t)&dummy_cpu.cd.mips.host_store) - ((size_t)&dummy_cpu))  #define ofs_h_s (((size_t)&dummy_cpu.cd.mips.host_OLD_store) - ((size_t)&dummy_cpu))
175    
176    
177  static uint32_t bintrans_alpha_load_32bit[18] = {  static uint32_t bintrans_alpha_load_32bit[18] = {
# Line 179  static uint32_t bintrans_alpha_load_32bi Line 179  static uint32_t bintrans_alpha_load_32bi
179          0x209f0fff,     /*  lda     t3,4095                             */          0x209f0fff,     /*  lda     t3,4095                             */
180          0x48419682,     /*  srl     t1,0xc,t1   t1 = addr >> 12         */          0x48419682,     /*  srl     t1,0xc,t1   t1 = addr >> 12         */
181          0x46240004,     /*  and     a1,t3,t3    t3 = addr & 4095        */          0x46240004,     /*  and     a1,t3,t3    t3 = addr & 4095        */
182          0x40580642,     /*  s8addq  t1,t10,t1   &host_load[t1]          */          0x40580642,     /*  s8addq  t1,t10,t1   &host_OLD_load[t1]      */
183          0xa6620000,     /*  ldq     a3,0(t1)    a3 = host_load[t1]      */          0xa6620000,     /*  ldq     a3,0(t1)    a3 = host_OLD_load[t1]  */
184    
185          /*  NULL? Then return failure at once.  */          /*  NULL? Then return failure at once.  */
186          0xe6600002,     /*  beq a3, return  */          0xe6600002,     /*  beq a3, return  */
# Line 201  static uint32_t bintrans_alpha_store_32b Line 201  static uint32_t bintrans_alpha_store_32b
201          0x209f0fff,     /*  lda     t3,4095                             */          0x209f0fff,     /*  lda     t3,4095                             */
202          0x48419682,     /*  srl     t1,0xc,t1   t1 = addr >> 12         */          0x48419682,     /*  srl     t1,0xc,t1   t1 = addr >> 12         */
203          0x46240004,     /*  and     a1,t3,t3    t3 = addr & 4095        */          0x46240004,     /*  and     a1,t3,t3    t3 = addr & 4095        */
204          0x404f0642,     /*  s8addq  t1,s6,t1    &host_store[t1]         */          0x404f0642,     /*  s8addq  t1,s6,t1    &host_OLD_store[t1]     */
205          0xa6620000,     /*  ldq     a3,0(t1)    a3 = host_store[t1]     */          0xa6620000,     /*  ldq     a3,0(t1)    a3 = host_OLD_store[t1] */
206    
207          /*  NULL? Then return failure at once.  */          /*  NULL? Then return failure at once.  */
208          /*  beq a3, return  */          /*  beq a3, return  */
# Line 2520  static int bintrans_write_instruction__t Line 2520  static int bintrans_write_instruction__t
2520  /*  /*
2521   *  bintrans_backend_init():   *  bintrans_backend_init():
2522   *   *
2523   *  This is neccessary for broken 2.95.4 compilers on FreeBSD/Alpha 4.9,   *  This is necessary for broken 2.95.4 compilers on FreeBSD/Alpha 4.9, and
2524   *  and probably a few others. (For Compaq's CC, and for gcc 3.x, this   *  probably a few others. (For Compaq's CC, and for gcc 3.x, this wouldn't be
2525   *  wouldn't be neccessary, and the old code would have worked.)   *  needed; the old code would have worked.)
2526   */   */
2527  static void bintrans_backend_init(void)  static void bintrans_backend_init(void)
2528  {  {
# Line 2568  static void bintrans_backend_init(void) Line 2568  static void bintrans_backend_init(void)
2568          *p++ = 0xa5900000 | ofs_ra;     /*  ldq     s3,"gpr[ra]"(a0)  */          *p++ = 0xa5900000 | ofs_ra;     /*  ldq     s3,"gpr[ra]"(a0)  */
2569          *p++ = 0xa5b00000 | ofs_t0;     /*  ldq     s4,"gpr[t0]"(a0)  */          *p++ = 0xa5b00000 | ofs_t0;     /*  ldq     s4,"gpr[t0]"(a0)  */
2570          *p++ = 0xa5d00000 | ofs_t1;     /*  ldq     s5,"gpr[t1]"(a0)  */          *p++ = 0xa5d00000 | ofs_t1;     /*  ldq     s5,"gpr[t1]"(a0)  */
2571          *p++ = 0xa5f00000 | ofs_h_s;    /*  ldq     s6,host_store(a0)  */          *p++ = 0xa5f00000 | ofs_h_s;    /*  ldq     s6,host_OLD_store(a0)  */
2572          *p++ = 0xa7100000 | ofs_h_l;    /*  ldq     t10,host_load(a0)  */          *p++ = 0xa7100000 | ofs_h_l;    /*  ldq     t10,host_OLD_load(a0)  */
2573          *p++ = 0xa7300000 | ofs_v0;     /*  ldq     t11,"gpr[v0]"(a0)  */          *p++ = 0xa7300000 | ofs_v0;     /*  ldq     t11,"gpr[v0]"(a0)  */
2574    
2575          *p++ = 0x6b514000;              /*  jsr     ra,(a1),<back>  */          *p++ = 0x6b514000;              /*  jsr     ra,(a1),<back>  */

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