1 |
dpavlin |
22 |
/* |
2 |
|
|
* Copyright (C) 2005 Anders Gavare. All rights reserved. |
3 |
|
|
* |
4 |
|
|
* Redistribution and use in source and binary forms, with or without |
5 |
|
|
* modification, are permitted provided that the following conditions are met: |
6 |
|
|
* |
7 |
|
|
* 1. Redistributions of source code must retain the above copyright |
8 |
|
|
* notice, this list of conditions and the following disclaimer. |
9 |
|
|
* 2. Redistributions in binary form must reproduce the above copyright |
10 |
|
|
* notice, this list of conditions and the following disclaimer in the |
11 |
|
|
* documentation and/or other materials provided with the distribution. |
12 |
|
|
* 3. The name of the author may not be used to endorse or promote products |
13 |
|
|
* derived from this software without specific prior written permission. |
14 |
|
|
* |
15 |
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
16 |
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
17 |
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
18 |
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
19 |
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
20 |
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
21 |
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
22 |
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
23 |
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
24 |
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
25 |
|
|
* SUCH DAMAGE. |
26 |
|
|
* |
27 |
|
|
* |
28 |
|
|
* $Id: backend_alpha.c,v 1.2 2005/12/16 21:44:42 debug Exp $ |
29 |
|
|
* |
30 |
|
|
* Dyntrans backend for Alpha hosts. |
31 |
|
|
* |
32 |
|
|
* |
33 |
|
|
* Registers are currently allocated as follows: |
34 |
|
|
* |
35 |
|
|
* s0 = saved copy of original a0 (struct cpu *) |
36 |
|
|
* s1 = saved copy of original t12 (ptr to the function itself) |
37 |
|
|
*/ |
38 |
|
|
|
39 |
|
|
#include <stdio.h> |
40 |
|
|
#include <stdlib.h> |
41 |
|
|
#include <string.h> |
42 |
|
|
|
43 |
|
|
#include "cpu.h" |
44 |
|
|
#include "misc.h" |
45 |
|
|
|
46 |
|
|
#define ALPHA_T0 1 |
47 |
|
|
#define ALPHA_T1 2 |
48 |
|
|
#define ALPHA_T2 3 |
49 |
|
|
#define ALPHA_T3 4 |
50 |
|
|
#define ALPHA_T4 5 |
51 |
|
|
#define ALPHA_T5 6 |
52 |
|
|
#define ALPHA_T6 7 |
53 |
|
|
#define ALPHA_T7 8 |
54 |
|
|
#define ALPHA_S0 9 |
55 |
|
|
#define ALPHA_S1 10 |
56 |
|
|
#define ALPHA_S2 11 |
57 |
|
|
#define ALPHA_S3 12 |
58 |
|
|
#define ALPHA_S4 13 |
59 |
|
|
#define ALPHA_S5 14 |
60 |
|
|
#define ALPHA_S6 15 |
61 |
|
|
#define ALPHA_A0 16 |
62 |
|
|
#define ALPHA_A1 17 |
63 |
|
|
#define ALPHA_A2 18 |
64 |
|
|
#define ALPHA_A3 19 |
65 |
|
|
#define ALPHA_A4 20 |
66 |
|
|
#define ALPHA_A5 21 |
67 |
|
|
#define ALPHA_T8 22 |
68 |
|
|
#define ALPHA_T9 23 |
69 |
|
|
#define ALPHA_T10 24 |
70 |
|
|
#define ALPHA_T11 25 |
71 |
|
|
#define ALPHA_RA 26 |
72 |
|
|
#define ALPHA_T12 27 |
73 |
|
|
#define ALPHA_ZERO 31 |
74 |
|
|
|
75 |
|
|
|
76 |
|
|
uint32_t alpha_imb[8] = { |
77 |
|
|
0x00000086, /* imb */ |
78 |
|
|
0x6bfa8001, /* ret */ |
79 |
|
|
0x47ff041f, /* nop */ |
80 |
|
|
0x2ffe0000, /* unop */ |
81 |
|
|
0x47ff041f, /* nop */ |
82 |
|
|
0x2ffe0000, /* unop */ |
83 |
|
|
0x47ff041f, /* nop */ |
84 |
|
|
0x2ffe0000 /* unop */ |
85 |
|
|
}; |
86 |
|
|
|
87 |
|
|
|
88 |
|
|
/* |
89 |
|
|
* dtb_host_cacheinvalidate(): |
90 |
|
|
* |
91 |
|
|
* Invalidate the host's instruction cache. On Alpha, this is done by |
92 |
|
|
* executing an imb instruction. (This invalidates everything, there is no way |
93 |
|
|
* to specify which parts of the cache to affect.) |
94 |
|
|
* |
95 |
|
|
* NOTE: A simple asm("imb"); would be enough here, but not all compilers |
96 |
|
|
* have such simple constructs, so an entire function has to be written as |
97 |
|
|
* alpha_imb[] above. |
98 |
|
|
*/ |
99 |
|
|
void dtb_host_cacheinvalidate(void *p, size_t len) |
100 |
|
|
{ |
101 |
|
|
/* Long form of ``asm("imb");'' */ |
102 |
|
|
void (*f)(void) = (void *)&alpha_imb[0]; |
103 |
|
|
f(); |
104 |
|
|
} |
105 |
|
|
|
106 |
|
|
|
107 |
|
|
/* |
108 |
|
|
* dtb_function_prologue(): |
109 |
|
|
* |
110 |
|
|
* Incoming register values: |
111 |
|
|
* a0 = struct cpu *cpu; |
112 |
|
|
* a1 = struct xxx_instr_call *ic; |
113 |
|
|
* t12 = pointer to the function start itself |
114 |
|
|
* |
115 |
|
|
* The prologue code does the following: |
116 |
|
|
* 1) Save ra, s0, and s1 onto the stack. |
117 |
|
|
* 1) s0 = a0, s1 = t12 (save the incoming args for later use) |
118 |
|
|
*/ |
119 |
|
|
uint32_t alpha_prologue[6] = { |
120 |
|
|
0x23deffe0, /* lda sp,-32(sp) */ |
121 |
|
|
0xb75e0000, /* stq ra,0(sp) */ |
122 |
|
|
0xb53e0008, /* stq s0,8(sp) */ |
123 |
|
|
0xb55e0010, /* stq s1,16(sp) */ |
124 |
|
|
0x40001400 | (ALPHA_A0 << 21) | ALPHA_S0, |
125 |
|
|
0x40001400 | (ALPHA_T12 << 21) | ALPHA_S1 |
126 |
|
|
}; |
127 |
|
|
int dtb_function_prologue(struct translation_context *ctx, size_t *sizep) |
128 |
|
|
{ |
129 |
|
|
memcpy((uint32_t *)ctx->p, alpha_prologue, sizeof(alpha_prologue)); |
130 |
|
|
*sizep = sizeof(alpha_prologue); |
131 |
|
|
return 1; |
132 |
|
|
} |
133 |
|
|
|
134 |
|
|
|
135 |
|
|
/* |
136 |
|
|
* dtb_function_epilogue(): |
137 |
|
|
* |
138 |
|
|
* The epilogue code does the following: |
139 |
|
|
* 1) Load ra, s0, and s1 from the stack. |
140 |
|
|
* 2) Return. |
141 |
|
|
*/ |
142 |
|
|
int dtb_function_epilogue(struct translation_context *ctx, size_t *sizep) |
143 |
|
|
{ |
144 |
|
|
uint32_t *q = (uint32_t *) ctx->p; |
145 |
|
|
|
146 |
|
|
*q++ = 0xa75e0000; /* ldq ra,0(sp) */ |
147 |
|
|
*q++ = 0xa53e0008; /* lda s0,8(sp) */ |
148 |
|
|
*q++ = 0xa55e0010; /* lda s1,16(sp) */ |
149 |
|
|
*q++ = 0x23de0020; /* lda sp,32(sp) */ |
150 |
|
|
|
151 |
|
|
*q++ = 0x6bfa8001; /* ret */ |
152 |
|
|
if ((((size_t)q) & 0x7) == 4) |
153 |
|
|
*q++ = 0x2ffe0000; /* unop */ |
154 |
|
|
if ((((size_t)q) & 0xf) == 8) { |
155 |
|
|
*q++ = 0x47ff041f; /* nop */ |
156 |
|
|
if ((((size_t)q) & 0x7) == 4) |
157 |
|
|
*q++ = 0x2ffe0000; /* unop */ |
158 |
|
|
} |
159 |
|
|
|
160 |
|
|
*sizep = ((size_t)q - (size_t)ctx->p); |
161 |
|
|
return 1; |
162 |
|
|
} |
163 |
|
|
|
164 |
|
|
|
165 |
|
|
/* |
166 |
|
|
* dtb_generate_fcall(): |
167 |
|
|
* |
168 |
|
|
* Generates a function call (to a C function). |
169 |
|
|
* |
170 |
|
|
* (a0 already contains the cpu pointer) |
171 |
|
|
* ldq t12,ofs_a(s1) Get the function address and |
172 |
|
|
* ldq a1,ofs_b(s1) the xxx_instr_call pointer. |
173 |
|
|
* jsr ra,(t12),<nextinstr> Call the function! |
174 |
|
|
* mov s0,a0 Restore a0. |
175 |
|
|
*/ |
176 |
|
|
int dtb_generate_fcall(struct cpu *cpu, struct translation_context *ctx, |
177 |
|
|
size_t *sizep, size_t f, size_t instr_call_ptr) |
178 |
|
|
{ |
179 |
|
|
uint32_t *q = (uint32_t *) ctx->p; |
180 |
|
|
|
181 |
|
|
cpu_dtb_add_fixup(cpu, 0, q, f); |
182 |
|
|
*q++ = 0xa76a0000; /* ldq t12,ofs(s1) */ |
183 |
|
|
|
184 |
|
|
cpu_dtb_add_fixup(cpu, 0, q, instr_call_ptr); |
185 |
|
|
*q++ = 0xa62a0000; /* ldq a1,ofs(s1) */ |
186 |
|
|
|
187 |
|
|
*q++ = 0x6b5b4000; /* jsr ra,(t12),nextinstr */ |
188 |
|
|
*q++ = 0x47e90410; /* mov s0,a0 */ |
189 |
|
|
|
190 |
|
|
*sizep = ((size_t)q - (size_t)ctx->p); |
191 |
|
|
return 1; |
192 |
|
|
} |
193 |
|
|
|
194 |
|
|
|
195 |
|
|
/* |
196 |
|
|
* dtb_generate_ptr_inc(): |
197 |
|
|
* |
198 |
|
|
* Generates an increment of a pointer (for example cpu->cd.XXX.next_ic). |
199 |
|
|
* |
200 |
|
|
* NOTE: The syntax for calling this function is something like: |
201 |
|
|
* |
202 |
|
|
* dtb_generate_ptr_inc(cpu, &cpu->translation_context, |
203 |
|
|
* &cpu->cd.arm.next_ic); |
204 |
|
|
*/ |
205 |
|
|
int dtb_generate_ptr_inc(struct cpu *cpu, struct translation_context *ctx, |
206 |
|
|
size_t *sizep, void *ptr, int amount) |
207 |
|
|
{ |
208 |
|
|
uint32_t *q = (uint32_t *) ctx->p; |
209 |
|
|
ssize_t ofs = (size_t)ptr - (size_t)(void *)cpu; |
210 |
|
|
|
211 |
|
|
if (ofs < 0 || ofs > 0x7fff) { |
212 |
|
|
fatal("dtb_generate_ptr_inc(): Huh? ofs=%p\n", (void *)ofs); |
213 |
|
|
exit(1); |
214 |
|
|
} |
215 |
|
|
|
216 |
|
|
*q++ = 0xa4500000 | ofs; /* ldq t1, ofs(a0) */ |
217 |
|
|
*q++ = 0x20420000 | amount; /* lda t1, amount(t1) */ |
218 |
|
|
*q++ = 0xb4500000 | ofs; /* stq t1, ofs(a0) */ |
219 |
|
|
|
220 |
|
|
*sizep = ((size_t)q - (size_t)ctx->p); |
221 |
|
|
return 1; |
222 |
|
|
} |
223 |
|
|
|
224 |
|
|
|