/[gxemul]/trunk/src/cpus/Makefile.skel
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Contents of /trunk/src/cpus/Makefile.skel

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Revision 42 - (show annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File size: 6784 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============


1 #
2 # $Id: Makefile.skel,v 1.37 2007/05/26 04:07:05 debug Exp $
3 #
4 # Makefile for GXemul src/cpus
5 #
6
7 CFLAGS=$(CWARNINGS) $(COPTIM) $(XINCLUDE) $(DINCLUDE)
8
9 OBJS=$(CPU_ARCHS) $(CPU_BACKENDS)
10 TOOLS=generate_head generate_tail $(CPU_TOOLS)
11
12
13 all: $(TOOLS)
14 $(MAKE) buildobjs
15
16
17 buildobjs: $(OBJS)
18
19
20 $(OBJS): Makefile
21
22
23
24 ###############################################################################
25
26 cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c ../memory_rw.c \
27 tmp_alpha_head.c tmp_alpha_tail.c
28
29 cpu_alpha_instr.c: cpu_alpha_instr_alu.c tmp_alpha_misc.c
30
31 tmp_alpha_misc.c: cpu_alpha_instr_loadstore.c generate_alpha_misc
32 ./generate_alpha_misc > tmp_alpha_misc.c
33
34 tmp_alpha_head.c: generate_head
35 ./generate_head alpha Alpha > tmp_alpha_head.c
36
37 tmp_alpha_tail.c: generate_tail
38 ./generate_tail alpha Alpha > tmp_alpha_tail.c
39
40
41 ###############################################################################
42
43 cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c ../memory_rw.c \
44 tmp_arm_head.c tmp_arm_tail.c
45
46 cpu_arm_instr.c: cpu_arm_instr_misc.c
47
48 generate_arm_loadstore: generate_arm_loadstore.c
49 $(CC) generate_arm_loadstore.c -o generate_arm_loadstore
50 tmp_arm_loadstore.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
51 ./generate_arm_loadstore > tmp_arm_loadstore.c
52 tmp_arm_loadstore_p0_u0_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
53 ./generate_arm_loadstore 0 0 0 > tmp_arm_loadstore_p0_u0_w0.c
54 tmp_arm_loadstore_p0_u0_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
55 ./generate_arm_loadstore 0 0 1 > tmp_arm_loadstore_p0_u0_w1.c
56 tmp_arm_loadstore_p0_u1_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
57 ./generate_arm_loadstore 0 1 0 > tmp_arm_loadstore_p0_u1_w0.c
58 tmp_arm_loadstore_p0_u1_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
59 ./generate_arm_loadstore 0 1 1 > tmp_arm_loadstore_p0_u1_w1.c
60 tmp_arm_loadstore_p1_u0_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
61 ./generate_arm_loadstore 1 0 0 > tmp_arm_loadstore_p1_u0_w0.c
62 tmp_arm_loadstore_p1_u0_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
63 ./generate_arm_loadstore 1 0 1 > tmp_arm_loadstore_p1_u0_w1.c
64 tmp_arm_loadstore_p1_u1_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
65 ./generate_arm_loadstore 1 1 0 > tmp_arm_loadstore_p1_u1_w0.c
66 tmp_arm_loadstore_p1_u1_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
67 ./generate_arm_loadstore 1 1 1 > tmp_arm_loadstore_p1_u1_w1.c
68
69 tmp_arm_multi.c: generate_arm_multi cpu_arm_multi.txt
70 ./generate_arm_multi `cat cpu_arm_multi.txt` > tmp_arm_multi.c
71
72 tmp_arm_dpi.c: cpu_arm_instr_dpi.c generate_arm_dpi
73 ./generate_arm_dpi > tmp_arm_dpi.c
74
75 tmp_arm_r0.c: generate_arm_r
76 ./generate_arm_r 0x000 0x0ff > tmp_arm_r0.c
77 tmp_arm_r1.c: generate_arm_r
78 ./generate_arm_r 0x100 0x1ff > tmp_arm_r1.c
79 tmp_arm_r2.c: generate_arm_r
80 ./generate_arm_r 0x200 0x2ff > tmp_arm_r2.c
81 tmp_arm_r3.c: generate_arm_r
82 ./generate_arm_r 0x300 0x3ff > tmp_arm_r3.c
83 tmp_arm_r4.c: generate_arm_r
84 ./generate_arm_r 0x400 0x4ff > tmp_arm_r4.c
85 tmp_arm_r5.c: generate_arm_r
86 ./generate_arm_r 0x500 0x5ff > tmp_arm_r5.c
87 tmp_arm_r6.c: generate_arm_r
88 ./generate_arm_r 0x600 0x6ff > tmp_arm_r6.c
89 tmp_arm_r7.c: generate_arm_r
90 ./generate_arm_r 0x700 0x7ff > tmp_arm_r7.c
91 tmp_arm_r8.c: generate_arm_r
92 ./generate_arm_r 0x800 0x8ff > tmp_arm_r8.c
93 tmp_arm_r9.c: generate_arm_r
94 ./generate_arm_r 0x900 0x9ff > tmp_arm_r9.c
95 tmp_arm_ra.c: generate_arm_r
96 ./generate_arm_r 0xa00 0xaff > tmp_arm_ra.c
97 tmp_arm_rb.c: generate_arm_r
98 ./generate_arm_r 0xb00 0xbff > tmp_arm_rb.c
99 tmp_arm_rc.c: generate_arm_r
100 ./generate_arm_r 0xc00 0xcff > tmp_arm_rc.c
101 tmp_arm_rd.c: generate_arm_r
102 ./generate_arm_r 0xd00 0xdff > tmp_arm_rd.c
103 tmp_arm_re.c: generate_arm_r
104 ./generate_arm_r 0xe00 0xeff > tmp_arm_re.c
105 tmp_arm_rf.c: generate_arm_r
106 ./generate_arm_r 0xf00 0xfff > tmp_arm_rf.c
107
108 tmp_arm_r.c: generate_arm_r
109 ./generate_arm_r 0 0 > tmp_arm_r.c
110
111 tmp_arm_head.c: generate_head
112 ./generate_head arm ARM > tmp_arm_head.c
113
114 tmp_arm_tail.c: generate_tail
115 ./generate_tail arm ARM > tmp_arm_tail.c
116
117
118 ###############################################################################
119
120 cpu_m88k.o: cpu_m88k.c cpu_m88k_instr.c cpu_dyntrans.c ../memory_rw.c \
121 tmp_m88k_loadstore.c tmp_m88k_head.c tmp_m88k_tail.c tmp_m88k_bcnd.c
122
123 tmp_m88k_bcnd.c: generate_m88k_bcnd
124 ./generate_m88k_bcnd > tmp_m88k_bcnd.c
125
126 tmp_m88k_loadstore.c: cpu_m88k_instr_loadstore.c generate_m88k_loadstore
127 ./generate_m88k_loadstore > tmp_m88k_loadstore.c
128
129 tmp_m88k_head.c: generate_head
130 ./generate_head m88k M88K > tmp_m88k_head.c
131
132 tmp_m88k_tail.c: generate_tail
133 ./generate_tail m88k M88K > tmp_m88k_tail.c
134
135
136 ###############################################################################
137
138 cpu_mips.o: cpu_mips.c cpu_dyntrans.c memory_mips.c \
139 cpu_mips_instr.c tmp_mips_loadstore.c tmp_mips_loadstore_multi.c \
140 tmp_mips_head.c tmp_mips_tail.c
141
142 memory_mips.c: ../memory_rw.c memory_mips_v2p.c
143
144 tmp_mips_loadstore.c: cpu_mips_instr_loadstore.c generate_mips_loadstore
145 ./generate_mips_loadstore > tmp_mips_loadstore.c
146
147 tmp_mips_loadstore_multi.c: generate_mips_loadstore_multi
148 ./generate_mips_loadstore_multi > tmp_mips_loadstore_multi.c
149
150 tmp_mips_head.c: generate_head
151 ./generate_head mips MIPS > tmp_mips_head.c
152
153 tmp_mips_tail.c: generate_tail
154 ./generate_tail mips MIPS > tmp_mips_tail.c
155
156
157 ###############################################################################
158
159 cpu_ppc.o: cpu_ppc.c cpu_ppc_instr.c cpu_dyntrans.c memory_ppc.c \
160 ../memory_rw.c tmp_ppc_head.c tmp_ppc_tail.c tmp_ppc_loadstore.c
161
162 tmp_ppc_loadstore.c: cpu_ppc_instr_loadstore.c generate_ppc_loadstore
163 ./generate_ppc_loadstore > tmp_ppc_loadstore.c
164
165 tmp_ppc_head.c: generate_head
166 ./generate_head ppc PPC > tmp_ppc_head.c
167
168 tmp_ppc_tail.c: generate_tail
169 ./generate_tail ppc PPC > tmp_ppc_tail.c
170
171
172 ###############################################################################
173
174 cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c ../memory_rw.c \
175 tmp_sh_head.c tmp_sh_tail.c
176
177 tmp_sh_head.c: generate_head
178 ./generate_head sh SH > tmp_sh_head.c
179
180 tmp_sh_tail.c: generate_tail
181 ./generate_tail sh SH > tmp_sh_tail.c
182
183
184 ###############################################################################
185
186 cpu_sparc.o: cpu_sparc.c cpu_sparc_instr.c cpu_dyntrans.c ../memory_rw.c \
187 tmp_sparc_head.c tmp_sparc_tail.c tmp_sparc_loadstore.c
188
189 tmp_sparc_loadstore.c: cpu_sparc_instr_loadstore.c generate_sparc_loadstore
190 ./generate_sparc_loadstore > tmp_sparc_loadstore.c
191
192 tmp_sparc_head.c: generate_head
193 ./generate_head sparc SPARC > tmp_sparc_head.c
194
195 tmp_sparc_tail.c: generate_tail
196 ./generate_tail sparc SPARC > tmp_sparc_tail.c
197
198
199 ###############################################################################
200
201 clean:
202 rm -f $(OBJS) $(TOOLS) *core tmp_*.c *.gmon experiment_arm_multi
203
204 clean_all: clean
205 rm -f Makefile
206

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