/[gxemul]/trunk/src/cpus/Makefile.skel
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/cpus/Makefile.skel

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Revision 40 - (show annotations)
Mon Oct 8 16:22:11 2007 UTC (16 years, 6 months ago) by dpavlin
File size: 5632 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1539 2007/05/01 04:03:51 debug Exp $
20070415	Landisk PCLOCK should be 33.33 MHz, not 50 MHz. (This makes
		the clock run at correct speed.)
		FINALLY found and fixed the bug which caused OpenBSD/landisk
		to randomly bug out: an &-sign was missing in the special case
		handling of FPSCR in the 'LDS.L @Rm+,FPSCR' instruction.
		Adding similar special case handling for 'LDC.L @Rm+,SR'
		(calling sh_update_sr() instead of just loading).
		Implementing the 'FCNVSD FPUL,DRn' and 'FCNVDS DRm,FPUL'
		SuperH instructions.
		The 'LDC Rm,SR' instruction now immediately breaks out of the
		dyntrans loop if an interrupt is to be triggered.
20070416	In memory_rw.c, if mapping a page as writable, make sure to
		invalidate code translations even if the data access was a
		read.
		Minor SuperH updates.
20070418	Removing the dummy M68K emulation mode.
		Minor SH update (turning unnecessary sts_mach_rn, sts_macl_rn,
		and sts_pr_rn instruction handlers into mov_rm_rn).
20070419	Beginning to add a skeleton for an M88K mode: Adding a hack to
		allow OpenBSD/m88k a.out binaries to be loaded, and disassembly
		of a few simple 88K instructions.
		Commenting out the 'LDC Rm,SR' fix from a few days ago, because
		it made Linux/dreamcast bug out.
		Adding a hack to dev_sh4.c (an extra translation cache
		invalidation), which allows OpenBSD/landisk to boot ok after
		an install. Upgrading the Landisk machine mode to stable,
		updating documentation, etc.
20070420	Experimenting with adding a PCI controller (pcic) to dev_sh4.
		Adding a dummy Realtek 8139C+ skeleton device (dev_rtl8139c).
		Implementing the first M88K instructions (br, or[.u] imm), and
		adding disassembly of some more instructions.
20070421	Continuing a little on dev_rtl8139c.
20070422	Implementing the 9346 EEPROM "read" command for dev_rtl8139c.
		Finally found and fixed an old bug in the log n symbol search
		(it sometimes missed symbols). Debug trace (-i, -t etc) should
		now show more symbols. :-)
20070423	Continuing a little on M88K disassembly.
20070428	Fixing a memset arg order bug in src/net/net.c (thanks to
		Nigel Horne for noticing the bug).
		Applying parts of a patch from Carl van Schaik to clear out
		bottom bits of MIPS addresses more correctly, when using large
		page sizes, and doing some other minor cleanup/refactoring.
		Fixing a couple of warnings given by gcc with the -W option (a
		few more warnings than just plain -Wall).
		Reducing SuperH dyntrans physical address space from 64-bit to
		32-bit (since SH5/SH64 isn't imlemented yet anyway).
		Adding address-to-symbol annotation to a few more instructions
		in the SuperH instruction trace output.
		Beginning regression testing for the next release.
		Reverting the value of SCIF_DELAYED_TX_VALUE from 1 to 2,
		because OpenBSD/landisk may otherwise hang randomly.
20070429	The ugly hack/workaround to get OpenBSD/landisk booting without
		crashing does NOT work anymore (with the April 21 snapshot
		of OpenBSD/landisk). Strangely enough, removing the hack
		completely causes OpenBSD/landisk to work (!).
		More regression testing (re-testing everything SuperH-related,
		and some other things).
		Cobalt interrupts were actually broken; fixing by commenting
		out the DEC21143s in the Cobalt machine.
20070430	More regression testing.
20070501	Updating the OpenBSD/landisk install instructions to use
		4.1 instead of the current snapshot.
		GAAAH! OpenBSD/landisk 4.1 _needs_ the ugly hack/workaround;
		reintroducing it again. (The 4.1 kernel is actually from
		2007-03-11.)
		Simplifying the NetBSD/evbarm install instructions a bit.
		More regression testing.

==============  RELEASE 0.4.5.1  ==============
1 #
2 # $Id: Makefile.skel,v 1.33 2007/04/19 15:18:15 debug Exp $
3 #
4 # Makefile for GXemul src/cpus
5 #
6
7 CFLAGS=$(CWARNINGS) $(COPTIM) $(XINCLUDE) $(DINCLUDE)
8
9 OBJS=$(CPU_ARCHS) $(CPU_BACKENDS)
10 TOOLS=generate_head generate_tail $(CPU_TOOLS)
11
12
13 all: $(TOOLS)
14 $(MAKE) buildobjs
15
16
17 buildobjs: $(OBJS)
18
19
20 $(OBJS): Makefile
21
22
23
24 ###############################################################################
25
26 cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c ../memory_rw.c \
27 tmp_alpha_head.c tmp_alpha_tail.c
28
29 cpu_alpha_instr.c: cpu_alpha_instr_alu.c tmp_alpha_misc.c
30
31 tmp_alpha_misc.c: cpu_alpha_instr_loadstore.c generate_alpha_misc
32 ./generate_alpha_misc > tmp_alpha_misc.c
33
34 tmp_alpha_head.c: generate_head
35 ./generate_head alpha Alpha > tmp_alpha_head.c
36
37 tmp_alpha_tail.c: generate_tail
38 ./generate_tail alpha Alpha > tmp_alpha_tail.c
39
40
41 ###############################################################################
42
43 cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c ../memory_rw.c \
44 tmp_arm_head.c tmp_arm_tail.c
45
46 cpu_arm_instr.c: cpu_arm_instr_misc.c
47
48 tmp_arm_loadstore.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
49 ./generate_arm_loadstore > tmp_arm_loadstore.c
50
51 tmp_arm_multi.c: generate_arm_multi cpu_arm_multi.txt
52 ./generate_arm_multi `cat cpu_arm_multi.txt` > tmp_arm_multi.c
53
54 tmp_arm_dpi.c: cpu_arm_instr_dpi.c generate_arm_dpi
55 ./generate_arm_dpi > tmp_arm_dpi.c
56
57 tmp_arm_r0.c: generate_arm_r
58 ./generate_arm_r 0x000 0x0ff > tmp_arm_r0.c
59 tmp_arm_r1.c: generate_arm_r
60 ./generate_arm_r 0x100 0x1ff > tmp_arm_r1.c
61 tmp_arm_r2.c: generate_arm_r
62 ./generate_arm_r 0x200 0x2ff > tmp_arm_r2.c
63 tmp_arm_r3.c: generate_arm_r
64 ./generate_arm_r 0x300 0x3ff > tmp_arm_r3.c
65 tmp_arm_r4.c: generate_arm_r
66 ./generate_arm_r 0x400 0x4ff > tmp_arm_r4.c
67 tmp_arm_r5.c: generate_arm_r
68 ./generate_arm_r 0x500 0x5ff > tmp_arm_r5.c
69 tmp_arm_r6.c: generate_arm_r
70 ./generate_arm_r 0x600 0x6ff > tmp_arm_r6.c
71 tmp_arm_r7.c: generate_arm_r
72 ./generate_arm_r 0x700 0x7ff > tmp_arm_r7.c
73 tmp_arm_r8.c: generate_arm_r
74 ./generate_arm_r 0x800 0x8ff > tmp_arm_r8.c
75 tmp_arm_r9.c: generate_arm_r
76 ./generate_arm_r 0x900 0x9ff > tmp_arm_r9.c
77 tmp_arm_ra.c: generate_arm_r
78 ./generate_arm_r 0xa00 0xaff > tmp_arm_ra.c
79 tmp_arm_rb.c: generate_arm_r
80 ./generate_arm_r 0xb00 0xbff > tmp_arm_rb.c
81 tmp_arm_rc.c: generate_arm_r
82 ./generate_arm_r 0xc00 0xcff > tmp_arm_rc.c
83 tmp_arm_rd.c: generate_arm_r
84 ./generate_arm_r 0xd00 0xdff > tmp_arm_rd.c
85 tmp_arm_re.c: generate_arm_r
86 ./generate_arm_r 0xe00 0xeff > tmp_arm_re.c
87 tmp_arm_rf.c: generate_arm_r
88 ./generate_arm_r 0xf00 0xfff > tmp_arm_rf.c
89
90 tmp_arm_r.c: generate_arm_r
91 ./generate_arm_r 0 0 > tmp_arm_r.c
92
93 tmp_arm_head.c: generate_head
94 ./generate_head arm ARM > tmp_arm_head.c
95
96 tmp_arm_tail.c: generate_tail
97 ./generate_tail arm ARM > tmp_arm_tail.c
98
99
100 ###############################################################################
101
102 cpu_avr.o: cpu_avr.c cpu_avr_instr.c cpu_dyntrans.c ../memory_rw.c \
103 tmp_avr_head.c tmp_avr_tail.c
104
105 tmp_avr_head.c: generate_head
106 ./generate_head avr AVR > tmp_avr_head.c
107
108 tmp_avr_tail.c: generate_tail
109 ./generate_tail avr AVR > tmp_avr_tail.c
110
111
112 ###############################################################################
113
114 cpu_m88k.o: cpu_m88k.c cpu_m88k_instr.c cpu_dyntrans.c ../memory_rw.c \
115 tmp_m88k_head.c tmp_m88k_tail.c
116
117 tmp_m88k_head.c: generate_head
118 ./generate_head m88k M88K > tmp_m88k_head.c
119
120 tmp_m88k_tail.c: generate_tail
121 ./generate_tail m88k M88K > tmp_m88k_tail.c
122
123
124 ###############################################################################
125
126 cpu_mips.o: cpu_mips.c cpu_dyntrans.c memory_mips.c \
127 cpu_mips_instr.c tmp_mips_loadstore.c tmp_mips_loadstore_multi.c \
128 tmp_mips_head.c tmp_mips_tail.c
129
130 memory_mips.c: ../memory_rw.c memory_mips_v2p.c
131
132 tmp_mips_loadstore.c: cpu_mips_instr_loadstore.c generate_mips_loadstore
133 ./generate_mips_loadstore > tmp_mips_loadstore.c
134
135 tmp_mips_loadstore_multi.c: generate_mips_loadstore_multi
136 ./generate_mips_loadstore_multi > tmp_mips_loadstore_multi.c
137
138 tmp_mips_head.c: generate_head
139 ./generate_head mips MIPS > tmp_mips_head.c
140
141 tmp_mips_tail.c: generate_tail
142 ./generate_tail mips MIPS > tmp_mips_tail.c
143
144
145 ###############################################################################
146
147 cpu_ppc.o: cpu_ppc.c cpu_ppc_instr.c cpu_dyntrans.c memory_ppc.c \
148 ../memory_rw.c tmp_ppc_head.c tmp_ppc_tail.c tmp_ppc_loadstore.c
149
150 tmp_ppc_loadstore.c: cpu_ppc_instr_loadstore.c generate_ppc_loadstore
151 ./generate_ppc_loadstore > tmp_ppc_loadstore.c
152
153 tmp_ppc_head.c: generate_head
154 ./generate_head ppc PPC > tmp_ppc_head.c
155
156 tmp_ppc_tail.c: generate_tail
157 ./generate_tail ppc PPC > tmp_ppc_tail.c
158
159
160 ###############################################################################
161
162 cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c ../memory_rw.c \
163 tmp_sh_head.c tmp_sh_tail.c
164
165 tmp_sh_head.c: generate_head
166 ./generate_head sh SH > tmp_sh_head.c
167
168 tmp_sh_tail.c: generate_tail
169 ./generate_tail sh SH > tmp_sh_tail.c
170
171
172 ###############################################################################
173
174 cpu_sparc.o: cpu_sparc.c cpu_sparc_instr.c cpu_dyntrans.c ../memory_rw.c \
175 tmp_sparc_head.c tmp_sparc_tail.c tmp_sparc_loadstore.c
176
177 tmp_sparc_loadstore.c: cpu_sparc_instr_loadstore.c generate_sparc_loadstore
178 ./generate_sparc_loadstore > tmp_sparc_loadstore.c
179
180 tmp_sparc_head.c: generate_head
181 ./generate_head sparc SPARC > tmp_sparc_head.c
182
183 tmp_sparc_tail.c: generate_tail
184 ./generate_tail sparc SPARC > tmp_sparc_tail.c
185
186
187 ###############################################################################
188
189 clean:
190 rm -f $(OBJS) $(TOOLS) *core tmp_*.c *.gmon experiment_arm_multi
191
192 clean_all: clean
193 rm -f Makefile
194
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