/[gxemul]/trunk/src/cpus/Makefile.skel
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Contents of /trunk/src/cpus/Makefile.skel

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Revision 22 - (show annotations)
Mon Oct 8 16:19:37 2007 UTC (13 years, 1 month ago) by dpavlin
File size: 6721 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 #
2 # $Id: Makefile.skel,v 1.17 2005/12/11 12:46:24 debug Exp $
3 #
4 # Makefile for GXemul src/cpus
5 #
6
7 CFLAGS=$(CWARNINGS) $(COPTIM) $(XINCLUDE) $(DINCLUDE)
8
9 OBJS=cpu_mips.o cpu_mips_coproc.o bintrans.o memory_fast_v2h.o \
10 $(CPU_ARCHS) $(CPU_BACKENDS)
11 TOOLS=generate_head generate_tail $(CPU_TOOLS)
12
13
14 all: $(TOOLS)
15 $(MAKE) buildobjs
16
17
18 buildobjs: $(OBJS)
19
20
21 $(OBJS): Makefile
22
23
24
25 # Old bintrans:
26
27 bintrans.o: bintrans.c bintrans_alpha.c bintrans_i386.c
28
29
30 ###############################################################################
31
32 cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c ../memory_rw.c \
33 tmp_alpha_head.c tmp_alpha_tail.c
34
35 cpu_alpha_instr.c: cpu_alpha_instr_alu.c tmp_alpha_misc.c
36
37 tmp_alpha_misc.c: cpu_alpha_instr_loadstore.c generate_alpha_misc
38 ./generate_alpha_misc > tmp_alpha_misc.c
39
40 tmp_alpha_head.c: generate_head
41 ./generate_head alpha Alpha > tmp_alpha_head.c
42
43 tmp_alpha_tail.c: generate_tail
44 ./generate_tail alpha Alpha > tmp_alpha_tail.c
45
46
47 ###############################################################################
48
49 cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c ../memory_rw.c \
50 tmp_arm_head.c tmp_arm_tail.c
51
52 cpu_arm_instr.c: cpu_arm_instr_misc.c
53
54 tmp_arm_loadstore.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
55 ./generate_arm_loadstore > tmp_arm_loadstore.c
56
57 tmp_arm_multi.c: generate_arm_multi cpu_arm_multi.txt
58 ./generate_arm_multi `cat cpu_arm_multi.txt` > tmp_arm_multi.c
59
60 tmp_arm_dpi.c: cpu_arm_instr_dpi.c generate_arm_dpi
61 ./generate_arm_dpi > tmp_arm_dpi.c
62
63 tmp_arm_r0.c: generate_arm_r
64 ./generate_arm_r 0x000 0x0ff > tmp_arm_r0.c
65 tmp_arm_r1.c: generate_arm_r
66 ./generate_arm_r 0x100 0x1ff > tmp_arm_r1.c
67 tmp_arm_r2.c: generate_arm_r
68 ./generate_arm_r 0x200 0x2ff > tmp_arm_r2.c
69 tmp_arm_r3.c: generate_arm_r
70 ./generate_arm_r 0x300 0x3ff > tmp_arm_r3.c
71 tmp_arm_r4.c: generate_arm_r
72 ./generate_arm_r 0x400 0x4ff > tmp_arm_r4.c
73 tmp_arm_r5.c: generate_arm_r
74 ./generate_arm_r 0x500 0x5ff > tmp_arm_r5.c
75 tmp_arm_r6.c: generate_arm_r
76 ./generate_arm_r 0x600 0x6ff > tmp_arm_r6.c
77 tmp_arm_r7.c: generate_arm_r
78 ./generate_arm_r 0x700 0x7ff > tmp_arm_r7.c
79 tmp_arm_r8.c: generate_arm_r
80 ./generate_arm_r 0x800 0x8ff > tmp_arm_r8.c
81 tmp_arm_r9.c: generate_arm_r
82 ./generate_arm_r 0x900 0x9ff > tmp_arm_r9.c
83 tmp_arm_ra.c: generate_arm_r
84 ./generate_arm_r 0xa00 0xaff > tmp_arm_ra.c
85 tmp_arm_rb.c: generate_arm_r
86 ./generate_arm_r 0xb00 0xbff > tmp_arm_rb.c
87 tmp_arm_rc.c: generate_arm_r
88 ./generate_arm_r 0xc00 0xcff > tmp_arm_rc.c
89 tmp_arm_rd.c: generate_arm_r
90 ./generate_arm_r 0xd00 0xdff > tmp_arm_rd.c
91 tmp_arm_re.c: generate_arm_r
92 ./generate_arm_r 0xe00 0xeff > tmp_arm_re.c
93 tmp_arm_rf.c: generate_arm_r
94 ./generate_arm_r 0xf00 0xfff > tmp_arm_rf.c
95
96 tmp_arm_r.c: generate_arm_r
97 ./generate_arm_r 0 0 > tmp_arm_r.c
98
99 tmp_arm_head.c: generate_head
100 ./generate_head arm ARM > tmp_arm_head.c
101
102 tmp_arm_tail.c: generate_tail
103 ./generate_tail arm ARM > tmp_arm_tail.c
104
105
106 ###############################################################################
107
108 cpu_avr.o: cpu_avr.c cpu_avr_instr.c cpu_dyntrans.c ../memory_rw.c \
109 tmp_avr_head.c tmp_avr_tail.c
110
111 tmp_avr_head.c: generate_head
112 ./generate_head avr AVR > tmp_avr_head.c
113
114 tmp_avr_tail.c: generate_tail
115 ./generate_tail avr AVR > tmp_avr_tail.c
116
117
118 ###############################################################################
119
120 cpu_hppa.o: cpu_hppa.c cpu_hppa_instr.c cpu_dyntrans.c ../memory_rw.c \
121 tmp_hppa_head.c tmp_hppa_tail.c
122
123 tmp_hppa_head.c: generate_head
124 ./generate_head hppa HPPA > tmp_hppa_head.c
125
126 tmp_hppa_tail.c: generate_tail
127 ./generate_tail hppa HPPA > tmp_hppa_tail.c
128
129
130 ###############################################################################
131
132 cpu_i960.o: cpu_i960.c cpu_i960_instr.c cpu_dyntrans.c ../memory_rw.c \
133 tmp_i960_head.c tmp_i960_tail.c
134
135 tmp_i960_head.c: generate_head
136 ./generate_head i960 i960 > tmp_i960_head.c
137
138 tmp_i960_tail.c: generate_tail
139 ./generate_tail i960 i960 > tmp_i960_tail.c
140
141
142 ###############################################################################
143
144 cpu_ia64.o: cpu_ia64.c cpu_ia64_instr.c cpu_dyntrans.c ../memory_rw.c \
145 tmp_ia64_head.c tmp_ia64_tail.c
146
147 tmp_ia64_head.c: generate_head
148 ./generate_head ia64 IA64 > tmp_ia64_head.c
149
150 tmp_ia64_tail.c: generate_tail
151 ./generate_tail ia64 IA64 > tmp_ia64_tail.c
152
153
154 ###############################################################################
155
156 cpu_m68k.o: cpu_m68k.c cpu_m68k_instr.c cpu_dyntrans.c ../memory_rw.c \
157 tmp_m68k_head.c tmp_m68k_tail.c
158
159 tmp_m68k_head.c: generate_head
160 ./generate_head m68k M68K > tmp_m68k_head.c
161
162 tmp_m68k_tail.c: generate_tail
163 ./generate_tail m68k M68K > tmp_m68k_tail.c
164
165
166 ###############################################################################
167
168 cpu_mips.o: cpu_mips.c cpu_mips16.c cpu_dyntrans.c memory_mips.c \
169 cpu_mips_instr.c tmp_mips_head.c tmp_mips_tail.c
170
171 memory_mips.c: ../memory_rw.c memory_mips_v2p.c
172
173 tmp_mips_head.c: generate_head
174 ./generate_head mips MIPS > tmp_mips_head.c
175
176 tmp_mips_tail.c: generate_tail
177 ./generate_tail mips MIPS > tmp_mips_tail.c
178
179
180 ###############################################################################
181
182 cpu_ppc.o: cpu_ppc.c cpu_ppc_instr.c cpu_dyntrans.c memory_ppc.c \
183 ../memory_rw.c tmp_ppc_head.c tmp_ppc_tail.c
184
185 cpu_ppc_instr.c: tmp_ppc_loadstore.c
186
187 tmp_ppc_loadstore.c: cpu_ppc_instr_loadstore.c generate_ppc_loadstore
188 ./generate_ppc_loadstore > tmp_ppc_loadstore.c
189
190 tmp_ppc_head.c: generate_head
191 ./generate_head ppc PPC > tmp_ppc_head.c
192
193 tmp_ppc_tail.c: generate_tail
194 ./generate_tail ppc PPC > tmp_ppc_tail.c
195
196
197 ###############################################################################
198
199 cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c ../memory_rw.c \
200 tmp_sh_head.c tmp_sh_tail.c
201
202 tmp_sh_head.c: generate_head
203 ./generate_head sh SH > tmp_sh_head.c
204
205 tmp_sh_tail.c: generate_tail
206 ./generate_tail sh SH > tmp_sh_tail.c
207
208
209 ###############################################################################
210
211 cpu_sparc.o: cpu_sparc.c cpu_sparc_instr.c cpu_dyntrans.c ../memory_rw.c \
212 tmp_sparc_head.c tmp_sparc_tail.c
213
214 tmp_sparc_head.c: generate_head
215 ./generate_head sparc SPARC > tmp_sparc_head.c
216
217 tmp_sparc_tail.c: generate_tail
218 ./generate_tail sparc SPARC > tmp_sparc_tail.c
219
220
221 ###############################################################################
222
223 cpu_x86.o: cpu_x86.c cpu_x86_instr.c cpu_dyntrans.c ../memory_rw.c \
224 memory_x86.c tmp_x86_head.c tmp_x86_tail.c
225
226 tmp_x86_head.c: generate_head
227 ./generate_head x86 x86 > tmp_x86_head.c
228
229 tmp_x86_tail.c: generate_tail
230 ./generate_tail x86 x86 > tmp_x86_tail.c
231
232
233 ###############################################################################
234
235 clean:
236 rm -f $(OBJS) $(TOOLS) *core tmp_*.c *.gmon experiment_arm_multi
237
238 clean_all: clean
239 rm -f Makefile
240

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