/[gxemul]/trunk/src/cpus/Makefile.skel
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Contents of /trunk/src/cpus/Makefile.skel

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Revision 44 - (show annotations)
Mon Oct 8 16:22:56 2007 UTC (16 years, 5 months ago) by dpavlin
File size: 7108 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1632 2007/09/11 21:46:35 debug Exp $
20070616	Implementing the MIPS32/64 revision 2 "ror" instruction.
20070617	Adding a struct for each physpage which keeps track of which
		ranges within that page (base offset, length) that are
		continuously translatable. When running with native code
		generation enabled (-b), a range is added after each read-
		ahead loop.
		Experimenting with using the physical program counter sample
		data (implemented 20070608) together with the "translatable
		range" information, to figure out which physical address ranges
		would be worth translating to native code (if the number of
		samples falling within a range is above a certain threshold).
20070618	Adding automagic building of .index comment files for
		src/file/, src/promemul/, src src/useremul/ as well.
		Adding a "has been translated" bit to the ranges, so that only
		not-yet-translated ranges will be sampled.
20070619	Moving src/cpu.c and src/memory_rw.c into src/cpus/,
		src/device.c into src/devices/, and src/machine.c into
		src/machines/.
		Creating a skeleton cc/ld native backend module; beginning on
		the function which will detect cc command line, etc.
20070620	Continuing on the native code generation infrastructure.
20070621	Moving src/x11.c and src/console.c into a new src/console/
		subdir (for everything that is console or framebuffer related).
		Moving src/symbol*.c into a new src/symbol/, which should
		contain anything that is symbol handling related.
20070624	Making the program counter sampling threshold a "settings
		variable" (sampling_threshold), i.e. it can now be changed
		during runtime.
		Switching the RELEASE notes format from plain text to HTML.
		If the TMPDIR environment variable is set, it is used instead
		of "/tmp" for temporary files.
		Continuing on the cc/ld backend: simple .c code is generated,
		the compiler and linker are called, etc.
		Adding detection of host architecture to the configure script
		(again), and adding icache invalidation support (only
		implemented for Alpha hosts so far).
20070625	Simplifying the program counter sampling mechanism.
20070626	Removing the cc/ld native code generation stuff, program
		counter sampling, etc; it would not have worked well in the
		general case.
20070627	Removing everything related to native code generation.
20070629	Removing the (practically unusable) support for multiple
		emulations. (The single emulation allowed now still supports
		multiple simultaneous machines, as before.)
		Beginning on PCCTWO and M88K interrupts.
20070723	Adding a dummy skeleton for emulation of M32R processors.
20070901	Fixing a warning found by "gcc version 4.3.0 20070817
		(experimental)" on amd64.
20070905	Removing some more traces of the old "multiple emulations"
		code.
		Also looking in /usr/local/include and /usr/local/lib for
		X11 libs, when running configure.
20070909	Minor updates to the guest OS install instructions, in
		preparation for the NetBSD 4.0 release.
20070918	More testing of NetBSD 4.0 RC1.

1 #
2 # $Id: Makefile.skel,v 1.40 2007/07/20 09:03:33 debug Exp $
3 #
4 # Makefile for GXemul src/cpus
5 #
6
7 CFLAGS=$(CWARNINGS) $(COPTIM) $(XINCLUDE) $(DINCLUDE)
8
9 OBJS=cpu.o $(CPU_ARCHS) $(CPU_BACKENDS)
10 TOOLS=generate_head generate_tail $(CPU_TOOLS)
11
12
13 all: $(TOOLS)
14 $(MAKE) buildobjs
15
16
17 buildobjs: $(OBJS)
18
19
20 $(OBJS): Makefile
21
22
23
24 ###############################################################################
25
26 cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c memory_rw.c \
27 tmp_alpha_head.c tmp_alpha_tail.c
28
29 cpu_alpha_instr.c: cpu_alpha_instr_alu.c tmp_alpha_misc.c
30
31 tmp_alpha_misc.c: cpu_alpha_instr_loadstore.c generate_alpha_misc
32 ./generate_alpha_misc > tmp_alpha_misc.c
33
34 tmp_alpha_head.c: generate_head
35 ./generate_head alpha Alpha > tmp_alpha_head.c
36
37 tmp_alpha_tail.c: generate_tail
38 ./generate_tail alpha Alpha > tmp_alpha_tail.c
39
40
41 ###############################################################################
42
43 cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c memory_rw.c \
44 tmp_arm_head.c tmp_arm_tail.c
45
46 cpu_arm_instr.c: cpu_arm_instr_misc.c
47
48 generate_arm_loadstore: generate_arm_loadstore.c
49 $(CC) generate_arm_loadstore.c -o generate_arm_loadstore
50 tmp_arm_loadstore.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
51 ./generate_arm_loadstore > tmp_arm_loadstore.c
52 tmp_arm_loadstore_p0_u0_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
53 ./generate_arm_loadstore 0 0 0 > tmp_arm_loadstore_p0_u0_w0.c
54 tmp_arm_loadstore_p0_u0_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
55 ./generate_arm_loadstore 0 0 1 > tmp_arm_loadstore_p0_u0_w1.c
56 tmp_arm_loadstore_p0_u1_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
57 ./generate_arm_loadstore 0 1 0 > tmp_arm_loadstore_p0_u1_w0.c
58 tmp_arm_loadstore_p0_u1_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
59 ./generate_arm_loadstore 0 1 1 > tmp_arm_loadstore_p0_u1_w1.c
60 tmp_arm_loadstore_p1_u0_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
61 ./generate_arm_loadstore 1 0 0 > tmp_arm_loadstore_p1_u0_w0.c
62 tmp_arm_loadstore_p1_u0_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
63 ./generate_arm_loadstore 1 0 1 > tmp_arm_loadstore_p1_u0_w1.c
64 tmp_arm_loadstore_p1_u1_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
65 ./generate_arm_loadstore 1 1 0 > tmp_arm_loadstore_p1_u1_w0.c
66 tmp_arm_loadstore_p1_u1_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
67 ./generate_arm_loadstore 1 1 1 > tmp_arm_loadstore_p1_u1_w1.c
68
69 tmp_arm_multi.c: generate_arm_multi cpu_arm_multi.txt
70 ./generate_arm_multi `cat cpu_arm_multi.txt` > tmp_arm_multi.c
71
72 tmp_arm_dpi.c: cpu_arm_instr_dpi.c generate_arm_dpi
73 ./generate_arm_dpi > tmp_arm_dpi.c
74
75 tmp_arm_r0.c: generate_arm_r
76 ./generate_arm_r 0x000 0x0ff > tmp_arm_r0.c
77 tmp_arm_r1.c: generate_arm_r
78 ./generate_arm_r 0x100 0x1ff > tmp_arm_r1.c
79 tmp_arm_r2.c: generate_arm_r
80 ./generate_arm_r 0x200 0x2ff > tmp_arm_r2.c
81 tmp_arm_r3.c: generate_arm_r
82 ./generate_arm_r 0x300 0x3ff > tmp_arm_r3.c
83 tmp_arm_r4.c: generate_arm_r
84 ./generate_arm_r 0x400 0x4ff > tmp_arm_r4.c
85 tmp_arm_r5.c: generate_arm_r
86 ./generate_arm_r 0x500 0x5ff > tmp_arm_r5.c
87 tmp_arm_r6.c: generate_arm_r
88 ./generate_arm_r 0x600 0x6ff > tmp_arm_r6.c
89 tmp_arm_r7.c: generate_arm_r
90 ./generate_arm_r 0x700 0x7ff > tmp_arm_r7.c
91 tmp_arm_r8.c: generate_arm_r
92 ./generate_arm_r 0x800 0x8ff > tmp_arm_r8.c
93 tmp_arm_r9.c: generate_arm_r
94 ./generate_arm_r 0x900 0x9ff > tmp_arm_r9.c
95 tmp_arm_ra.c: generate_arm_r
96 ./generate_arm_r 0xa00 0xaff > tmp_arm_ra.c
97 tmp_arm_rb.c: generate_arm_r
98 ./generate_arm_r 0xb00 0xbff > tmp_arm_rb.c
99 tmp_arm_rc.c: generate_arm_r
100 ./generate_arm_r 0xc00 0xcff > tmp_arm_rc.c
101 tmp_arm_rd.c: generate_arm_r
102 ./generate_arm_r 0xd00 0xdff > tmp_arm_rd.c
103 tmp_arm_re.c: generate_arm_r
104 ./generate_arm_r 0xe00 0xeff > tmp_arm_re.c
105 tmp_arm_rf.c: generate_arm_r
106 ./generate_arm_r 0xf00 0xfff > tmp_arm_rf.c
107
108 tmp_arm_r.c: generate_arm_r
109 ./generate_arm_r 0 0 > tmp_arm_r.c
110
111 tmp_arm_head.c: generate_head
112 ./generate_head arm ARM > tmp_arm_head.c
113
114 tmp_arm_tail.c: generate_tail
115 ./generate_tail arm ARM > tmp_arm_tail.c
116
117
118 ###############################################################################
119
120 cpu_m32r.o: cpu_m32r.c cpu_m32r_instr.c cpu_dyntrans.c memory_rw.c \
121 tmp_m32r_head.c tmp_m32r_tail.c
122
123 tmp_m32r_head.c: generate_head
124 ./generate_head m32r M32R > tmp_m32r_head.c
125
126 tmp_m32r_tail.c: generate_tail
127 ./generate_tail m32r M32R > tmp_m32r_tail.c
128
129
130 ###############################################################################
131
132 cpu_m88k.o: cpu_m88k.c cpu_m88k_instr.c cpu_dyntrans.c memory_rw.c \
133 tmp_m88k_loadstore.c tmp_m88k_head.c tmp_m88k_tail.c tmp_m88k_bcnd.c
134
135 tmp_m88k_bcnd.c: generate_m88k_bcnd
136 ./generate_m88k_bcnd > tmp_m88k_bcnd.c
137
138 tmp_m88k_loadstore.c: cpu_m88k_instr_loadstore.c generate_m88k_loadstore
139 ./generate_m88k_loadstore > tmp_m88k_loadstore.c
140
141 tmp_m88k_head.c: generate_head
142 ./generate_head m88k M88K > tmp_m88k_head.c
143
144 tmp_m88k_tail.c: generate_tail
145 ./generate_tail m88k M88K > tmp_m88k_tail.c
146
147
148 ###############################################################################
149
150 cpu_mips.o: cpu_mips.c cpu_dyntrans.c memory_mips.c \
151 cpu_mips_instr.c tmp_mips_loadstore.c tmp_mips_loadstore_multi.c \
152 tmp_mips_head.c tmp_mips_tail.c
153
154 memory_mips.c: memory_rw.c memory_mips_v2p.c
155
156 tmp_mips_loadstore.c: cpu_mips_instr_loadstore.c generate_mips_loadstore
157 ./generate_mips_loadstore > tmp_mips_loadstore.c
158
159 tmp_mips_loadstore_multi.c: generate_mips_loadstore_multi
160 ./generate_mips_loadstore_multi > tmp_mips_loadstore_multi.c
161
162 tmp_mips_head.c: generate_head
163 ./generate_head mips MIPS > tmp_mips_head.c
164
165 tmp_mips_tail.c: generate_tail
166 ./generate_tail mips MIPS > tmp_mips_tail.c
167
168
169 ###############################################################################
170
171 cpu_ppc.o: cpu_ppc.c cpu_ppc_instr.c cpu_dyntrans.c memory_ppc.c \
172 memory_rw.c tmp_ppc_head.c tmp_ppc_tail.c tmp_ppc_loadstore.c
173
174 tmp_ppc_loadstore.c: cpu_ppc_instr_loadstore.c generate_ppc_loadstore
175 ./generate_ppc_loadstore > tmp_ppc_loadstore.c
176
177 tmp_ppc_head.c: generate_head
178 ./generate_head ppc PPC > tmp_ppc_head.c
179
180 tmp_ppc_tail.c: generate_tail
181 ./generate_tail ppc PPC > tmp_ppc_tail.c
182
183
184 ###############################################################################
185
186 cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c memory_rw.c \
187 tmp_sh_head.c tmp_sh_tail.c
188
189 tmp_sh_head.c: generate_head
190 ./generate_head sh SH > tmp_sh_head.c
191
192 tmp_sh_tail.c: generate_tail
193 ./generate_tail sh SH > tmp_sh_tail.c
194
195
196 ###############################################################################
197
198 cpu_sparc.o: cpu_sparc.c cpu_sparc_instr.c cpu_dyntrans.c memory_rw.c \
199 tmp_sparc_head.c tmp_sparc_tail.c tmp_sparc_loadstore.c
200
201 tmp_sparc_loadstore.c: cpu_sparc_instr_loadstore.c generate_sparc_loadstore
202 ./generate_sparc_loadstore > tmp_sparc_loadstore.c
203
204 tmp_sparc_head.c: generate_head
205 ./generate_head sparc SPARC > tmp_sparc_head.c
206
207 tmp_sparc_tail.c: generate_tail
208 ./generate_tail sparc SPARC > tmp_sparc_tail.c
209
210
211 ###############################################################################
212
213 clean:
214 rm -f $(OBJS) $(TOOLS) *core tmp_*.c *.gmon experiment_arm_multi
215
216 clean_all: clean
217 rm -f Makefile
218

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