/[gxemul]/trunk/src/cpus/Makefile.skel
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/cpus/Makefile.skel

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Revision 20 - (show annotations)
Mon Oct 8 16:19:23 2007 UTC (16 years, 6 months ago) by dpavlin
File size: 6877 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============


1 #
2 # $Id: Makefile.skel,v 1.15 2005/11/13 22:34:22 debug Exp $
3 #
4 # Makefile for GXemul src/cpus
5 #
6
7 CFLAGS=$(CWARNINGS) $(COPTIM) $(XINCLUDE) $(DINCLUDE)
8
9 OBJS=cpu_mips.o cpu_mips_coproc.o bintrans.o memory_fast_v2h.o $(CPU_ARCHS)
10 TOOLS=generate_head generate_tail $(CPU_TOOLS)
11
12
13 all: $(TOOLS)
14 $(MAKE) buildobjs
15
16
17 buildobjs: $(OBJS)
18
19
20 $(OBJS): Makefile
21
22
23
24 # Old bintrans:
25
26 bintrans.o: bintrans.c bintrans_alpha.c bintrans_i386.c
27
28
29 ###############################################################################
30
31 cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c ../memory_rw.c \
32 tmp_alpha_head.c tmp_alpha_tail.c
33
34 cpu_alpha_instr.c: cpu_alpha_instr_alu.c tmp_alpha_misc.c
35
36 tmp_alpha_misc.c: cpu_alpha_instr_loadstore.c generate_alpha_misc
37 ./generate_alpha_misc > tmp_alpha_misc.c
38
39 tmp_alpha_head.c: generate_head
40 ./generate_head alpha Alpha > tmp_alpha_head.c
41
42 tmp_alpha_tail.c: generate_tail
43 ./generate_tail alpha Alpha > tmp_alpha_tail.c
44
45
46 ###############################################################################
47
48 cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c ../memory_rw.c \
49 tmp_arm_head.c tmp_arm_tail.c
50
51 cpu_arm_instr.c: cpu_arm_instr_misc.c
52
53 tmp_arm_loadstore.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
54 ./generate_arm_loadstore > tmp_arm_loadstore.c
55
56 tmp_arm_multi.c: generate_arm_multi cpu_arm_multi.txt
57 ./generate_arm_multi `cat cpu_arm_multi.txt` > tmp_arm_multi.c
58
59 tmp_arm_dpi.c: cpu_arm_instr_dpi.c generate_arm_dpi
60 ./generate_arm_dpi > tmp_arm_dpi.c
61
62 tmp_arm_r0.c: generate_arm_r
63 ./generate_arm_r 0x000 0x0ff > tmp_arm_r0.c
64 tmp_arm_r1.c: generate_arm_r
65 ./generate_arm_r 0x100 0x1ff > tmp_arm_r1.c
66 tmp_arm_r2.c: generate_arm_r
67 ./generate_arm_r 0x200 0x2ff > tmp_arm_r2.c
68 tmp_arm_r3.c: generate_arm_r
69 ./generate_arm_r 0x300 0x3ff > tmp_arm_r3.c
70 tmp_arm_r4.c: generate_arm_r
71 ./generate_arm_r 0x400 0x4ff > tmp_arm_r4.c
72 tmp_arm_r5.c: generate_arm_r
73 ./generate_arm_r 0x500 0x5ff > tmp_arm_r5.c
74 tmp_arm_r6.c: generate_arm_r
75 ./generate_arm_r 0x600 0x6ff > tmp_arm_r6.c
76 tmp_arm_r7.c: generate_arm_r
77 ./generate_arm_r 0x700 0x7ff > tmp_arm_r7.c
78 tmp_arm_r8.c: generate_arm_r
79 ./generate_arm_r 0x800 0x8ff > tmp_arm_r8.c
80 tmp_arm_r9.c: generate_arm_r
81 ./generate_arm_r 0x900 0x9ff > tmp_arm_r9.c
82 tmp_arm_ra.c: generate_arm_r
83 ./generate_arm_r 0xa00 0xaff > tmp_arm_ra.c
84 tmp_arm_rb.c: generate_arm_r
85 ./generate_arm_r 0xb00 0xbff > tmp_arm_rb.c
86 tmp_arm_rc.c: generate_arm_r
87 ./generate_arm_r 0xc00 0xcff > tmp_arm_rc.c
88 tmp_arm_rd.c: generate_arm_r
89 ./generate_arm_r 0xd00 0xdff > tmp_arm_rd.c
90 tmp_arm_re.c: generate_arm_r
91 ./generate_arm_r 0xe00 0xeff > tmp_arm_re.c
92 tmp_arm_rf.c: generate_arm_r
93 ./generate_arm_r 0xf00 0xfff > tmp_arm_rf.c
94
95 tmp_arm_r.c: generate_arm_r
96 ./generate_arm_r 0 0 > tmp_arm_r.c
97
98 tmp_arm_head.c: generate_head
99 ./generate_head arm ARM > tmp_arm_head.c
100
101 tmp_arm_tail.c: generate_tail
102 ./generate_tail arm ARM > tmp_arm_tail.c
103
104
105 ###############################################################################
106
107 cpu_avr.o: cpu_avr.c cpu_avr_instr.c cpu_dyntrans.c ../memory_rw.c \
108 tmp_avr_head.c tmp_avr_tail.c
109
110 tmp_avr_head.c: generate_head
111 ./generate_head avr AVR > tmp_avr_head.c
112
113 tmp_avr_tail.c: generate_tail
114 ./generate_tail avr AVR > tmp_avr_tail.c
115
116
117 ###############################################################################
118
119 cpu_hppa.o: cpu_hppa.c cpu_hppa_instr.c cpu_dyntrans.c ../memory_rw.c \
120 tmp_hppa_head.c tmp_hppa_tail.c
121
122 tmp_hppa_head.c: generate_head
123 ./generate_head hppa HPPA > tmp_hppa_head.c
124
125 tmp_hppa_tail.c: generate_tail
126 ./generate_tail hppa HPPA > tmp_hppa_tail.c
127
128
129 ###############################################################################
130
131 cpu_i960.o: cpu_i960.c cpu_i960_instr.c cpu_dyntrans.c ../memory_rw.c \
132 tmp_i960_head.c tmp_i960_tail.c
133
134 tmp_i960_head.c: generate_head
135 ./generate_head i960 i960 > tmp_i960_head.c
136
137 tmp_i960_tail.c: generate_tail
138 ./generate_tail i960 i960 > tmp_i960_tail.c
139
140
141 ###############################################################################
142
143 cpu_ia64.o: cpu_ia64.c cpu_ia64_instr.c cpu_dyntrans.c ../memory_rw.c \
144 tmp_ia64_head.c tmp_ia64_tail.c
145
146 tmp_ia64_head.c: generate_head
147 ./generate_head ia64 IA64 > tmp_ia64_head.c
148
149 tmp_ia64_tail.c: generate_tail
150 ./generate_tail ia64 IA64 > tmp_ia64_tail.c
151
152
153 ###############################################################################
154
155 cpu_m68k.o: cpu_m68k.c cpu_m68k_instr.c cpu_dyntrans.c ../memory_rw.c \
156 tmp_m68k_head.c tmp_m68k_tail.c
157
158 tmp_m68k_head.c: generate_head
159 ./generate_head m68k M68K > tmp_m68k_head.c
160
161 tmp_m68k_tail.c: generate_tail
162 ./generate_tail m68k M68K > tmp_m68k_tail.c
163
164
165 ###############################################################################
166
167 cpu_mips.o: cpu_mips.c cpu_mips16.c cpu_dyntrans.c memory_mips.c
168
169 memory_mips.c: ../memory_rw.c memory_mips_v2p.c
170
171
172 ###############################################################################
173
174 cpu_newmips.o: cpu_newmips.c cpu_newmips_instr.c cpu_dyntrans.c ../memory_rw.c \
175 tmp_newmips_head.c tmp_newmips_tail.c
176
177 tmp_newmips_head.c: generate_head
178 ./generate_head newmips NEWMIPS > tmp_newmips_head.c
179
180 tmp_newmips_tail.c: generate_tail
181 ./generate_tail newmips NEWMIPS > tmp_newmips_tail.c
182
183
184 ###############################################################################
185
186 cpu_ppc.o: cpu_ppc.c cpu_ppc_instr.c cpu_dyntrans.c memory_ppc.c \
187 ../memory_rw.c tmp_ppc_head.c tmp_ppc_tail.c
188
189 cpu_ppc_instr.c: tmp_ppc_loadstore.c
190
191 tmp_ppc_loadstore.c: cpu_ppc_instr_loadstore.c generate_ppc_loadstore
192 ./generate_ppc_loadstore > tmp_ppc_loadstore.c
193
194 tmp_ppc_head.c: generate_head
195 ./generate_head ppc PPC > tmp_ppc_head.c
196
197 tmp_ppc_tail.c: generate_tail
198 ./generate_tail ppc PPC > tmp_ppc_tail.c
199
200
201 ###############################################################################
202
203 cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c ../memory_rw.c \
204 tmp_sh_head.c tmp_sh_tail.c
205
206 tmp_sh_head.c: generate_head
207 ./generate_head sh SH > tmp_sh_head.c
208
209 tmp_sh_tail.c: generate_tail
210 ./generate_tail sh SH > tmp_sh_tail.c
211
212
213 ###############################################################################
214
215 cpu_sparc.o: cpu_sparc.c cpu_sparc_instr.c cpu_dyntrans.c ../memory_rw.c \
216 tmp_sparc_head.c tmp_sparc_tail.c
217
218 tmp_sparc_head.c: generate_head
219 ./generate_head sparc SPARC > tmp_sparc_head.c
220
221 tmp_sparc_tail.c: generate_tail
222 ./generate_tail sparc SPARC > tmp_sparc_tail.c
223
224
225 ###############################################################################
226
227 cpu_x86.o: cpu_x86.c cpu_x86_instr.c cpu_dyntrans.c ../memory_rw.c \
228 memory_x86.c tmp_x86_head.c tmp_x86_tail.c
229
230 tmp_x86_head.c: generate_head
231 ./generate_head x86 x86 > tmp_x86_head.c
232
233 tmp_x86_tail.c: generate_tail
234 ./generate_tail x86 x86 > tmp_x86_tail.c
235
236
237 ###############################################################################
238
239 clean:
240 rm -f $(OBJS) $(TOOLS) *core tmp_*.c *.gmon experiment_arm_multi
241
242 clean_all: clean
243 rm -f Makefile
244

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