/[gxemul]/trunk/src/cpus/Makefile.skel
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/cpus/Makefile.skel

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Revision 18 - (show annotations)
Mon Oct 8 16:19:11 2007 UTC (16 years, 6 months ago) by dpavlin
File size: 6508 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============
1 #
2 # $Id: Makefile.skel,v 1.11 2005/10/22 09:38:46 debug Exp $
3 #
4 # Makefile for GXemul src/cpus
5 #
6
7 CFLAGS=$(CWARNINGS) $(COPTIM) $(XINCLUDE) $(DINCLUDE)
8
9 OBJS=cpu_mips.o cpu_mips_coproc.o bintrans.o memory_fast_v2h.o $(CPU_ARCHS)
10 TOOLS=generate_head generate_tail $(CPU_TOOLS)
11
12
13 all: $(TOOLS)
14 $(MAKE) buildobjs
15
16
17 buildobjs: $(OBJS)
18
19
20 $(OBJS): Makefile
21
22
23
24 # Old bintrans:
25
26 bintrans.o: bintrans.c bintrans_alpha.c bintrans_i386.c
27
28
29 ###############################################################################
30
31 cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c ../memory_rw.c \
32 tmp_alpha_head.c tmp_alpha_tail.c
33
34 cpu_alpha_instr.c: cpu_alpha_instr_alu.c tmp_alpha_misc.c
35
36 tmp_alpha_misc.c: cpu_alpha_instr_loadstore.c generate_alpha_misc
37 ./generate_alpha_misc > tmp_alpha_misc.c
38
39 tmp_alpha_head.c: generate_head
40 ./generate_head alpha Alpha > tmp_alpha_head.c
41
42 tmp_alpha_tail.c: generate_tail
43 ./generate_tail alpha Alpha > tmp_alpha_tail.c
44
45
46 ###############################################################################
47
48 cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c ../memory_rw.c \
49 tmp_arm_head.c tmp_arm_tail.c
50
51 cpu_arm_instr.c: tmp_arm_multi.c
52
53 tmp_arm_loadstore.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
54 ./generate_arm_loadstore > tmp_arm_loadstore.c
55
56 tmp_arm_multi.c: generate_arm_multi cpu_arm_multi.txt
57 ./generate_arm_multi `cat cpu_arm_multi.txt` > tmp_arm_multi.c
58
59 tmp_arm_dpi.c: cpu_arm_instr_dpi.c generate_arm_dpi
60 ./generate_arm_dpi > tmp_arm_dpi.c
61
62 tmp_arm_r0.c: generate_arm_r
63 ./generate_arm_r 0x000 0x0ff > tmp_arm_r0.c
64 tmp_arm_r1.c: generate_arm_r
65 ./generate_arm_r 0x100 0x1ff > tmp_arm_r1.c
66 tmp_arm_r2.c: generate_arm_r
67 ./generate_arm_r 0x200 0x2ff > tmp_arm_r2.c
68 tmp_arm_r3.c: generate_arm_r
69 ./generate_arm_r 0x300 0x3ff > tmp_arm_r3.c
70 tmp_arm_r4.c: generate_arm_r
71 ./generate_arm_r 0x400 0x4ff > tmp_arm_r4.c
72 tmp_arm_r5.c: generate_arm_r
73 ./generate_arm_r 0x500 0x5ff > tmp_arm_r5.c
74 tmp_arm_r6.c: generate_arm_r
75 ./generate_arm_r 0x600 0x6ff > tmp_arm_r6.c
76 tmp_arm_r7.c: generate_arm_r
77 ./generate_arm_r 0x700 0x7ff > tmp_arm_r7.c
78 tmp_arm_r8.c: generate_arm_r
79 ./generate_arm_r 0x800 0x8ff > tmp_arm_r8.c
80 tmp_arm_r9.c: generate_arm_r
81 ./generate_arm_r 0x900 0x9ff > tmp_arm_r9.c
82 tmp_arm_ra.c: generate_arm_r
83 ./generate_arm_r 0xa00 0xaff > tmp_arm_ra.c
84 tmp_arm_rb.c: generate_arm_r
85 ./generate_arm_r 0xb00 0xbff > tmp_arm_rb.c
86 tmp_arm_rc.c: generate_arm_r
87 ./generate_arm_r 0xc00 0xcff > tmp_arm_rc.c
88 tmp_arm_rd.c: generate_arm_r
89 ./generate_arm_r 0xd00 0xdff > tmp_arm_rd.c
90 tmp_arm_re.c: generate_arm_r
91 ./generate_arm_r 0xe00 0xeff > tmp_arm_re.c
92 tmp_arm_rf.c: generate_arm_r
93 ./generate_arm_r 0xf00 0xfff > tmp_arm_rf.c
94
95 tmp_arm_r.c: generate_arm_r
96 ./generate_arm_r 0 0 > tmp_arm_r.c
97
98 tmp_arm_head.c: generate_head
99 ./generate_head arm ARM > tmp_arm_head.c
100
101 tmp_arm_tail.c: generate_tail
102 ./generate_tail arm ARM > tmp_arm_tail.c
103
104
105 ###############################################################################
106
107 cpu_avr.o: cpu_avr.c cpu_avr_instr.c cpu_dyntrans.c ../memory_rw.c \
108 tmp_avr_head.c tmp_avr_tail.c
109
110 tmp_avr_head.c: generate_head
111 ./generate_head avr AVR > tmp_avr_head.c
112
113 tmp_avr_tail.c: generate_tail
114 ./generate_tail avr AVR > tmp_avr_tail.c
115
116
117 ###############################################################################
118
119 cpu_hppa.o: cpu_hppa.c cpu_hppa_instr.c cpu_dyntrans.c ../memory_rw.c \
120 tmp_hppa_head.c tmp_hppa_tail.c
121
122 tmp_hppa_head.c: generate_head
123 ./generate_head hppa HPPA > tmp_hppa_head.c
124
125 tmp_hppa_tail.c: generate_tail
126 ./generate_tail hppa HPPA > tmp_hppa_tail.c
127
128
129 ###############################################################################
130
131 cpu_i960.o: cpu_i960.c cpu_i960_instr.c cpu_dyntrans.c ../memory_rw.c \
132 tmp_i960_head.c tmp_i960_tail.c
133
134 tmp_i960_head.c: generate_head
135 ./generate_head i960 i960 > tmp_i960_head.c
136
137 tmp_i960_tail.c: generate_tail
138 ./generate_tail i960 i960 > tmp_i960_tail.c
139
140
141 ###############################################################################
142
143 cpu_ia64.o: cpu_ia64.c cpu_ia64_instr.c cpu_dyntrans.c ../memory_rw.c \
144 tmp_ia64_head.c tmp_ia64_tail.c
145
146 tmp_ia64_head.c: generate_head
147 ./generate_head ia64 IA64 > tmp_ia64_head.c
148
149 tmp_ia64_tail.c: generate_tail
150 ./generate_tail ia64 IA64 > tmp_ia64_tail.c
151
152
153 ###############################################################################
154
155 cpu_m68k.o: cpu_m68k.c cpu_m68k_instr.c cpu_dyntrans.c ../memory_rw.c \
156 tmp_m68k_head.c tmp_m68k_tail.c
157
158 tmp_m68k_head.c: generate_head
159 ./generate_head m68k M68K > tmp_m68k_head.c
160
161 tmp_m68k_tail.c: generate_tail
162 ./generate_tail m68k M68K > tmp_m68k_tail.c
163
164
165 ###############################################################################
166
167 cpu_mips.o: cpu_mips.c cpu_mips16.c cpu_dyntrans.c memory_mips.c
168
169 memory_mips.c: ../memory_rw.c memory_mips_v2p.c
170
171
172 ###############################################################################
173
174 cpu_ppc.o: cpu_ppc.c cpu_ppc_instr.c cpu_dyntrans.c memory_ppc.c \
175 ../memory_rw.c tmp_ppc_head.c tmp_ppc_tail.c
176
177 cpu_ppc_instr.c: tmp_ppc_loadstore.c
178
179 tmp_ppc_loadstore.c: cpu_ppc_instr_loadstore.c generate_ppc_loadstore
180 ./generate_ppc_loadstore > tmp_ppc_loadstore.c
181
182 tmp_ppc_head.c: generate_head
183 ./generate_head ppc PPC > tmp_ppc_head.c
184
185 tmp_ppc_tail.c: generate_tail
186 ./generate_tail ppc PPC > tmp_ppc_tail.c
187
188
189 ###############################################################################
190
191 cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c ../memory_rw.c \
192 tmp_sh_head.c tmp_sh_tail.c
193
194 tmp_sh_head.c: generate_head
195 ./generate_head sh SH > tmp_sh_head.c
196
197 tmp_sh_tail.c: generate_tail
198 ./generate_tail sh SH > tmp_sh_tail.c
199
200
201 ###############################################################################
202
203 cpu_sparc.o: cpu_sparc.c cpu_sparc_instr.c cpu_dyntrans.c ../memory_rw.c \
204 tmp_sparc_head.c tmp_sparc_tail.c
205
206 tmp_sparc_head.c: generate_head
207 ./generate_head sparc SPARC > tmp_sparc_head.c
208
209 tmp_sparc_tail.c: generate_tail
210 ./generate_tail sparc SPARC > tmp_sparc_tail.c
211
212
213 ###############################################################################
214
215 cpu_x86.o: cpu_x86.c cpu_x86_instr.c cpu_dyntrans.c ../memory_rw.c \
216 tmp_x86_head.c tmp_x86_tail.c
217
218 memory_x86.c: ../memory_rw.c
219
220 tmp_x86_head.c: generate_head
221 ./generate_head x86 x86 > tmp_x86_head.c
222
223 tmp_x86_tail.c: generate_tail
224 ./generate_tail x86 x86 > tmp_x86_tail.c
225
226
227 ###############################################################################
228
229 clean:
230 rm -f $(OBJS) $(TOOLS) *core tmp_*.c *.gmon experiment_arm_multi
231
232 clean_all: clean
233 rm -f Makefile
234
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