Parent Directory | Revision Log
++ trunk/HISTORY (local) $Id: HISTORY,v 1.1632 2007/09/11 21:46:35 debug Exp $ 20070616 Implementing the MIPS32/64 revision 2 "ror" instruction. 20070617 Adding a struct for each physpage which keeps track of which ranges within that page (base offset, length) that are continuously translatable. When running with native code generation enabled (-b), a range is added after each read- ahead loop. Experimenting with using the physical program counter sample data (implemented 20070608) together with the "translatable range" information, to figure out which physical address ranges would be worth translating to native code (if the number of samples falling within a range is above a certain threshold). 20070618 Adding automagic building of .index comment files for src/file/, src/promemul/, src src/useremul/ as well. Adding a "has been translated" bit to the ranges, so that only not-yet-translated ranges will be sampled. 20070619 Moving src/cpu.c and src/memory_rw.c into src/cpus/, src/device.c into src/devices/, and src/machine.c into src/machines/. Creating a skeleton cc/ld native backend module; beginning on the function which will detect cc command line, etc. 20070620 Continuing on the native code generation infrastructure. 20070621 Moving src/x11.c and src/console.c into a new src/console/ subdir (for everything that is console or framebuffer related). Moving src/symbol*.c into a new src/symbol/, which should contain anything that is symbol handling related. 20070624 Making the program counter sampling threshold a "settings variable" (sampling_threshold), i.e. it can now be changed during runtime. Switching the RELEASE notes format from plain text to HTML. If the TMPDIR environment variable is set, it is used instead of "/tmp" for temporary files. Continuing on the cc/ld backend: simple .c code is generated, the compiler and linker are called, etc. Adding detection of host architecture to the configure script (again), and adding icache invalidation support (only implemented for Alpha hosts so far). 20070625 Simplifying the program counter sampling mechanism. 20070626 Removing the cc/ld native code generation stuff, program counter sampling, etc; it would not have worked well in the general case. 20070627 Removing everything related to native code generation. 20070629 Removing the (practically unusable) support for multiple emulations. (The single emulation allowed now still supports multiple simultaneous machines, as before.) Beginning on PCCTWO and M88K interrupts. 20070723 Adding a dummy skeleton for emulation of M32R processors. 20070901 Fixing a warning found by "gcc version 4.3.0 20070817 (experimental)" on amd64. 20070905 Removing some more traces of the old "multiple emulations" code. Also looking in /usr/local/include and /usr/local/lib for X11 libs, when running configure. 20070909 Minor updates to the guest OS install instructions, in preparation for the NetBSD 4.0 release. 20070918 More testing of NetBSD 4.0 RC1.
1 | /arm_tmphead_1.h/1.3/Sun Feb 19 08:04:13 2006// |
2 | /cpu_arm_multi.txt/1.2/Sat Oct 22 09:38:46 2005// |
3 | /cpu_arm_instr_dpi.c/1.18/Sat Dec 30 13:30:53 2006// |
4 | /cpu_arm_instr_loadstore.c/1.21/Sat Dec 30 13:30:53 2006// |
5 | /cpu_arm_instr_misc.c/1.6/Sat Dec 30 13:30:53 2006// |
6 | /cpu_sparc_instr_loadstore.c/1.4/Sat Dec 30 13:30:55 2006// |
7 | /experiment_arm_multi.c/1.2/Sat Dec 30 13:30:55 2006// |
8 | /generate_arm_dpi.c/1.6/Sat Dec 30 13:30:55 2006// |
9 | /generate_arm_multi.c/1.15/Sat Dec 30 13:30:56 2006// |
10 | /generate_arm_r.c/1.6/Sat Dec 30 13:30:56 2006// |
11 | /generate_mips_loadstore.c/1.5/Sat Dec 30 13:30:56 2006// |
12 | /generate_ppc_loadstore.c/1.5/Sat Dec 30 13:30:56 2006// |
13 | /generate_sparc_loadstore.c/1.2/Sat Dec 30 13:30:56 2006// |
14 | /memory_arm.c/1.38/Sat Dec 30 13:30:56 2006// |
15 | /memory_mips.c/1.11/Sat Dec 30 13:30:56 2006// |
16 | /memory_ppc.c/1.27/Sat Dec 30 13:30:56 2006// |
17 | /cpu_mips_instr_unaligned.c/1.4/Fri Jan 5 19:20:40 2007// |
18 | /cpu_arm_coproc.c/1.28/Mon Feb 5 16:49:21 2007// |
19 | /generate_mips_loadstore_multi.c/1.1/Thu Feb 8 18:30:08 2007// |
20 | /memory_sparc.c/1.3/Fri Mar 16 15:17:55 2007// |
21 | /cpu_mips_instr_loadstore.c/1.14/Wed May 2 08:26:12 2007// |
22 | /generate_m88k_loadstore.c/1.1/Fri May 11 09:28:35 2007// |
23 | /README_DYNTRANS/1.17/Sat May 12 08:25:43 2007// |
24 | /memory_m88k.c/1.8/Fri May 25 11:51:36 2007// |
25 | /cpu_m88k_instr_loadstore.c/1.8/Sun May 27 03:01:28 2007// |
26 | /generate_m88k_bcnd.c/1.3/Sun May 27 03:01:28 2007// |
27 | /generate_arm_loadstore.c/1.9/Mon Jun 4 06:59:01 2007// |
28 | /cpu_alpha_instr_alu.c/1.4/Tue Jun 5 17:32:51 2007// |
29 | /cpu_alpha_instr_loadstore.c/1.6/Tue Jun 5 17:32:51 2007// |
30 | /generate_alpha_misc.c/1.4/Tue Jun 5 17:32:52 2007// |
31 | /memory_alpha.c/1.8/Tue Jun 5 17:32:52 2007// |
32 | /memory_mips_v2p.c/1.17/Tue Jun 5 05:20:39 2007// |
33 | /memory_sh.c/1.23/Tue Jun 5 20:51:54 2007// |
34 | /cpu_alpha_palcode.c/1.18/Fri Jun 15 00:41:21 2007// |
35 | /cpu_ppc_instr_loadstore.c/1.10/Fri Jun 15 21:30:16 2007// |
36 | /cpu_mips_coproc.c/1.69/Fri Jun 15 18:07:08 2007// |
37 | /memory_rw.c/1.1/Tue Jun 19 02:11:46 2007// |
38 | /cpu.c/1.6/Thu Jun 28 13:36:45 2007// |
39 | /cpu_alpha.c/1.29/Thu Jun 28 13:36:46 2007// |
40 | /cpu_alpha_instr.c/1.18/Thu Jun 28 13:36:46 2007// |
41 | /cpu_arm.c/1.72/Thu Jun 28 13:36:46 2007// |
42 | /cpu_arm_instr.c/1.77/Thu Jun 28 13:36:46 2007// |
43 | /cpu_m88k.c/1.39/Thu Jun 28 13:36:46 2007// |
44 | /cpu_m88k_instr.c/1.42/Thu Jun 28 13:36:46 2007// |
45 | /cpu_mips.c/1.84/Thu Jun 28 13:36:46 2007// |
46 | /cpu_mips_instr.c/1.143/Thu Jun 28 13:36:46 2007// |
47 | /cpu_ppc.c/1.72/Thu Jun 28 13:36:46 2007// |
48 | /cpu_ppc_instr.c/1.77/Thu Jun 28 13:36:47 2007// |
49 | /cpu_sh.c/1.76/Thu Jun 28 13:36:47 2007// |
50 | /cpu_sh_instr.c/1.64/Thu Jun 28 13:36:47 2007// |
51 | /cpu_sparc.c/1.47/Thu Jun 28 13:36:47 2007// |
52 | /cpu_sparc_instr.c/1.29/Thu Jun 28 13:36:47 2007// |
53 | /generate_head.c/1.30/Thu Jun 28 13:36:47 2007// |
54 | /generate_tail.c/1.21/Thu Jun 28 13:36:47 2007// |
55 | /Makefile.skel/1.40/Fri Jul 20 09:03:33 2007// |
56 | /cpu_dyntrans.c/1.186/Fri Jul 20 09:03:33 2007// |
57 | /cpu_m32r.c/1.1/Fri Jul 20 09:03:33 2007// |
58 | /cpu_m32r_instr.c/1.1/Fri Jul 20 09:03:33 2007// |
59 | /memory_m32r.c/1.2/Sun Jul 22 22:35:46 2007// |
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