25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_mips_coproc.c,v 1.17 2005/04/22 16:03:43 debug Exp $ |
* $Id: cpu_mips_coproc.c,v 1.18 2005/05/07 02:13:22 debug Exp $ |
29 |
* |
* |
30 |
* Emulation of MIPS coprocessors. |
* Emulation of MIPS coprocessors. |
31 |
*/ |
*/ |
2322 |
vaddr2 = cp->tlbs[i].hi & ENTRYHI_VPN2_MASK_R10K; |
vaddr2 = cp->tlbs[i].hi & ENTRYHI_VPN2_MASK_R10K; |
2323 |
if (vaddr1 == vaddr2 && ((cp->tlbs[i].lo0 & |
if (vaddr1 == vaddr2 && ((cp->tlbs[i].lo0 & |
2324 |
ENTRYLO_V) || (cp->tlbs[i].lo1 & ENTRYLO_V))) |
ENTRYLO_V) || (cp->tlbs[i].lo1 & ENTRYLO_V))) |
2325 |
fatal("\n[ WARNING! tlbw%s vaddr=0x%llx is " |
fatal("\n[ WARNING! tlbw%s to index 0x%02x " |
2326 |
"already in the TLB! ]\n\n", randomflag? |
"vaddr=0x%llx (asid 0x%02x) is already in" |
2327 |
"r" : "i", (long long)vaddr1); |
" the TLB (entry 0x%02x) ! ]\n\n", |
2328 |
|
randomflag? "r" : "i", index, |
2329 |
|
(long long)vaddr1, asid, i); |
2330 |
} |
} |
2331 |
} |
} |
2332 |
|
|