25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_mips.c,v 1.41 2005/05/29 17:51:46 debug Exp $ |
* $Id: cpu_mips.c,v 1.42 2005/06/11 20:59:11 debug Exp $ |
29 |
* |
* |
30 |
* MIPS core CPU emulation. |
* MIPS core CPU emulation. |
31 |
*/ |
*/ |
1618 |
"pc=%08llx <%s> ]\n", (long long)vaddr, |
"pc=%08llx <%s> ]\n", (long long)vaddr, |
1619 |
exception_names[exccode], (long long)cpu->cd.mips.pc_last, |
exception_names[exccode], (long long)cpu->cd.mips.pc_last, |
1620 |
symbol? symbol : "(no symbol)"); |
symbol? symbol : "(no symbol)"); |
1621 |
cpu->running = 0; |
|
1622 |
|
#ifdef TRACE_NULL_CRASHES |
1623 |
|
/* This can be useful for debugging kernel bugs: */ |
1624 |
|
{ |
1625 |
|
int i = cpu->trace_null_index; |
1626 |
|
do { |
1627 |
|
fatal("TRACE: 0x%016llx\n", |
1628 |
|
cpu->trace_null_addr[i]); |
1629 |
|
i ++; |
1630 |
|
i %= TRACE_NULL_N_ENTRIES; |
1631 |
|
} while (i != cpu->trace_null_index); |
1632 |
|
} |
1633 |
|
cpu->running = 0; |
1634 |
|
cpu->dead = 1; |
1635 |
|
#endif |
1636 |
} |
} |
1637 |
|
|
1638 |
/* Clear the exception code bits of the cause register... */ |
/* Clear the exception code bits of the cause register... */ |
1902 |
/* Cache the program counter in a local variable: */ |
/* Cache the program counter in a local variable: */ |
1903 |
cached_pc = cpu->pc; |
cached_pc = cpu->pc; |
1904 |
|
|
1905 |
|
#ifdef TRACE_NULL_CRASHES |
1906 |
|
cpu->trace_null_addr[cpu->trace_null_index] = cached_pc; |
1907 |
|
cpu->trace_null_index ++; |
1908 |
|
cpu->trace_null_index %= TRACE_NULL_N_ENTRIES; |
1909 |
|
#endif |
1910 |
|
|
1911 |
/* Hardwire the zero register to 0: */ |
/* Hardwire the zero register to 0: */ |
1912 |
cpu->cd.mips.gpr[MIPS_GPR_ZERO] = 0; |
cpu->cd.mips.gpr[MIPS_GPR_ZERO] = 0; |
1913 |
|
|