25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu.c,v 1.298 2005/06/27 10:43:16 debug Exp $ |
* $Id: cpu.c,v 1.323 2005/11/13 22:34:21 debug Exp $ |
29 |
* |
* |
30 |
* Common routines for CPU emulation. (Not specific to any CPU type.) |
* Common routines for CPU emulation. (Not specific to any CPU type.) |
31 |
*/ |
*/ |
37 |
|
|
38 |
#include "cpu.h" |
#include "cpu.h" |
39 |
#include "machine.h" |
#include "machine.h" |
40 |
|
#include "memory.h" |
41 |
#include "misc.h" |
#include "misc.h" |
42 |
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|
43 |
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|
72 |
exit(1); |
exit(1); |
73 |
} |
} |
74 |
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|
75 |
cpu = malloc(sizeof(struct cpu)); |
cpu = zeroed_alloc(sizeof(struct cpu)); |
|
if (cpu == NULL) { |
|
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fprintf(stderr, "out of memory\n"); |
|
|
exit(1); |
|
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} |
|
76 |
|
|
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memset(cpu, 0, sizeof(struct cpu)); |
|
77 |
cpu->memory_rw = NULL; |
cpu->memory_rw = NULL; |
78 |
cpu->name = cpu_type_name; |
cpu->name = cpu_type_name; |
79 |
cpu->mem = mem; |
cpu->mem = mem; |
83 |
cpu->bootstrap_cpu_flag = 0; |
cpu->bootstrap_cpu_flag = 0; |
84 |
cpu->running = 0; |
cpu->running = 0; |
85 |
|
|
86 |
|
cpu_create_or_reset_tc(cpu); |
87 |
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|
88 |
fp = first_cpu_family; |
fp = first_cpu_family; |
89 |
|
|
90 |
while (fp != NULL) { |
while (fp != NULL) { |
181 |
* |
* |
182 |
* Dump cpu registers in a relatively readable format. |
* Dump cpu registers in a relatively readable format. |
183 |
* |
* |
184 |
* gprs: set to non-zero to dump GPRs. (CPU dependant.) |
* gprs: set to non-zero to dump GPRs. (CPU dependent.) |
185 |
* coprocs: set bit 0..x to dump registers in coproc 0..x. (CPU dependant.) |
* coprocs: set bit 0..x to dump registers in coproc 0..x. (CPU dependent.) |
186 |
*/ |
*/ |
187 |
void cpu_register_dump(struct machine *m, struct cpu *cpu, |
void cpu_register_dump(struct machine *m, struct cpu *cpu, |
188 |
int gprs, int coprocs) |
int gprs, int coprocs) |
229 |
|
|
230 |
|
|
231 |
/* |
/* |
232 |
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* cpu_functioncall_trace(): |
233 |
|
* |
234 |
|
* This function should be called if machine->show_trace_tree is enabled, and |
235 |
|
* a function call is being made. f contains the address of the function. |
236 |
|
*/ |
237 |
|
void cpu_functioncall_trace(struct cpu *cpu, uint64_t f) |
238 |
|
{ |
239 |
|
int i, n_args = -1; |
240 |
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char *symbol; |
241 |
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uint64_t offset; |
242 |
|
|
243 |
|
if (cpu->machine->ncpus > 1) |
244 |
|
fatal("cpu%i:\t", cpu->cpu_id); |
245 |
|
|
246 |
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cpu->trace_tree_depth ++; |
247 |
|
if (cpu->trace_tree_depth > 100) |
248 |
|
cpu->trace_tree_depth = 100; |
249 |
|
for (i=0; i<cpu->trace_tree_depth; i++) |
250 |
|
fatal(" "); |
251 |
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|
252 |
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fatal("<"); |
253 |
|
symbol = get_symbol_name_and_n_args(&cpu->machine->symbol_context, |
254 |
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f, &offset, &n_args); |
255 |
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if (symbol != NULL) |
256 |
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fatal("%s", symbol); |
257 |
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else { |
258 |
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if (cpu->is_32bit) |
259 |
|
fatal("0x%08x", (int)f); |
260 |
|
else |
261 |
|
fatal("0x%llx", (long long)f); |
262 |
|
} |
263 |
|
fatal("("); |
264 |
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|
265 |
|
if (cpu->machine->cpu_family->functioncall_trace != NULL) |
266 |
|
cpu->machine->cpu_family->functioncall_trace(cpu, f, n_args); |
267 |
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|
268 |
|
fatal(")>\n"); |
269 |
|
} |
270 |
|
|
271 |
|
|
272 |
|
/* |
273 |
|
* cpu_functioncall_trace_return(): |
274 |
|
* |
275 |
|
* This function should be called if machine->show_trace_tree is enabled, and |
276 |
|
* a function is being returned from. |
277 |
|
* |
278 |
|
* TODO: Print return value? This could be implemented similar to the |
279 |
|
* cpu->functioncall_trace function call above. |
280 |
|
*/ |
281 |
|
void cpu_functioncall_trace_return(struct cpu *cpu) |
282 |
|
{ |
283 |
|
cpu->trace_tree_depth --; |
284 |
|
if (cpu->trace_tree_depth < 0) |
285 |
|
cpu->trace_tree_depth = 0; |
286 |
|
} |
287 |
|
|
288 |
|
|
289 |
|
/* |
290 |
|
* cpu_create_or_reset_tc(): |
291 |
|
* |
292 |
|
* Create the translation cache in memory (ie allocate memory for it), if |
293 |
|
* necessary, and then reset it to an initial state. |
294 |
|
*/ |
295 |
|
void cpu_create_or_reset_tc(struct cpu *cpu) |
296 |
|
{ |
297 |
|
if (cpu->translation_cache == NULL) |
298 |
|
cpu->translation_cache = zeroed_alloc(DYNTRANS_CACHE_SIZE + |
299 |
|
DYNTRANS_CACHE_MARGIN); |
300 |
|
|
301 |
|
/* Create an empty table at the beginning of the translation cache: */ |
302 |
|
memset(cpu->translation_cache, 0, sizeof(uint32_t) |
303 |
|
* N_BASE_TABLE_ENTRIES); |
304 |
|
|
305 |
|
cpu->translation_cache_cur_ofs = |
306 |
|
N_BASE_TABLE_ENTRIES * sizeof(uint32_t); |
307 |
|
|
308 |
|
/* |
309 |
|
* There might be other translation pointers that still point to |
310 |
|
* within the translation_cache region. Let's invalidate those too: |
311 |
|
*/ |
312 |
|
if (cpu->invalidate_code_translation != NULL) |
313 |
|
cpu->invalidate_code_translation(cpu, 0, INVALIDATE_ALL); |
314 |
|
} |
315 |
|
|
316 |
|
|
317 |
|
/* |
318 |
* cpu_run(): |
* cpu_run(): |
319 |
* |
* |
320 |
* Run instructions on all CPUs in this machine, for a "medium duration" |
* Run instructions on all CPUs in this machine, for a "medium duration" |
336 |
* cpu_dumpinfo(): |
* cpu_dumpinfo(): |
337 |
* |
* |
338 |
* Dumps info about a CPU using debug(). "cpu0: CPUNAME, running" (or similar) |
* Dumps info about a CPU using debug(). "cpu0: CPUNAME, running" (or similar) |
339 |
* is outputed, and it is up to CPU dependant code to complete the line. |
* is outputed, and it is up to CPU dependent code to complete the line. |
340 |
*/ |
*/ |
341 |
void cpu_dumpinfo(struct machine *m, struct cpu *cpu) |
void cpu_dumpinfo(struct machine *m, struct cpu *cpu) |
342 |
{ |
{ |
388 |
* Shuts down all CPUs in a machine when ending a simulation. (This function |
* Shuts down all CPUs in a machine when ending a simulation. (This function |
389 |
* should only need to be called once for each machine.) |
* should only need to be called once for each machine.) |
390 |
*/ |
*/ |
391 |
void cpu_run_deinit(struct emul *emul, struct machine *machine) |
void cpu_run_deinit(struct machine *machine) |
392 |
{ |
{ |
393 |
int te; |
int te; |
394 |
|
|
427 |
void cpu_show_cycles(struct machine *machine, int forced) |
void cpu_show_cycles(struct machine *machine, int forced) |
428 |
{ |
{ |
429 |
uint64_t offset, pc; |
uint64_t offset, pc; |
|
int is_32bit = 0, instrs_per_cycle = 1; |
|
430 |
char *symbol; |
char *symbol; |
431 |
int64_t mseconds, ninstrs; |
int64_t mseconds, ninstrs, is, avg; |
432 |
struct timeval tv; |
struct timeval tv; |
433 |
int h, m, s, ms, d; |
int h, m, s, ms, d, instrs_per_cycle = 1; |
434 |
|
|
435 |
static int64_t mseconds_last = 0; |
static int64_t mseconds_last = 0; |
436 |
static int64_t ninstrs_last = -1; |
static int64_t ninstrs_last = -1; |
437 |
|
|
438 |
switch (machine->arch) { |
switch (machine->arch) { |
439 |
case ARCH_MIPS: |
case ARCH_MIPS: |
|
if (machine->cpus[machine->bootstrap_cpu]->cd.mips. |
|
|
cpu_type.isa_level < 3 || machine->cpus[machine-> |
|
|
bootstrap_cpu]->cd.mips.cpu_type.isa_level == 32) |
|
|
is_32bit = 1; |
|
440 |
instrs_per_cycle = machine->cpus[machine->bootstrap_cpu]-> |
instrs_per_cycle = machine->cpus[machine->bootstrap_cpu]-> |
441 |
cd.mips.cpu_type.instrs_per_cycle; |
cd.mips.cpu_type.instrs_per_cycle; |
442 |
break; |
break; |
|
case ARCH_ARM: |
|
|
is_32bit = 1; |
|
|
break; |
|
443 |
} |
} |
444 |
|
|
445 |
pc = machine->cpus[machine->bootstrap_cpu]->pc; |
pc = machine->cpus[machine->bootstrap_cpu]->pc; |
475 |
cur_cycles_per_second) / 16; |
cur_cycles_per_second) / 16; |
476 |
} |
} |
477 |
|
|
478 |
debug("[ updating emulated_hz to %lli Hz ]\n", |
/* debug("[ updating emulated_hz to %lli Hz ]\n", |
479 |
(long long)machine->emulated_hz); |
(long long)machine->emulated_hz); */ |
480 |
} |
} |
481 |
|
|
482 |
|
|
503 |
} |
} |
504 |
|
|
505 |
/* Instructions per second, and average so far: */ |
/* Instructions per second, and average so far: */ |
506 |
printf("; i/s=%lli avg=%lli; ", |
is = 1000 * (ninstrs-ninstrs_last) / (mseconds-mseconds_last); |
507 |
(long long) ((long long)1000 * (ninstrs-ninstrs_last) |
avg = (long long)1000 * ninstrs / mseconds; |
508 |
/ (mseconds-mseconds_last)), |
if (is < 0) |
509 |
(long long) ((long long)1000 * ninstrs / mseconds)); |
is = 0; |
510 |
|
if (avg < 0) |
511 |
|
avg = 0; |
512 |
|
printf("; i/s=%lli avg=%lli", (long long)is, (long long)avg); |
513 |
|
|
514 |
symbol = get_symbol_name(&machine->symbol_context, pc, &offset); |
symbol = get_symbol_name(&machine->symbol_context, pc, &offset); |
515 |
|
|
516 |
if (is_32bit) |
if (machine->ncpus == 1) { |
517 |
printf("pc=0x%08x", (int)pc); |
if (machine->cpus[machine->bootstrap_cpu]->is_32bit) |
518 |
else |
printf("; pc=0x%08x", (int)pc); |
519 |
printf("pc=0x%016llx", (long long)pc); |
else |
520 |
|
printf("; pc=0x%016llx", (long long)pc); |
521 |
|
} |
522 |
|
|
523 |
if (symbol != NULL) |
if (symbol != NULL) |
524 |
printf(" <%s>", symbol); |
printf(" <%s>", symbol); |
536 |
* Prepare to run instructions on all CPUs in this machine. (This function |
* Prepare to run instructions on all CPUs in this machine. (This function |
537 |
* should only need to be called once for each machine.) |
* should only need to be called once for each machine.) |
538 |
*/ |
*/ |
539 |
void cpu_run_init(struct emul *emul, struct machine *machine) |
void cpu_run_init(struct machine *machine) |
540 |
{ |
{ |
541 |
int ncpus = machine->ncpus; |
int ncpus = machine->ncpus; |
542 |
int te; |
int te; |
646 |
void cpu_init(void) |
void cpu_init(void) |
647 |
{ |
{ |
648 |
/* Note: These are registered in alphabetic order. */ |
/* Note: These are registered in alphabetic order. */ |
649 |
|
|
650 |
|
#ifdef ENABLE_ALPHA |
651 |
|
add_cpu_family(alpha_cpu_family_init, ARCH_ALPHA); |
652 |
|
#endif |
653 |
|
|
654 |
|
#ifdef ENABLE_ARM |
655 |
add_cpu_family(arm_cpu_family_init, ARCH_ARM); |
add_cpu_family(arm_cpu_family_init, ARCH_ARM); |
656 |
|
#endif |
657 |
|
|
658 |
|
#ifdef ENABLE_AVR |
659 |
|
add_cpu_family(avr_cpu_family_init, ARCH_AVR); |
660 |
|
#endif |
661 |
|
|
662 |
|
#ifdef ENABLE_HPPA |
663 |
|
add_cpu_family(hppa_cpu_family_init, ARCH_HPPA); |
664 |
|
#endif |
665 |
|
|
666 |
|
#ifdef ENABLE_I960 |
667 |
|
add_cpu_family(i960_cpu_family_init, ARCH_I960); |
668 |
|
#endif |
669 |
|
|
670 |
|
#ifdef ENABLE_IA64 |
671 |
|
add_cpu_family(ia64_cpu_family_init, ARCH_IA64); |
672 |
|
#endif |
673 |
|
|
674 |
|
#ifdef ENABLE_M68K |
675 |
|
add_cpu_family(m68k_cpu_family_init, ARCH_M68K); |
676 |
|
#endif |
677 |
|
|
678 |
|
#ifdef ENABLE_MIPS |
679 |
add_cpu_family(mips_cpu_family_init, ARCH_MIPS); |
add_cpu_family(mips_cpu_family_init, ARCH_MIPS); |
680 |
|
#endif |
681 |
|
|
682 |
|
#ifdef ENABLE_NEWMIPS |
683 |
|
add_cpu_family(newmips_cpu_family_init, ARCH_NEWMIPS); |
684 |
|
#endif |
685 |
|
|
686 |
|
#ifdef ENABLE_PPC |
687 |
add_cpu_family(ppc_cpu_family_init, ARCH_PPC); |
add_cpu_family(ppc_cpu_family_init, ARCH_PPC); |
688 |
add_cpu_family(urisc_cpu_family_init, ARCH_URISC); |
#endif |
689 |
|
|
690 |
|
#ifdef ENABLE_SH |
691 |
|
add_cpu_family(sh_cpu_family_init, ARCH_SH); |
692 |
|
#endif |
693 |
|
|
694 |
|
#ifdef ENABLE_SPARC |
695 |
|
add_cpu_family(sparc_cpu_family_init, ARCH_SPARC); |
696 |
|
#endif |
697 |
|
|
698 |
|
#ifdef ENABLE_X86 |
699 |
add_cpu_family(x86_cpu_family_init, ARCH_X86); |
add_cpu_family(x86_cpu_family_init, ARCH_X86); |
700 |
|
#endif |
701 |
} |
} |
702 |
|
|