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Revision 44 - (show annotations)
Mon Oct 8 16:22:56 2007 UTC (16 years, 6 months ago) by dpavlin
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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1632 2007/09/11 21:46:35 debug Exp $
20070616	Implementing the MIPS32/64 revision 2 "ror" instruction.
20070617	Adding a struct for each physpage which keeps track of which
		ranges within that page (base offset, length) that are
		continuously translatable. When running with native code
		generation enabled (-b), a range is added after each read-
		ahead loop.
		Experimenting with using the physical program counter sample
		data (implemented 20070608) together with the "translatable
		range" information, to figure out which physical address ranges
		would be worth translating to native code (if the number of
		samples falling within a range is above a certain threshold).
20070618	Adding automagic building of .index comment files for
		src/file/, src/promemul/, src src/useremul/ as well.
		Adding a "has been translated" bit to the ranges, so that only
		not-yet-translated ranges will be sampled.
20070619	Moving src/cpu.c and src/memory_rw.c into src/cpus/,
		src/device.c into src/devices/, and src/machine.c into
		src/machines/.
		Creating a skeleton cc/ld native backend module; beginning on
		the function which will detect cc command line, etc.
20070620	Continuing on the native code generation infrastructure.
20070621	Moving src/x11.c and src/console.c into a new src/console/
		subdir (for everything that is console or framebuffer related).
		Moving src/symbol*.c into a new src/symbol/, which should
		contain anything that is symbol handling related.
20070624	Making the program counter sampling threshold a "settings
		variable" (sampling_threshold), i.e. it can now be changed
		during runtime.
		Switching the RELEASE notes format from plain text to HTML.
		If the TMPDIR environment variable is set, it is used instead
		of "/tmp" for temporary files.
		Continuing on the cc/ld backend: simple .c code is generated,
		the compiler and linker are called, etc.
		Adding detection of host architecture to the configure script
		(again), and adding icache invalidation support (only
		implemented for Alpha hosts so far).
20070625	Simplifying the program counter sampling mechanism.
20070626	Removing the cc/ld native code generation stuff, program
		counter sampling, etc; it would not have worked well in the
		general case.
20070627	Removing everything related to native code generation.
20070629	Removing the (practically unusable) support for multiple
		emulations. (The single emulation allowed now still supports
		multiple simultaneous machines, as before.)
		Beginning on PCCTWO and M88K interrupts.
20070723	Adding a dummy skeleton for emulation of M32R processors.
20070901	Fixing a warning found by "gcc version 4.3.0 20070817
		(experimental)" on amd64.
20070905	Removing some more traces of the old "multiple emulations"
		code.
		Also looking in /usr/local/include and /usr/local/lib for
		X11 libs, when running configure.
20070909	Minor updates to the guest OS install instructions, in
		preparation for the NetBSD 4.0 release.
20070918	More testing of NetBSD 4.0 RC1.

1 <html><head><title>Gavare's eXperimental Emulator:&nbsp;&nbsp;&nbsp;Dynamic Translation</title>
2 <meta name="robots" content="noarchive,nofollow,noindex"></head>
3 <body bgcolor="#f8f8f8" text="#000000" link="#4040f0" vlink="#404040" alink="#ff0000">
4 <table border=0 width=100% bgcolor="#d0d0d0"><tr>
5 <td width=100% align=center valign=center><table border=0 width=100%><tr>
6 <td align="left" valign=center bgcolor="#d0efff"><font color="#6060e0" size="6">
7 <b>GXemul:</b></font>&nbsp;&nbsp;
8 <font color="#000000" size="6"><b>Dynamic Translation</b>
9 </font></td></tr></table></td></tr></table><p>
10
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41
42 <a href="./">Back to the index</a>
43
44 <p><br>
45 <h2>Dynamic Translation</h2>
46
47 <p>
48 <ul>
49 <li><a href="#staticvsdynamic">Static vs. dynamic</a>
50 <li><a href="#ir">Executable Intermediate Representation</a>
51 <li><a href="#performance">Performance</a>
52 <li><a href="#instrcomb">Instruction Combinations</a>
53 <li><a href="#native">Native Code Generation Back-ends</a>
54 </ul>
55
56
57
58
59 <p><br>
60 <a name="staticvsdynamic"></a>
61 <h3>Static vs. dynamic:</h3>
62
63 <p>In order to support guest operating systems, which can overwrite old
64 code pages in memory with new code, it is necessary to translate code
65 dynamically. It is not possible to do a "one-pass" (static) translation.
66 Self-modifying code and Just-in-Time compilers running inside
67 the emulator are other things that would not work with a static
68 translator. GXemul is a dynamic translator. However, it does not
69 necessarily translate into native code, like many other emulators.
70
71
72 <p><br>
73 <a name="ir"></a>
74 <h3>Executable Intermediate Representation:</h3>
75
76 <p>Dynamic translators usually translate from the emulated architecture
77 (e.g. MIPS) into a kind of <i>intermediate representation</i> (IR), and then
78 to native code (e.g. AMD64 or x86 code). Since one of my main goals for
79 GXemul is to keep everything as portable as possible, I have tried to make
80 sure that the IR is something which can be executed regardless of whether
81 the final step (translation from IR to native code) has been implemented
82 or not.
83
84 <p>The IR in GXemul consists of arrays of pointers to functions, and a few
85 arguments which are passed along to those functions. The functions are
86 implemented in either manually hand-coded C, or automatically generated C.
87 In any case, this is all statically linked into the GXemul binary at link
88 time.
89
90 <p>Here is a simplified diagram of how these arrays work.
91
92 <p><center><img src="simplified_dyntrans.png"></center>
93
94 <p>There is one instruction call slot for every possible program counter
95 location. In the MIPS case, instruction words are 32 bits in length,
96 and pages are (usually) 4 KB large, resulting in 1024 instruction call
97 slots. After the last of these instruction calls, there is an additional
98 call to a special "end of page" function (which doesn't count as an executed
99 instruction). This function switches to the first instruction
100 on the next virtual page (which might cause exceptions, etc).
101
102 <p>The complexity of individual instructions vary. A simple example of
103 what an instruction can look like is the MIPS <tt>addiu</tt> instruction:
104 <pre>
105 X(addiu)
106 {
107 reg(ic->arg[1]) = (int32_t)
108 ((int32_t)reg(ic->arg[0]) + (int32_t)ic->arg[2]);
109 }
110 </pre>
111
112 <p>It stores the result of a 32-bit addition of the register at arg[0]
113 with the immediate value arg[2] (treating both as signed 32-bit
114 integers) into register arg[1]. If the emulated CPU is a 64-bit CPU,
115 then this will store a correctly sign-extended value into arg[1].
116 If it is a 32-bit CPU, then only the lowest 32 bits will be stored,
117 and the high part ignored. <tt>X(addiu)</tt> is expanded to
118 <tt>mips_instr_addiu</tt> in the 64-bit case, and <tt>mips32_instr_addiu</tt>
119 in the 32-bit case. Both are compiled into the GXemul executable; no code
120 is created during run-time.
121
122
123 <p><br>
124 <a name="performance"></a>
125 <h3>Performance:</h3>
126
127 <p>The performance of using this kind of executable IR is obviously lower
128 than what can be achieved by emulators using native code generation, but
129 can be significantly higher than using a naive fetch-decode-execute
130 interpretation loop. In my opinion, using an executable IR is an interesting
131 compromise.
132
133 <p>The overhead per emulated instruction is usually around or below
134 approximately 10 host instructions. This is very much dependent on your
135 host architecture and what compiler and compiler switches you are using.
136 Added to this instruction count is (of course) also the C code used to
137 implement each specific instruction.
138
139
140 <p><br>
141 <a name="instrcomb"></a>
142 <h3>Instruction Combinations:</h3>
143
144 <p>Short, common instruction sequences can sometimes be replaced by a
145 "compound" instruction. An example could be a compare instruction followed
146 by a conditional branch instruction. The advantages of instruction
147 combinations are that
148 <ul>
149 <li>the amortized overhead per instruction is slightly reduced, and
150 <p>
151 <li>the host's compiler can make a good job at optimizing the common
152 instruction sequence.
153 </ul>
154
155 <p>The special cases where instruction combinations give the most gain
156 are in the cores of string/memory manipulation functions such as
157 <tt>memset()</tt> or <tt>strlen()</tt>. The core loop can then (at least
158 to some extent) be replaced by a native call to the equivalent function.
159
160 <p>The implementations of compound instructions still keep track of the
161 number of executed instructions, etc. When single-stepping, these
162 translations are invalidated, and replaced by normal instruction calls
163 (one per emulated instruction).
164
165
166 <p><br>
167 <a name="native"></a>
168 <h3>Native Code Generation Back-ends:</h3>
169
170 <p>In theory, it will be possible to implement native code generation,
171 similar to what is used in high-performance emulators such as <a
172 href="http://www.qemu.com/">QEMU</a>, as long as that generated code
173 abides to the C ABI on the host.
174
175 <p>However, since I wanted to make sure that GXemul works without such
176 native code back-ends, there are no implemented backends in this release.
177
178
179
180
181
182
183
184 </body>
185 </html>

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