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$Id: HISTORY,v 1.1421 2006/11/06 05:32:37 debug Exp $
20060816	Adding a framework for emulated/virtual timers (src/timer.c),
		using only setitimer().
		Rewriting the mc146818 to use the new timer framework.
20060817	Adding a call to gettimeofday() every now and then (once every
		second, at the moment) to resynch the timer if it drifts.
		Beginning to convert the ISA timer interrupt mechanism (8253
		and 8259) to use the new timer framework.
		Removing the -I command line option.
20060819	Adding the -I command line option again, with new semantics.
		Working on Footbridge timer interrupts; NetBSD/NetWinder and
		NetBSD/CATS now run at correct speed, but unfortunately with
		HUGE delays during bootup.
20060821	Some minor m68k updates. Adding the first instruction: nop. :)
		Minor Alpha emulation updates.
20060822	Adding a FreeBSD development specific YAMON environment
		variable ("khz") (as suggested by Bruce M. Simpson).
		Moving YAMON environment variable initialization from
		machine_evbmips.c into promemul/yamon.c, and adding some more
		variables.
		Continuing on the LCA PCI bus controller (for Alpha machines).
20060823	Continuing on the timer stuff: experimenting with MIPS count/
		compare interrupts connected to the timer framework.
20060825	Adding bogus SCSI commands 0x51 (SCSICDROM_READ_DISCINFO) and
		0x52 (SCSICDROM_READ_TRACKINFO) to the SCSI emulation layer,
		to allow NetBSD/pmax 4.0_BETA to be installed from CDROM.
		Minor updates to the LCA PCI controller.
20060827	Implementing a CHIP8 cpu mode, and a corresponding CHIP8
		machine, for fun. Disassembly support for all instructions,
		and most of the common instructions have been implemented: mvi,
		mov_imm, add_imm, jmp, rand, cls, sprite, skeq_imm, jsr,
		skne_imm, bcd, rts, ldr, str, mov, or, and, xor, add, sub,
		font, ssound, sdelay, gdelay, bogus skup/skpr, skeq, skne.
20060828	Beginning to convert the CHIP8 cpu in the CHIP8 machine to a
		(more correct) RCA 180x cpu. (Disassembly for all 1802
		instructions has been implemented, but no execution yet, and
		no 1805 extended instructions.)
20060829	Minor Alpha emulation updates.
20060830	Beginning to experiment a little with PCI IDE for SGI O2.
		Fixing the cursor key mappings for MobilePro 770 emulation.
		Fixing the LK201 warning caused by recent NetBSD/pmax.
		The MIPS R41xx standby, suspend, and hibernate instructions now
		behave like the RM52xx/MIPS32/MIPS64 wait instruction.
		Fixing dev_wdc so it calculates correct (64-bit) offsets before
		giving them to diskimage_access().
20060831	Continuing on Alpha emulation (OSF1 PALcode).
20060901	Minor Alpha updates; beginning on virtual memory pagetables.
		Removed the limit for max nr of devices (in preparation for
		allowing devices' base addresses to be changed during runtime).
		Adding a hack for MIPS [d]mfc0 select 0 (except the count
		register), so that the coproc register is simply copied.
		The MIPS suspend instruction now exits the emulator, instead
		of being treated as a wait instruction (this causes NetBSD/
		hpcmips to get correct 'halt' behavior).
		The VR41xx RTC now returns correct time.
		Connecting the VR41xx timer to the timer framework (fixed at
		128 Hz, for now).
		Continuing on SPARC emulation, adding more instructions:
		restore, ba_xcc, ble. The rectangle drawing demo works :)
		Removing the last traces of the old ENABLE_CACHE_EMULATION
		MIPS stuff (not usable with dyntrans anyway).
20060902	Splitting up src/net.c into several smaller files in its own
		subdirectory (src/net/).
20060903	Cleanup of the files in src/net/, to make them less ugly.
20060904	Continuing on the 'settings' subsystem.
		Minor progress on the SPARC emulation mode.
20060905	Cleanup of various things, and connecting the settings
		infrastructure to various subsystems (emul, machine, cpu, etc).
		Changing the lk201 mouse update routine to not rely on any
		emulated hardware framebuffer cursor coordinates, but instead
		always do (semi-usable) relative movements.
20060906	Continuing on the lk201 mouse stuff. Mouse behaviour with
		multiple framebuffers (which was working in Ultrix) is now
		semi-broken (but it still works, in a way).
		Moving the documentation about networking into its own file
		(networking.html), and refreshing it a bit. Adding an example
		of how to use ethernet frame direct-access (udp_snoop).
20060907	Continuing on the settings infrastructure.
20060908	Minor updates to SH emulation: for 32-bit emulation: delay
		slots and the 'jsr @Rn' instruction. I'm putting 64-bit SH5 on
		ice, for now.
20060909-10	Implementing some more 32-bit SH instructions. Removing the
		64-bit mode completely. Enough has now been implemented to run
		the rectangle drawing demo. :-)
20060912	Adding more SH instructions.
20060916	Continuing on SH emulation (some more instructions: div0u,
		div1, rotcl/rotcr, more mov instructions, dt, braf, sets, sett,
		tst_imm, dmuls.l, subc, ldc_rm_vbr, movt, clrt, clrs, clrmac).
		Continuing on the settings subsystem (beginning on reading/
		writing settings, removing bugs, and connecting more cpus to
		the framework).
20060919	More work on SH emulation; adding an ldc banked instruction,
		and attaching a 640x480 framebuffer to the Dreamcast machine
		mode (NetBSD/dreamcast prints the NetBSD copyright banner :-),
		and then panics).
20060920	Continuing on the settings subsystem.
20060921	Fixing the Footbridge timer stuff so that NetBSD/cats and
		NetBSD/netwinder boot up without the delays.
20060922	Temporarily hardcoding MIPS timer interrupt to 100 Hz. With
		'wait' support disabled, NetBSD/malta and Linux/malta run at
		correct speed.
20060923	Connecting dev_gt to the timer framework, so that NetBSD/cobalt
		runs at correct speed.
		Moving SH4-specific memory mapped registers into its own
		device (dev_sh4.c).
		Running with -N now prints "idling" instead of bogus nr of
		instrs/second (which isn't valid anyway) while idling.
20060924	Algor emulation should now run at correct speed.
		Adding disassembly support for some MIPS64 revision 2
		instructions: ext, dext, dextm, dextu.
20060926	The timer framework now works also when the MIPS wait
		instruction is used.
20060928	Re-implementing checks for coprocessor availability for MIPS
		cop0 instructions. (Thanks to Carl van Schaik for noticing the
		lack of cop0 availability checks.)
20060929	Implementing an instruction combination hack which treats
		NetBSD/pmax' idle loop as a wait-like instruction.
20060930	The ENTRYHI_R_MASK was missing in (at least) memory_mips_v2p.c,
		causing TLB lookups to sometimes succeed when they should have
		failed. (A big thank you to Juli Mallett for noticing the
		problem.)
		Adding disassembly support for more MIPS64 revision 2 opcodes
		(seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu,
		dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also
		implementing seb, seh, dsbh, dshd, and wsbh.
		Implementing an instruction combination hack for Linux/pmax'
		idle loop, similar to the NetBSD/pmax case.
20061001	Changing the NetBSD/sgimips install instructions to extract
		files from an iso image, instead of downloading them via ftp.
20061002	More-than-31-bit userland addresses in memory_mips_v2p.c were
		not actually working; applying a fix from Carl van Schaik to
		enable them to work + making some other updates (adding kuseg
		support).
		Fixing hpcmips (vr41xx) timer initialization.
		Experimenting with O(n)->O(1) reduction in the MIPS TLB lookup
		loop. Seems to work both for R3000 and non-R3000.
20061003	Continuing a little on SH emulation (adding more control
		registers; mini-cleanup of memory_sh.c).
20061004	Beginning on a dev_rtc, a clock/timer device for the test
		machines; also adding a demo, and some documentation.
		Fixing a bug in SH "mov.w @(disp,pc),Rn" (the result wasn't
		sign-extended), and adding the addc and ldtlb instructions.
20061005	Contining on SH emulation: virtual to physical address
		translation, and a skeleton exception mechanism.
20061006	Adding more SH instructions (various loads and stores, rte,
		negc, muls.w, various privileged register-move instructions).
20061007	More SH instructions: various move instructions, trapa, div0s,
		float, fdiv, ftrc.
		Continuing on dev_rtc; removing the rtc demo.
20061008	Adding a dummy Dreamcast PROM module. (Homebrew Dreamcast
		programs using KOS libs need this.)
		Adding more SH instructions: "stc vbr,rn", rotl, rotr, fsca,
		fmul, fadd, various floating-point moves, etc. A 256-byte
		demo for Dreamcast runs :-)
20061012	Adding the SH "lds Rm,pr" and bsr instructions.
20061013	More SH instructions: "sts fpscr,rn", tas.b, and some more
		floating point instructions, cmp/str, and more moves.
		Adding a dummy dev_pvr (Dreamcast graphics controller).
20061014	Generalizing the expression evaluator (used in the built-in
		debugger) to support parentheses and +-*/%^&|.
20061015	Removing the experimental tlb index hint code in
		mips_memory_v2p.c, since it didn't really have any effect.
20061017	Minor SH updates; adding the "sts pr,Rn", fcmp/gt, fneg,
		frchg, and some other instructions. Fixing missing sign-
		extension in an 8-bit load instruction.
20061019	Adding a simple dev_dreamcast_rtc.
		Implementing memory-mapped access to the SH ITLB/UTLB arrays.
20061021	Continuing on various SH and Dreamcast things: sh4 timers,
		debug messages for dev_pvr, fixing some virtual address
		translation bugs, adding the bsrf instruction.
		The NetBSD/dreamcast GENERIC_MD kernel now reaches userland :)
		Adding a dummy dev_dreamcast_asic.c (not really useful yet).
		Implementing simple support for Store Queues.
		Beginning on the PVR Tile Accelerator.
20061022	Generalizing the PVR framebuffer to support off-screen drawing,
		multiple bit-depths, etc. (A small speed penalty, but most
		likely worth it.)
		Adding more SH instructions (mulu.w, fcmp/eq, fsub, fmac,
		fschg, and some more); correcting bugs in "fsca" and "float".
20061024	Adding the SH ftrv (matrix * vector) instruction. Marcus
		Comstedt's "tatest" example runs :) (wireframe only).
		Correcting disassembly for SH floating point instructions that
		use the xd* registers.
		Adding the SH fsts instruction.
		In memory_device_dyntrans_access(), only the currently used
		range is now invalidated, and not the entire device range.
20061025	Adding a dummy AVR32 cpu mode skeleton.
20061026	Various Dreamcast updates; beginning on a Maple bus controller.
20061027	Continuing on the Maple bus. A bogus Controller, Keyboard, and
		Mouse can now be detected by NetBSD and KOS homebrew programs.
		Cleaning up the SH4 Timer Management Unit, and beginning on
		SH4 interrupts.
		Implementing the Dreamcast SYSASIC.
20061028	Continuing on the SYSASIC.
		Adding the SH fsqrt instruction.
		memory_sh.c now actually scans the ITLB.
		Fixing a bug in dev_sh4.c, related to associative writes into
		the memory-mapped UTLB array. NetBSD/dreamcast now reaches
		userland stably, and prints the "Terminal type?" message :-]
		Implementing enough of the Dreamcast keyboard to make NetBSD
		accept it for input.
		Enabling SuperH for stable (non-development) builds.
		Adding NetBSD/dreamcast to the documentation, although it
		doesn't support root-on-nfs yet.
20061029	Changing usleep(1) calls in the debugger to to usleep(10000)
		(according to Brian Foley, this makes GXemul run better on
		MacOS X).
		Making the Maple "Controller" do something (enough to barely
		interact with dcircus.elf).
20061030-31	Some progress on the PVR. More test programs start running (but
		with strange output).
		Various other SH4-related updates.
20061102	Various Dreamcast and SH4 updates; more KOS demos run now.
20061104	Adding a skeleton dev_mb8696x.c (the Dreamcast's LAN adapter).
20061105	Continuing on the MB8696x; NetBSD/dreamcast detects it as mbe0.
		Testing for the release.

==============  RELEASE 0.4.3  ==============


1 dpavlin 12 <html><head><title>Gavare's eXperimental Emulator:&nbsp;&nbsp;&nbsp;Introduction</title>
2     <meta name="robots" content="noarchive,nofollow,noindex"></head>
3 dpavlin 4 <body bgcolor="#f8f8f8" text="#000000" link="#4040f0" vlink="#404040" alink="#ff0000">
4     <table border=0 width=100% bgcolor="#d0d0d0"><tr>
5     <td width=100% align=center valign=center><table border=0 width=100%><tr>
6     <td align="left" valign=center bgcolor="#d0efff"><font color="#6060e0" size="6">
7 dpavlin 22 <b>Gavare's eXperimental Emulator:</b></font><br>
8 dpavlin 4 <font color="#000000" size="6"><b>Introduction</b>
9     </font></td></tr></table></td></tr></table><p>
10 dpavlin 2
11     <!--
12    
13 dpavlin 32 $Id: intro.html,v 1.100 2006/11/04 06:40:20 debug Exp $
14 dpavlin 2
15 dpavlin 22 Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
16 dpavlin 2
17     Redistribution and use in source and binary forms, with or without
18     modification, are permitted provided that the following conditions are met:
19    
20     1. Redistributions of source code must retain the above copyright
21     notice, this list of conditions and the following disclaimer.
22     2. Redistributions in binary form must reproduce the above copyright
23     notice, this list of conditions and the following disclaimer in the
24     documentation and/or other materials provided with the distribution.
25     3. The name of the author may not be used to endorse or promote products
26     derived from this software without specific prior written permission.
27    
28     THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
29     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30     IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31     ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
32     FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33     DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34     OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37     OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38     SUCH DAMAGE.
39    
40     -->
41    
42     <a href="./">Back to the index</a>
43    
44     <p><br>
45     <h2>Introduction</h2>
46    
47     <p>
48 dpavlin 22 <table border="0" width="99%"><tr><td valign="top" align="left">
49 dpavlin 2 <ul>
50     <li><a href="#overview">Overview</a>
51 dpavlin 4 <li><a href="#free">Is GXemul Free software?</a>
52 dpavlin 2 <li><a href="#build">How to compile/build the emulator</a>
53 dpavlin 6 <li><a href="#run">How to run the emulator</a>
54 dpavlin 22 <li><a href="#cpus">Which processor architectures does GXemul emulate?</a>
55 dpavlin 24 <li><a href="#hosts">Which host architectures are supported?</a>
56     <li><a href="#translation">What kind of translation does GXemul use?</a>
57 dpavlin 2 <li><a href="#accuracy">Emulation accuracy</a>
58     <li><a href="#emulmodes">Which machines does GXemul emulate?</a>
59     </ul>
60 dpavlin 22 </td><td valign="center" align="center">
61     <a href="20050317-example.png"><img src="20050317-example_small.png"></a>
62     <p>NetBSD/pmax 1.6.2 with X11<br>running in GXemul</td></tr></table>
63 dpavlin 2
64    
65    
66    
67     <p><br>
68     <a name="overview"></a>
69     <h3>Overview:</h3>
70    
71 dpavlin 14 GXemul is an experimental instruction-level machine emulator. Several
72     emulation modes are available. In some modes, processors and surrounding
73     hardware components are emulated well enough to let unmodified operating
74     systems (e.g. NetBSD) run as if they were running on a real machine.
75 dpavlin 2
76 dpavlin 32 <p>Devices and processors are not simulated with 100% accuracy. They are
77     only ``faked'' well enough to allow guest operating systems to run without
78     complaining too much. Still, the emulator could be of interest for
79     academic research and experiments, such as when learning how to write
80     operating system code.
81 dpavlin 12
82 dpavlin 22 <p>The emulator is written in C, does not depend on third-party libraries,
83     and should compile and run on most 64-bit and 32-bit Unix-like systems.
84 dpavlin 2
85 dpavlin 10 <p>The emulator contains code which tries to emulate the workings of CPUs
86     and surrounding hardware found in real machines, but it does not contain
87     any ROM code. You will need some form of program (in binary form) to run
88     in the emulator. For many emulation modes, PROM calls are handled by the
89 dpavlin 2 emulator itself, so you do not need to use any ROM image at all.
90    
91 dpavlin 10 <p>You can use pre-compiled kernels (for example NetBSD kernels, or
92     Linux), or other programs that are in binary format, and in some cases
93     even actual ROM images. A couple of different file formats are supported
94     (ELF, a.out, ECOFF, SREC, and raw binaries).
95 dpavlin 2
96 dpavlin 10 <p>If you do not have a kernel as a separate file, but you have a bootable
97 dpavlin 6 disk image, then it is sometimes possible to boot directly from that
98     image. (This works for example with DECstation emulation, or when booting
99     from ISO9660 CDROM images.)
100 dpavlin 2
101 dpavlin 32 <p>Thanks to (in no specific order) Joachim Buss, Olivier Houchard, Juli
102     Mallett, Juan Romero Pardines, Alec Voropay, Göran Weinholt, Alexander
103     Yurchenko, and everyone else who has provided me with feedback.
104 dpavlin 2
105    
106    
107 dpavlin 6
108    
109 dpavlin 10
110    
111 dpavlin 2 <p><br>
112     <a name="free"></a>
113 dpavlin 4 <h3>Is GXemul Free software?</h3>
114 dpavlin 2
115 dpavlin 6 Yes. I have released GXemul under a Free license. The code in GXemul is
116     Copyrighted software, it is <i>not</i> public domain. (If this is
117     confusing to you, you might want to read up on the definitions of the
118     four freedoms associated with Free software, <a
119     href="http://www.gnu.org/philosophy/free-sw.html">http://www.gnu.org/philosophy/free-sw.html</a>.)
120 dpavlin 2
121 dpavlin 12 <p>The code I have written is released under a 3-clause BSD-style license
122     (or "revised BSD-style" if one wants to use <a
123     href="http://www.gnu.org/philosophy/bsd.html">GNU jargon</a>). Apart from
124     the code I have written, some files are copied from other sources such as
125     NetBSD, for example header files containing symbolic names of bitfields in
126     device registers. They are also covered by similar licenses, but with some
127     additional clauses. The main point, however, is that the licenses require
128     that the original Copyright and license terms are included when you make a
129     copy or modification.
130 dpavlin 2
131 dpavlin 12 <p>If you plan to redistribute GXemul <i>without</i> supplying the source
132     code, then you need to comply with each individual source file some other
133     way, for example by writing additional documentation containing copyright
134     notes. I have not done this, since I do not plan on making distributions
135     without source code. You need to check all individual files for details.
136     The "easiest way out" if you plan to redistribute code from GXemul is, of
137     course, to let it remain open source and simply supply the source code.
138 dpavlin 2
139 dpavlin 22 <p>In case you want to reuse parts of GXemul, but you need to do that
140     under a different license (e.g. the GPL), then contact me and I might
141     re-license/dual-license files on a case-by-case basis.
142 dpavlin 2
143    
144    
145    
146 dpavlin 12
147 dpavlin 2 <p><br>
148     <a name="build"></a>
149     <h3>How to compile/build the emulator:</h3>
150    
151     Uncompress the .tar.gz distribution file, and run
152     <pre>
153     $ <b>./configure</b>
154     $ <b>make</b>
155     </pre>
156    
157 dpavlin 22 <p>This should work on most Unix-like systems. GXemul does not require any
158     specific libraries to build, however, if you build on a system which does
159     not have X11 libraries installed, some functionality will be lost.
160 dpavlin 2
161 dpavlin 12 <p>The emulator's performance is highly dependent on both runtime settings
162 dpavlin 2 and on compiler settings, so you might want to experiment with different
163 dpavlin 20 CC and CFLAGS environment variable values. For example, on an AMD Athlon
164 dpavlin 24 host, you might want to try setting <tt>CFLAGS</tt> to <tt>-march=athlon</tt>
165     before running <tt>configure</tt>.
166 dpavlin 2
167    
168 dpavlin 6
169    
170    
171    
172    
173     <p><br>
174     <a name="run"></a>
175     <h3>How to run the emulator:</h3>
176    
177     Once you have built GXemul, running it should be rather straight-forward.
178     Running <tt><b>gxemul</b></tt> without arguments (or with the
179     <b><tt>-h</tt></b> or <b><tt>-H</tt></b> command line options) will
180     display a help message.
181    
182 dpavlin 2 <p>
183 dpavlin 6 To get some ideas about what is possible to run in the emulator, please
184     read the section about <a href="guestoses.html">installing "guest"
185     operating systems</a>. If you are interested in using the emulator to
186     develop code on your own, then you should also read the section about
187     <a href="experiments.html#hello">Hello World</a>.
188    
189     <p>
190 dpavlin 2 To exit the emulator, type CTRL-C to enter the
191 dpavlin 6 single-step debugger, and then type <tt><b>quit</b></tt>.
192 dpavlin 2
193 dpavlin 4 <p>
194     If you are starting an emulation by entering settings directly on the
195 dpavlin 6 command line, and you are not using the <tt><b>-x</b></tt> option, then all
196 dpavlin 4 terminal input and output will go to the main controlling terminal.
197     CTRL-C is used to break into the debugger, so in order to send CTRL-C to
198     the running (emulated) program, you may use CTRL-B.
199 dpavlin 6 (This should be a reasonable compromise to allow the emulator to be usable
200     even on systems without X Windows.)
201 dpavlin 2
202 dpavlin 4 <p>
203 dpavlin 6 There is no way to send an actual CTRL-B to the emulated program, when
204     typing in the main controlling terminal window. The solution is to either
205     use <a href="configfiles.html">configuration files</a>, or use
206     <tt><b>-x</b></tt>. Both these solutions cause new xterms to be opened for
207     each emulated serial port that is written to. CTRL-B and CTRL-C both have
208     their original meaning in those xterm windows.
209 dpavlin 2
210    
211    
212    
213 dpavlin 4
214 dpavlin 2 <p><br>
215     <a name="cpus"></a>
216 dpavlin 22 <h3>Which processor architectures does GXemul emulate?</h3>
217 dpavlin 2
218 dpavlin 24 The architectures that are emulated well enough to let at least one
219 dpavlin 32 guest operating system run (per architecture) are ARM, MIPS, PowerPC,
220     and SuperH.
221 dpavlin 2
222    
223    
224    
225 dpavlin 14
226 dpavlin 32
227 dpavlin 24 <p><br>
228     <a name="hosts"></a>
229     <h3>Which host architectures are supported?</h3>
230 dpavlin 2
231 dpavlin 32 GXemul should compile and run on any modern host architecture (64-bit or
232     32-bit word-length).
233 dpavlin 2
234 dpavlin 32 <p>(The dynamic translation engine translates into an intermediate
235     representation, but not currently into native code. This means that there
236     is no need for per-host architecture backend code.)
237 dpavlin 6
238 dpavlin 2
239    
240    
241 dpavlin 32
242 dpavlin 24 <p><br>
243     <a name="translation"></a>
244     <h3>What kind of translation does GXemul use?</h3>
245 dpavlin 2
246 dpavlin 24 <b>Static vs. dynamic:</b>
247    
248     <p>In order to support guest operating systems, which can overwrite old
249     code pages in memory with new code, it is necessary to translate code
250     dynamically. It is not possible to do a "one-pass" (static) translation.
251     Self-modifying code and Just-in-Time compilers running inside
252     the emulator are other things that would not work with a static
253     translator. GXemul is a dynamic translator. However, it does not
254     necessarily translate into native code, like many other emulators.
255    
256     <p><b>"Runnable" Intermediate Representation:</b>
257    
258     <p>Dynamic translators usually translate from the emulated architecture
259     (e.g. MIPS) into a kind of <i>intermediate representation</i> (IR), and then
260     to native code (e.g. AMD64 or x86 code). Since one of my main goals for
261     GXemul is to keep everything as portable as possible, I have tried to make
262     sure that the IR is something which can be executed regardless of whether
263     the final step (translation from IR to native code) has been implemented
264     or not.
265    
266     <p>The IR in GXemul consists of arrays of pointers to functions, and a few
267     arguments which are passed along to those functions. The functions are
268     implemented in either manually hand-coded C, or automatically generated C.
269     In any case, this is all statically linked into the GXemul binary at link
270     time.
271    
272     <p>Here is a simplified diagram of how these arrays work.
273    
274     <p><center><img src="simplified_dyntrans.png"></center>
275    
276     <p>There is one instruction call slot for every possible program counter
277     location. In the MIPS case, instruction words are 32 bits in length,
278     and pages are (usually) 4 KB large, resulting in 1024 instruction call
279     slots. After the last of these instruction calls, there is an additional
280     call to a special "end of page" function (which doesn't count as an executed
281     instruction). This function switches to the first instruction
282     on the next virtual page (which might cause exceptions, etc).
283    
284     <p>The complexity of individual instructions vary. A simple example of
285     what an instruction can look like is the MIPS <tt>addiu</tt> instruction:
286     <pre>
287     X(addiu)
288     {
289     reg(ic->arg[1]) = (int32_t)
290     ((int32_t)reg(ic->arg[0]) + (int32_t)ic->arg[2]);
291     }
292     </pre>
293    
294     <p>It stores the result of a 32-bit addition of the register at arg[0]
295     with the immediate value arg[2] (treating both as signed 32-bit
296     integers) into register arg[1]. If the emulated CPU is a 64-bit CPU,
297     then this will store a correctly sign-extended value into arg[1].
298     If it is a 32-bit CPU, then only the lowest 32 bits will be stored,
299     and the high part ignored. <tt>X(addiu)</tt> is expanded to
300     <tt>mips_instr_addiu</tt> in the 64-bit case, and <tt>mips32_instr_addiu</tt>
301     in the 32-bit case. Both are compiled into the GXemul executable; no code
302     is created during run-time.
303    
304     <p>Here are examples of what the <tt>addiu</tt> instruction actually
305     looks like when it is compiled, on various host architectures:
306    
307     <p><center><table border="0">
308     <tr><td><b>GCC 4.0.1 on Alpha:</b></td>
309     <td width="35"></td><td></td>
310     <tr>
311     <td valign="top">
312     <pre>mips_instr_addiu:
313     ldq t1,8(a1)
314     ldq t2,24(a1)
315     ldq t3,16(a1)
316     ldq t0,0(t1)
317     addl t0,t2,t0
318     stq t0,0(t3)
319     ret</pre>
320     </td>
321     <td></td>
322     <td valign="top">
323     <pre>mips32_instr_addiu:
324     ldq t2,8(a1)
325     ldq t0,24(a1)
326     ldq t3,16(a1)
327     ldl t1,0(t2)
328     addq t0,t1,t0
329     stl t0,0(t3)
330     ret</pre>
331     </td>
332     </tr>
333    
334     <tr><td><b><br>GCC 3.4.4 on AMD64:</b></td>
335     <tr>
336     <td valign="top">
337     <pre>mips_instr_addiu:
338     mov 0x8(%rsi),%rdx
339     mov 0x18(%rsi),%rax
340     mov 0x10(%rsi),%rcx
341     add (%rdx),%eax
342     cltq
343     mov %rax,(%rcx)
344     retq</pre>
345     </td>
346     <td></td>
347     <td valign="top">
348     <pre>mips32_instr_addiu:
349     mov 0x8(%rsi),%rcx
350     mov 0x10(%rsi),%rdx
351     mov (%rcx),%eax
352     add 0x18(%rsi),%eax
353     mov %eax,(%rdx)
354     retq</pre>
355     </td>
356     </tr>
357    
358     <tr><td><b><br>GCC 4.0.1 on i386:</b></td>
359     <tr>
360     <td valign="top">
361     <pre>mips_instr_addiu:
362     mov 0x8(%esp),%eax
363     mov 0x8(%eax),%ecx
364     mov 0x4(%eax),%edx
365     mov 0xc(%eax),%eax
366     add (%edx),%eax
367     mov %eax,(%ecx)
368     cltd
369     mov %edx,0x4(%ecx)
370     ret</pre>
371     </td>
372     <td></td>
373     <td valign="top">
374     <pre>mips32_instr_addiu:
375     mov 0x8(%esp),%eax
376     mov 0x8(%eax),%ecx
377     mov 0x4(%eax),%edx
378     mov 0xc(%eax),%eax
379     add (%edx),%eax
380     mov %eax,(%ecx)
381     ret</pre>
382     </td>
383     </tr>
384     </table></center>
385    
386     <p>On 64-bit hosts, there is not much difference, but on 32-bit hosts (and
387     to some extent on AMD64), the difference is enough to make it worthwhile.
388    
389    
390     <p><b>Performance:</b>
391    
392     <p>The performance of using this kind of runnable IR is obviously lower
393     than what can be achieved by emulators using native code generation, but
394     can be significantly higher than using a naive fetch-decode-execute
395     interpretation loop. In my opinion, using a runnable IR is an interesting
396     compromise.
397    
398     <p>The overhead per emulated instruction is usually around or below
399     approximately 10 host instructions. This is very much dependent on your
400     host architecture and what compiler and compiler switches you are using.
401     Added to this instruction count is (of course) also the C code used to
402     implement each specific instruction.
403    
404     <p><b>Instruction Combinations:</b>
405    
406     <p>Short, common instruction sequences can sometimes be replaced by a
407     "compound" instruction. An example could be a compare instruction followed
408     by a conditional branch instruction. The advantages of instruction
409     combinations are that
410     <ul>
411     <li>the amortized overhead per instruction is slightly reduced, and
412     <p>
413     <li>the host's compiler can make a good job at optimizing the common
414     instruction sequence.
415     </ul>
416    
417     <p>The special cases where instruction combinations give the most gain
418     are in the cores of string/memory manipulation functions such as
419     <tt>memset()</tt> or <tt>strlen()</tt>. The core loop can then (at least
420     to some extent) be replaced by a native call to the equivalent function.
421    
422     <p>The implementations of compound instructions still keep track of the
423     number of executed instructions, etc. When single-stepping, these
424     translations are invalidated, and replaced by normal instruction calls
425     (one per emulated instruction).
426    
427     <p><b>Native Code Back-ends: (not in this release)</b>
428    
429     <p>In theory, it will be possible to implement native code generation
430     (similar to what is used in high-performance emulators such as QEMU),
431     as long as that generated code abides to the C ABI on the host, but
432     for now I wanted to make sure that GXemul works without such native
433 dpavlin 32 code back-ends. For this reason, since release 0.4.0, GXemul is
434 dpavlin 24 completely free of native code back-ends.
435    
436    
437    
438    
439    
440    
441 dpavlin 2 <p><br>
442     <a name="accuracy"></a>
443     <h3>Emulation accuracy:</h3>
444    
445 dpavlin 6 GXemul is an instruction-level emulator; things that would happen in
446 dpavlin 24 several steps within a real CPU are not taken into account (e.g. pipe-line
447 dpavlin 6 stalls or out-of-order execution). Still, instruction-level accuracy seems
448     to be enough to be able to run complete guest operating systems inside the
449 dpavlin 2 emulator.
450    
451 dpavlin 24 <p>The existance of instruction and data caches is "faked" to let
452     operating systems think that they are there, but for all practical
453     purposes, these caches are non-working.
454 dpavlin 2
455 dpavlin 32 <p>The emulator is in general <i>not</i> timing-accurate, neither at the
456     instruction level nor on any higher level. An attempt is made to let
457     emulated clocks run at the same speed as the host (i.e. an emulated timer
458     running at 100 Hz will interrupt around 100 times per real second), but
459     since the host speed may vary, e.g. because of other running processes,
460     there is no guarantee as to how many instructions will be executed in
461     each of these 100 Hz cycles.
462 dpavlin 2
463 dpavlin 32 <p>If the host is very slow, the emulated clocks might even lag behind
464     the real-world clock.
465 dpavlin 2
466    
467 dpavlin 6
468    
469 dpavlin 20
470    
471 dpavlin 2 <p><br>
472     <a name="emulmodes"></a>
473     <h3>Which machines does GXemul emulate?</h3>
474    
475 dpavlin 4 A few different machine types are emulated. The following machine types
476     are emulated well enough to run at least one "guest OS":
477 dpavlin 2
478     <p>
479     <ul>
480 dpavlin 24 <li><b><u>ARM</u></b>
481 dpavlin 14 <ul>
482 dpavlin 28 <li><b>CATS</b> (<a href="guestoses.html#netbsdcatsinstall">NetBSD/cats</a>,
483     <a href="guestoses.html#openbsdcatsinstall">OpenBSD/cats</a>)
484     <li><b>IQ80321</b> (<a href="guestoses.html#netbsdevbarminstall">NetBSD/evbarm</a>)
485 dpavlin 30 <li><b>NetWinder</b> (<a href="guestoses.html#netbsdnetwinderinstall">NetBSD/netwinder</a>)
486 dpavlin 14 </ul>
487     <p>
488 dpavlin 24 <li><b><u>MIPS</u></b>
489 dpavlin 14 <ul>
490 dpavlin 28 <li><b>DECstation 5000/200</b> (<a href="guestoses.html#netbsdpmaxinstall">NetBSD/pmax</a>,
491     <a href="guestoses.html#openbsdpmaxinstall">OpenBSD/pmax</a>,
492     <a href="guestoses.html#ultrixinstall">Ultrix</a>,
493     <a href="guestoses.html#declinux">Linux/DECstation</a>,
494     <a href="guestoses.html#sprite">Sprite</a>)
495     <li><b>Acer Pica-61</b> (<a href="guestoses.html#netbsdarcinstall">NetBSD/arc</a>)
496 dpavlin 32 <li><b>NEC MobilePro 770, 780, 800, 880</b> (<a href="guestoses.html#netbsdhpcmipsinstall">NetBSD/hpcmips</a>)
497 dpavlin 28 <li><b>Cobalt</b> (<a href="guestoses.html#netbsdcobaltinstall">NetBSD/cobalt</a>)
498     <li><b>Malta</b> (<a href="guestoses.html#netbsdevbmipsinstall">NetBSD/evbmips</a>)
499 dpavlin 30 <li><b>Algorithmics P5064</b> (<a href="guestoses.html#netbsdalgorinstall">NetBSD/algor</a>)
500 dpavlin 32 <li><b>SGI O2 (aka IP32)</b> <font color="#0000e0">(<super>*1</super>)</font>
501 dpavlin 28 (<a href="guestoses.html#netbsdsgimips">NetBSD/sgi</a>)
502 dpavlin 14 </ul>
503 dpavlin 20 <p>
504     <li><b><u>PowerPC</u></b>
505     <ul>
506 dpavlin 28 <li><b>IBM 6050/6070 (PReP, PowerPC Reference Platform)</b> (<a href="guestoses.html#netbsdprepinstall">NetBSD/prep</a>)
507 dpavlin 20 </ul>
508 dpavlin 32 <p>
509     <li><b><u>SuperH</u></b>
510     <ul>
511     <li><b>Sega Dreamcast</b>
512     <font color="#0000e0">(<super>*2</super>)</font>
513     (<a href="guestoses.html#netbsddreamcast">NetBSD/dreamcast</a>)
514     </ul>
515 dpavlin 2 </ul>
516    
517 dpavlin 32 <p>
518     <small><font color="#0000e0">(<super>*1</super>)</font> =
519     Enough for root-on-nfs, but not for disk boot.</small>
520     <br><small><font color="#0000e0">(<super>*2</super>)</font> =
521     Only enough to reach ramdisk userland; no root-on-nfs yet.</small>
522 dpavlin 22
523 dpavlin 10 <p>There is code in GXemul for emulation of many other machine types; the
524     degree to which these work range from almost being able to run a complete
525     OS, to almost completely unsupported (perhaps just enough support to
526     output a few boot messages via serial console).
527 dpavlin 2
528 dpavlin 10 <p>In addition to emulating real machines, there is also a "test-machine".
529     A test-machine consists of one or more CPUs and a few experimental devices
530     such as:
531 dpavlin 2
532     <p>
533     <ul>
534     <li>a console I/O device (putchar() and getchar()...)
535     <li>an inter-processor communication device, for SMP experiments
536     <li>a very simple linear framebuffer device (for graphics output)
537 dpavlin 32 <li>a simple disk controller
538 dpavlin 12 <li>a simple ethernet controller
539 dpavlin 32 <li>a real-time clock device
540 dpavlin 2 </ul>
541    
542 dpavlin 10 <p>This mode is useful if you wish to run experimental code, but do not
543 dpavlin 2 wish to target any specific real-world machine type, for example for
544     educational purposes.
545    
546 dpavlin 10 <p>You can read more about these experimental devices <a
547     href="experiments.html#expdevices">here</a>.
548 dpavlin 2
549    
550    
551    
552    
553    
554     </body>
555     </html>

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