/[gxemul]/trunk/doc/experiments.html
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Contents of /trunk/doc/experiments.html

Parent Directory Parent Directory | Revision Log Revision Log


Revision 34 - (show annotations)
Mon Oct 8 16:21:17 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/html
File size: 18055 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029	Changing usleep(1) calls in the debugger to usleep(10000)
20061107	Adding a new disk image option (-d o...) which sets the ISO9660
		filesystem base offset; also making some other hacks to allow
		NetBSD/dreamcast and homebrew demos/games to boot directly
		from a filesystem image.
		Moving Dreamcast-specific stuff in the documentation to its
		own page (dreamcast.html).
		Adding a border to the Dreamcast PVR framebuffer.
20061108	Adding a -T command line option (again?), for halting the
		emulator on unimplemented memory accesses.
20061109	Continuing on various SH4 and Dreamcast related things.
		The emulator should now halt on more unimplemented device
		accesses, instead of just printing a warning, forcing me to
		actually implement missing stuff :)
20061111	Continuing on SH4 and Dreamcast stuff.
		Adding a bogus Landisk (SH4) machine mode.
20061112	Implementing some parts of the Dreamcast GDROM device. With
		some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113	NetBSD/dreamcast now starts booting from the Live CD image,
		but crashes randomly quite early on in the boot process.
20061122	Beginning on a skeleton interrupt.h and interrupt.c for the
		new interrupt subsystem.
20061124	Continuing on the new interrupt system; taking the first steps
		to attempt to connect CPUs (SuperH and MIPS) and devices
		(dev_cons and SH4 timer interrupts) to it. Many things will
		probably break from now on.
20061125	Converting dev_ns16550, dev_8253 to the new interrupt system.
		Attempting to begin to convert the ISA bus.
20061130	Incorporating a patch from Brian Foley for the configure
		script, which checks for X11 libs in /usr/X11R6/lib64 (which
		is used on some Linux systems).
20061227	Adding a note in the man page about booting from Dreamcast
		CDROM images (i.e. that no external kernel is needed).
20061229	Continuing on the interrupt system rewrite: beginning to
		convert more devices, adding abort() calls for legacy interrupt
		system calls so that everything now _has_ to be rewritten!
		Almost all machine modes are now completely broken.
20061230	More progress on removing old interrupt code, mostly related
		to the ISA bus + devices, the LCA bus (on AlphaBook1), and
		the Footbridge bus (for CATS). And some minor PCI stuff.
		Connecting the ARM cpu to the new interrupt system.
		The CATS, NetWinder, and QEMU_MIPS machine modes now work with
		the new interrupt system :)
20061231	Connecting PowerPC CPUs to the new interrupt system.
		Making PReP machines (IBM 6050) work again.
		Beginning to convert the GT PCI controller (for e.g. Malta
		and Cobalt emulation). Some things work, but not everything.
		Updating Copyright notices for 2007.
20070101	Converting dev_kn02 from legacy style to devinit; the 3max
		machine mode now works with the new interrupt system :-]
20070105	Beginning to convert the SGI O2 machine to the new interrupt
		system; finally converting O2 (IP32) devices to devinit, etc.
20070106	Continuing on the interrupt system redesign/rewrite; KN01
		(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
		moving out stuff from machine.h and devices.h into the
		corresponding devices, beginning the rewrite of i80321
		interrupts, etc.
20070107	Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117	Beginning the rewrite of Algor (V3) interrupts (finally
		changing dev_v3 into devinit style).
20070118	Removing the "bus" registry concept from machine.h, because
		it was practically meaningless.
		Continuing on the rewrite of Algor V3 ISA interrupts.
20070121	More work on Algor interrupts; they are now working again,
		well enough to run NetBSD/algor. :-)
20070122	Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
		can be installed using the new interrupt system :-)
20070123	Making the testmips mode work with the new interrupt system.
20070127	Beginning to convert DEC5800 devices to devinit, and to the
		new interrupt system.
		Converting Playstation 2 devices to devinit, and converting
		the interrupt system. Also fixing a severe bug: the interrupt
		mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128	Removing the dummy NetGear machine mode and the 8250 device
		(which was only used by the NetGear machine).
		Beginning to convert the MacPPC GC (Grand Central) interrupt
		controller to the new interrupt system.
		Converting Jazz interrupts (PICA61 etc.) to the new interrupt
		system. NetBSD/arc can be installed again :-)
		Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
		NetBSD and it is better than a completely dummy timer as it
		was before).
		Converting dev_mp to the new interrupt system, although I
		haven't had time to actually test it yet.
		Completely removing src/machines/interrupts.c, cpu_interrupt
		and cpu_interrupt_ack in src/cpu.c, and
		src/include/machine_interrupts.h! Adding fatal error messages
		+ abort() in the few places that are left to fix.
		Converting dev_z8530 to the new interrupt system.
		FINALLY removing the md_int struct completely from the
		machine struct.
		SH4 fixes (adding a PADDR invalidation in the ITLB replacement
		code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
		all the way to the login prompt, and can be interacted with :-)
		Converting the CPC700 controller (PCI and interrupt controller
		for PM/PPC) to the new interrupt system.
20070129	Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
		sgimips' and OpenBSD/sgi's ramdisk kernels can now be
		interacted with again.
20070130	Moving out the MIPS multi_lw and _sw instruction combinations
		so that they are auto-generated at compile time instead.
20070131	Adding detection of amd64/x86_64 hosts in the configure script,
		for doing initial experiments (again :-) with native code
		generation.
		Adding a -k command line option to set the size of the dyntrans
		cache, and a -B command line option to disable native code
		generation, even if GXemul was compiled with support for
		native code generation for the specific host CPU architecture.
20070201	Experimenting with a skeleton for native code generation.
		Changing the default behaviour, so that native code generation
		is now disabled by default, and has to be enabled by using
		-b on the command line.
20070202	Continuing the native code generation experiments.
		Making PCI interrupts work for Footbridge again.
20070203	More native code generation experiments.
		Removing most of the native code generation experimental code,
		it does not make sense to include any quick hacks like this.
		Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204	Making i80321 interrupts work again (for NetBSD/evbarm etc.),
		and fixing the timer at 100 Hz.
20070206	Experimenting with removing the wdc interrupt slowness hack.
20070207	Lowering the number of dyntrans TLB entries for MIPS from
		192 to 128, resulting in a minor speed improvement.
		Minor optimization to the code invalidation routine in
		cpu_dyntrans.c.
20070208	Increasing (experimentally) the nr of dyntrans instructions per
		loop from 60 to 120.
20070210	Commenting out (experimentally) the dyntrans_device_danger
		detection in memory_rw.c.
		Changing the testmips and baremips machines to use a revision 2
		MIPS64 CPU by default, instead of revision 1.
		Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
		files, the PC bios emulation, and the Olivetti M700 (ARC) and
		db64360 emulation modes.
20070211	Adding an "mp" demo to the demos directory, which tests the
		SMP functionality of the testmips machine.
		Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216	Adding a "nop workaround" for booting Mach/PMAX to the
		documentation; thanks to Artur Bujdoso for the values.
		Converting more of the MacPPC interrupt stuff to the new
		system.
		Beginning to convert BeBox interrupts to the new system.
		PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
		Correcting BeBox clock speed (it was set to 100 in the NetBSD
		bootinfo block, but should be 33000000/4), allowing NetBSD
		to start without using the (incorrect) PPC_NO_DEC hack.
20070217	Implementing (slow) AltiVec vector loads and stores, allowing
		NetBSD/macppc to finally boot using the GENERIC kernel :-)
		Updating the documentation with install instructions for
		NetBSD/macppc.
20070218-19	Regression testing for the release.

==============  RELEASE 0.4.4  ==============


1 <html><head><title>Gavare's eXperimental Emulator:&nbsp;&nbsp;&nbsp;Experimenting with GXemul</title>
2 <meta name="robots" content="noarchive,nofollow,noindex"></head>
3 <body bgcolor="#f8f8f8" text="#000000" link="#4040f0" vlink="#404040" alink="#ff0000">
4 <table border=0 width=100% bgcolor="#d0d0d0"><tr>
5 <td width=100% align=center valign=center><table border=0 width=100%><tr>
6 <td align="left" valign=center bgcolor="#d0efff"><font color="#6060e0" size="6">
7 <b>Gavare's eXperimental Emulator:</b></font><br>
8 <font color="#000000" size="6"><b>Experimenting with GXemul</b>
9 </font></td></tr></table></td></tr></table><p>
10
11 <!--
12
13 $Id: experiments.html,v 1.105 2006/12/30 13:30:50 debug Exp $
14
15 Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
16
17 Redistribution and use in source and binary forms, with or without
18 modification, are permitted provided that the following conditions are met:
19
20 1. Redistributions of source code must retain the above copyright
21 notice, this list of conditions and the following disclaimer.
22 2. Redistributions in binary form must reproduce the above copyright
23 notice, this list of conditions and the following disclaimer in the
24 documentation and/or other materials provided with the distribution.
25 3. The name of the author may not be used to endorse or promote products
26 derived from this software without specific prior written permission.
27
28 THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
29 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
32 FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 SUCH DAMAGE.
39
40 -->
41
42 <a href="./">Back to the index</a>
43
44 <p><br>
45 <h2>Experimenting with GXemul</h2>
46
47 <p>
48 <ul>
49 <li><a href="#hello">Hello world</a>
50 <li><a href="#expdevices">Experimental devices</a>
51 </ul>
52
53
54
55
56
57
58 <p><br>
59 <a name="hello"></a>
60 <h3>Hello world:</h3>
61
62 You might want to use the emulator to develop programs on your own,
63 not just run precompiled kernels such as NetBSD. To get started, I recommend
64 that you do two things:
65
66 <p>
67 <ul>
68 <li>Build and install a cross-compiler for your chosen target.
69 GCC is usually a good compiler choice, because it is portable
70 and in wide-spread use. (Other compilers should work too.)
71
72 <p>
73 <li>Compile the Hello World demo program for your chosen target, and run
74 it in the emulator.
75 </ul>
76
77 <p>The Hello World demo program is included in the GXemul source
78 code distribution, in the <a href="../demos/hello/"><tt>demos/hello/</tt></a>
79 subdirectory. The README files in the demo directories have several
80 examples of how the demo programs can be built.
81
82 <p>Hopefully this is enough to get you inspired. :-)
83
84
85
86
87
88
89 <p><br>
90 <a name="expdevices"></a>
91 <h3>Experimental devices:</h3>
92
93 The emulator has several modes where it doesn't emulate any real machine.
94 It can either run in "bare" mode, where no devices are included by default
95 (just the CPU), or in a "test" mode where some simple devices are
96 emulated.
97
98 <p>The test machines (<tt>testmips</tt>, <tt>testppc</tt>, etc) have the
99 following experimental devices:
100
101 <p>
102 <center><table border="0" width="80%">
103
104 <tr>
105 <td align="left" valign="top" width="200">
106 <a name="expdevices_cons"><b><tt>cons</tt>:</b></a>
107 <p>A simple console device, for writing
108 characters to the controlling terminal
109 and receiving keypresses.
110 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_cons.c</tt></font>
111 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_cons.h</tt></font>
112 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x10000000</font>
113 </td>
114 <td align="left" valign="top" width="25">&nbsp;</td>
115 <td align="left" valign="top">
116 <table border="0">
117 <tr>
118 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
119 <td align="left" valign="top"><i><u>Effect:</u></i></td>
120 </tr>
121 <tr>
122 <td align="left" valign="top"><tt>0x00</tt></td>
123 <td align="left" valign="top">
124 Read: <b><tt>getchar()</tt></b> (non-blocking; returns
125 <tt>0</tt> if no char was available)<br>
126 Write: <b><tt>putchar(ch)</tt></b></td>
127 </tr>
128 <tr>
129 <td align="left" valign="top"><tt>0x10</tt></td>
130 <td align="left" valign="top">Read or write: <b><tt>halt()</tt></b><br>
131 (Useful for exiting the emulator.)</td>
132 </tr>
133 </table>
134 </td>
135 </tr>
136
137 <tr height="15">
138 <td height="15">&nbsp;</td>
139 </tr>
140
141 <tr>
142 <td align="left" valign="top">
143 <a name="expdevices_mp"><b><tt>mp</tt>:</b></a>
144 <p>This device controls the behaviour of CPUs in an emulated
145 multi-processor system.
146 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_mp.c</tt></font>
147 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_mp.h</tt></font>
148 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x11000000</font>
149 </td>
150 <td></td>
151 <td align="left" valign="top">
152 <table border="0">
153 <tr>
154 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
155 <td align="left" valign="top"><i><u>Effect:</u></i></td>
156 </tr>
157 <tr>
158 <td align="left" valign="top"><tt>0x0000</tt></td>
159 <td align="left" valign="top">Read: <b><tt>whoami()</tt></b>.
160 Returns the id of the CPU doing the read.</td>
161 </tr>
162 <tr>
163 <td align="left" valign="top"><tt>0x0010</tt></td>
164 <td align="left" valign="top">Read: <b><tt>ncpus()</tt></b>.
165 Returns the number of CPUs in the system.</td>
166 </tr>
167 <tr>
168 <td align="left" valign="top"><tt>0x0020</tt></td>
169 <td align="left" valign="top">Write: <b><tt>startupcpu(i)</tt></b>.
170 Starts CPU i. It begins execution at the address
171 set by a write to startupaddr (see below).</td>
172 </tr>
173 <tr>
174 <td align="left" valign="top"><tt>0x0030</tt></td>
175 <td align="left" valign="top">Write: <b><tt>startupaddr(addr)</tt></b>.
176 Sets the starting address for CPUs.</td>
177 </tr>
178 <tr>
179 <td align="left" valign="top"><tt>0x0040</tt></td>
180 <td align="left" valign="top">Write: <b><tt>pause_addr(addr)</tt></b>.
181 Sets the pause address. (NOTE: This is not
182 used anymore.)</td>
183 </tr>
184 <tr>
185 <td align="left" valign="top"><tt>0x0050</tt></td>
186 <td align="left" valign="top">Write: <b><tt>pause_cpu(i)</tt></b>.
187 Pauses all CPUs <i>except</i> CPU i.</td>
188 </tr>
189 <tr>
190 <td align="left" valign="top"><tt>0x0060</tt></td>
191 <td align="left" valign="top">Write: <b><tt>unpause_cpu(i)</tt></b>.
192 Unpauses CPU i.</td>
193 </tr>
194 <tr>
195 <td align="left" valign="top"><tt>0x0070</tt></td>
196 <td align="left" valign="top">Write: <b><tt>startupstack(addr)</tt></b>.
197 Sets the startup stack address. (CPUs started with
198 startupcpu() above will have their stack pointer
199 set to this value.)</td>
200 </tr>
201 <tr>
202 <td align="left" valign="top"><tt>0x0080</tt></td>
203 <td align="left" valign="top">Read: <b><tt>hardware_random()</tt></b>.
204 This produces a "random" number.</td>
205 </tr>
206 <tr>
207 <td align="left" valign="top"><tt>0x0090</tt></td>
208 <td align="left" valign="top">Read: <b><tt>memory()</tt></b>.
209 Returns the number of bytes of RAM in the system.</td>
210 </tr>
211 <tr>
212 <td align="left" valign="top"><tt>0x00a0</tt></td>
213 <td align="left" valign="top">Write: <b><tt>ipi_one((nr &lt;&lt; 16) + cpuid)</tt></b>.
214 Sends IPI <tt>nr</tt> to a specific CPU.</td>
215 </tr>
216 <tr>
217 <td align="left" valign="top"><tt>0x00b0</tt></td>
218 <td align="left" valign="top">Write: <b><tt>ipi_many((nr &lt;&lt; 16) + cpuid)</tt></b>.
219 Sends IPI <tt>nr</tt> to all CPUs <i>except</i>
220 the specified one.</td>
221 </tr>
222 <tr>
223 <td align="left" valign="top"><tt>0x00c0</tt></td>
224 <td align="left" valign="top">Read: <b><tt>ipi_read()</tt></b>.
225 Returns the next pending IPI. 0 is returned if there is no
226 pending IPI (so 0 shouldn't be used for valid IPIs).
227 Hardware int 6 is deasserted when the IPI queue is empty.
228 <br>Write: <b><tt>ipi_flush()</tt></b>.
229 Clears the IPI queue, discarding any pending IPIs.</td>
230 </tr>
231 <tr>
232 <td align="left" valign="top"><tt>0x00d0</tt></td>
233 <td align="left" valign="top">Read: <b><tt>ncycles()</tt></b>.
234 Returns approximately the number of cycles executed.
235 Note: this value is not updated for every instruction,
236 so it cannot be used for small measurements.</td>
237 </tr>
238 </table>
239 </td>
240 </tr>
241
242 <tr height="15">
243 <td height="15">&nbsp;</td>
244 </tr>
245
246 <tr>
247 <td align="left" valign="top">
248 <a name="expdevices_fb"><b><tt>fb</tt>:</b></a>
249 <p>A simple linear framebuffer, for graphics output.
250 640 x 480 pixels, 3 bytes per pixel (red, green, blue, 8 bits each).
251 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_fb.c</tt></font>
252 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_fb.h</tt></font>
253 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x12000000</font>
254 </td>
255 <td></td>
256 <td align="left" valign="top">
257 <table border="0">
258 <tr>
259 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
260 <td align="left" valign="top"><i><u>Effect:</u></i></td>
261 </tr>
262 <tr>
263 <td align="left" valign="top"><tt>0x00000-</tt><br><tt>0xe0fff</tt></td>
264 <td align="left" valign="top">Read: read pixel values.
265 <br>Write: write pixel values.</td>
266 </tr>
267 </table>
268 </td>
269 </tr>
270
271 <tr height="15">
272 <td height="15">&nbsp;</td>
273 </tr>
274
275 <tr>
276 <td align="left" valign="top">
277 <a name="expdevices_disk"><b><tt>disk</tt>:</b></a>
278 <p>Disk controller, which can read from and write
279 to emulated IDE disks. It does not use interrupts; read and
280 write operations finish instantaneously.
281 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_disk.c</tt></font>
282 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_disk.h</tt></font>
283 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x13000000</font>
284 </td>
285 <td></td>
286 <td align="left" valign="top">
287 <table border="0">
288 <tr>
289 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
290 <td align="left" valign="top"><i><u>Effect:</u></i></td>
291 </tr>
292 <tr>
293 <td align="left" valign="top"><tt>0x0000</tt></td>
294 <td align="left" valign="top">Write: Set the offset (in bytes) from the beginning
295 of the disk image. This offset will be used for the next read/write operation.</td>
296 </tr>
297 <tr>
298 <td align="left" valign="top"><tt>0x0010</tt></td>
299 <td align="left" valign="top">Write: Select the IDE ID to be used in the next
300 read/write operation.</td>
301 </tr>
302 <tr>
303 <td align="left" valign="top"><tt>0x0020</tt></td>
304 <td align="left" valign="top">Write: Start a read or write operation.
305 (Writing <tt>0</tt> means a Read operation, a <tt>1</tt> means a
306 Write operation.)</td>
307 </tr>
308 <tr>
309 <td align="left" valign="top"><tt>0x0030</tt></td>
310 <td align="left" valign="top">Read: Get status of the last operation.
311 (Status 0 means failure, non-zero means success.)</td>
312 </tr>
313 <tr>
314 <td align="left" valign="top"><tt>0x4000-</tt><br><tt>0x41ff</tt>&nbsp;&nbsp;&nbsp;</td>
315 <td align="left" valign="top">Read/Write: 512 bytes data buffer.</td>
316 </tr>
317 </table>
318 </td>
319 </tr>
320
321 <tr height="15">
322 <td height="15">&nbsp;</td>
323 </tr>
324
325 <tr>
326 <td align="left" valign="top">
327 <a name="expdevices_ether"><b><tt>ether</tt>:</b></a>
328 <p>A simple ethernet controller, enough to send
329 and receive packets on a simulated network.
330 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_ether.c</tt></font>
331 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_ether.h</tt></font>
332 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x14000000</font>
333 </td>
334 <td></td>
335 <td align="left" valign="top">
336 <table border="0">
337 <tr>
338 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
339 <td align="left" valign="top"><i><u>Effect:</u></i></td>
340 </tr>
341 <tr>
342 <td align="left" valign="top"><tt>0x0000-</tt><br><tt>0x3fff</tt></td>
343 <td align="left" valign="top">Read/write buffer for the packet to be sent/received.</td>
344 </tr>
345 <tr>
346 <td align="left" valign="top"><tt>0x4000</tt></td>
347 <td align="left" valign="top">Read: status word, one or more of these:
348 <br><tt>0x01</tt>&nbsp;=&nbsp;something was received (because of
349 the last command)
350 <br><tt>0x02</tt>&nbsp;=&nbsp;more packets are available
351 <br><i>NOTE:</i> Whenever the status word is non-zero,
352 an interrupt is asserted. Reading the status word
353 clears it, and deasserts the interrupt.</td>
354 </tr>
355 <tr>
356 <td align="left" valign="top"><tt>0x4010</tt></td>
357 <td align="left" valign="top">Read: get the Length of the received packet
358 <br>Write: set the Length of the next packet to transmit</td>
359 </tr>
360 <tr>
361 <td align="left" valign="top"><tt>0x4020</tt></td>
362 <td align="left" valign="top">Write: command:
363 <br><tt>0x00:</tt>&nbsp;receive a packet
364 <br><tt>0x01:</tt>&nbsp;send a packet</td>
365 </tr>
366 </table>
367 </td>
368 </tr>
369
370 <tr height="15">
371 <td height="15">&nbsp;</td>
372 </tr>
373
374 <tr>
375 <td align="left" valign="top">
376 <a name="expdevices_rtc"><b><tt>rtc</tt>:</b></a>
377 <p>A Real-Time Clock, used to retrieve the current time
378 and to cause periodic interrupts.
379 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_rtc.c</tt></font>
380 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_rtc.h</tt></font>
381 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x15000000</font>
382 </td>
383 <td></td>
384 <td align="left" valign="top">
385 <table border="0">
386 <tr>
387 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
388 <td align="left" valign="top"><i><u>Effect:</u></i></td>
389 </tr>
390 <tr>
391 <td align="left" valign="top"><tt>0x0000</tt></td>
392 <td align="left" valign="top">Read or Write: Trigger a clock update (a gettimeofday() on the host).</td>
393 </tr>
394 <tr>
395 <td align="left" valign="top"><tt>0x0010</tt></td>
396 <td align="left" valign="top">Read: Seconds since 1st January 1970</td>
397 </tr>
398 <tr>
399 <td align="left" valign="top"><tt>0x0020</tt></td>
400 <td align="left" valign="top">Read: Microseconds</td>
401 </tr>
402 <tr>
403 <td align="left" valign="top"><tt>0x0100</tt></td>
404 <td align="left" valign="top">Read: Get the current
405 timer interrupt frequency.<br>Write: Set the timer
406 interrupt frequency. (Writing 0 disables the timer.)</td>
407 </tr>
408 <tr>
409 <td align="left" valign="top"><tt>0x0110</tt></td>
410 <td align="left" valign="top">Read or Write: Acknowledge
411 one timer interrupt. (Note that if multiple interrupts
412 are pending, only one is acknowledged.)</td>
413 </tr>
414 </table>
415 </td>
416 </tr>
417
418 </table></center>
419
420 <p>
421 While these devices may resemble real-world hardware, they are
422 intentionally made simpler to use. (An exception is the framebuffer;
423 some machines actually have simple linear framebuffers like this.)
424
425 <p>If the physical address is <tt>0x10000000</tt>, then for MIPS that
426 means that it can be accessed at virtual address
427 <tt>0xffffffffb0000000</tt>. (Actually it can be accessed at
428 <tt>0xffffffff90000000</tt> too, but devices should usually be accessed in
429 a non-cached manner.)
430
431 <p>When using the Alpha, ARM, or PPC test machines, the addresses are
432 <tt>0x10000000</tt>, <tt>0x11000000</tt> etc., so no need to add any
433 virtual displacement.
434
435 <p>The <tt>mp</tt>, <tt>disk</tt>, and <tt>ether</tt> devices are agnostic
436 when it comes to word-length. For example, when reading offset
437 <tt>0x0000</tt> of the <tt>mp</tt> device, you may use any kind of read
438 (an 8-bit read will work just as well as a 64-bit read, although the value
439 will be truncated to 8 bits in the first case). You can <i>not</i>,
440 however, read one byte from <tt>0x0000</tt> and one from <tt>0x0001</tt>,
441 and combine the result. The read from <tt>0x0001</tt> will be invalid.
442
443 <p>The <tt>cons</tt> device should be accessed using 8-bit reads
444 and writes. Doing a getchar() (ie reading from offset <tt>0x00</tt>)
445 returns <tt>0</tt> if no character was available. Whenever a character is
446 available, the <tt>cons</tt> device' interrupt is asserted. When there are
447 no more available characters, the interrupt is deasserted. (Remember that
448 the interrupt has to be unmasked to be able to actually cause an
449 interrupt.)
450
451 <p>IPIs (inter-processor interrupts) are controlled by the <tt>mp</tt>
452 device. Whenever an IPI is "sent" from a source to one or more target
453 CPUs, the interrupt is asserted on the target CPUs, and the IPI number is
454 added last in the IPI queue for each of the target CPUs. It is then up to
455 those CPUs to individually read from offset <tt>0x00c0</tt>, to figure out
456 what kind of IPI it was.
457
458
459
460 <p>Interrupt mappings are as follows:
461
462 <p><center>
463 <table border="1">
464 <tr><td align="center">
465 <b><tt>testmips</tt></b>
466 </td></tr>
467 <tr><td>
468 <table border="0">
469 <tr><td align="center">IRQ:</td><td>&nbsp;</td>
470 <td>Used for:</td></tr>
471 <tr><td align="center">7</td><td></td>
472 <td>MIPS count/compare interrupt</td></tr>
473 <tr><td align="center">6</td><td></td>
474 <td><tt>mp</tt> (inter-processor interrupts)</td></tr>
475 <tr><td align="center">4</td><td></td>
476 <td><tt>rtc</tt></td></tr>
477 <tr><td align="center">3</td><td></td>
478 <td><tt>ether</tt></td></tr>
479 <tr><td align="center">2</td><td></td>
480 <td><tt>cons</tt></td></tr>
481 </table>
482 </td></tr>
483 </table>
484 </center>
485
486 <p>Other machines: TODO
487
488
489 <p><br>
490
491
492
493 </p>
494
495 </body>
496 </html>

  ViewVC Help
Powered by ViewVC 1.1.26