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Mon Oct 8 16:22:56 2007 UTC (16 years, 5 months ago) by dpavlin
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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1632 2007/09/11 21:46:35 debug Exp $
20070616	Implementing the MIPS32/64 revision 2 "ror" instruction.
20070617	Adding a struct for each physpage which keeps track of which
		ranges within that page (base offset, length) that are
		continuously translatable. When running with native code
		generation enabled (-b), a range is added after each read-
		ahead loop.
		Experimenting with using the physical program counter sample
		data (implemented 20070608) together with the "translatable
		range" information, to figure out which physical address ranges
		would be worth translating to native code (if the number of
		samples falling within a range is above a certain threshold).
20070618	Adding automagic building of .index comment files for
		src/file/, src/promemul/, src src/useremul/ as well.
		Adding a "has been translated" bit to the ranges, so that only
		not-yet-translated ranges will be sampled.
20070619	Moving src/cpu.c and src/memory_rw.c into src/cpus/,
		src/device.c into src/devices/, and src/machine.c into
		src/machines/.
		Creating a skeleton cc/ld native backend module; beginning on
		the function which will detect cc command line, etc.
20070620	Continuing on the native code generation infrastructure.
20070621	Moving src/x11.c and src/console.c into a new src/console/
		subdir (for everything that is console or framebuffer related).
		Moving src/symbol*.c into a new src/symbol/, which should
		contain anything that is symbol handling related.
20070624	Making the program counter sampling threshold a "settings
		variable" (sampling_threshold), i.e. it can now be changed
		during runtime.
		Switching the RELEASE notes format from plain text to HTML.
		If the TMPDIR environment variable is set, it is used instead
		of "/tmp" for temporary files.
		Continuing on the cc/ld backend: simple .c code is generated,
		the compiler and linker are called, etc.
		Adding detection of host architecture to the configure script
		(again), and adding icache invalidation support (only
		implemented for Alpha hosts so far).
20070625	Simplifying the program counter sampling mechanism.
20070626	Removing the cc/ld native code generation stuff, program
		counter sampling, etc; it would not have worked well in the
		general case.
20070627	Removing everything related to native code generation.
20070629	Removing the (practically unusable) support for multiple
		emulations. (The single emulation allowed now still supports
		multiple simultaneous machines, as before.)
		Beginning on PCCTWO and M88K interrupts.
20070723	Adding a dummy skeleton for emulation of M32R processors.
20070901	Fixing a warning found by "gcc version 4.3.0 20070817
		(experimental)" on amd64.
20070905	Removing some more traces of the old "multiple emulations"
		code.
		Also looking in /usr/local/include and /usr/local/lib for
		X11 libs, when running configure.
20070909	Minor updates to the guest OS install instructions, in
		preparation for the NetBSD 4.0 release.
20070918	More testing of NetBSD 4.0 RC1.

1 <html><head><title>Gavare's eXperimental Emulator:&nbsp;&nbsp;&nbsp;Experimenting with GXemul</title>
2 <meta name="robots" content="noarchive,nofollow,noindex"></head>
3 <body bgcolor="#f8f8f8" text="#000000" link="#4040f0" vlink="#404040" alink="#ff0000">
4 <table border=0 width=100% bgcolor="#d0d0d0"><tr>
5 <td width=100% align=center valign=center><table border=0 width=100%><tr>
6 <td align="left" valign=center bgcolor="#d0efff"><font color="#6060e0" size="6">
7 <b>GXemul:</b></font>&nbsp;&nbsp;
8 <font color="#000000" size="6"><b>Experimenting with GXemul</b>
9 </font></td></tr></table></td></tr></table><p>
10
11 <!--
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15 Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
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41
42 <a href="./">Back to the index</a>
43
44 <p><br>
45 <h2>Experimenting with GXemul</h2>
46
47 <p>
48 <ul>
49 <li><a href="#hello">Hello world</a>
50 <li><a href="#expdevices">Experimental devices</a>
51 </ul>
52
53
54
55
56
57
58 <p><br>
59 <a name="hello"></a>
60 <h3>Hello world:</h3>
61
62 You might want to use the emulator to develop programs on your own,
63 not just run precompiled kernels such as NetBSD. To get started, I recommend
64 that you do two things:
65
66 <p>
67 <ul>
68 <li>Build and install a cross-compiler for your chosen target,
69 e.g. <tt>mips64-unknown-elf</tt>.
70 <a href="http://gcc.gnu.org/">GCC</a> is usually a good compiler
71 choice, because it is portable and in wide-spread use.
72 (Other compilers should work too.)
73 <p>
74 <li>Compile the Hello World demo program for your chosen target, and run
75 it in the emulator.
76 </ul>
77
78 <p>The Hello World demo program is included in the GXemul source
79 code distribution, in the <a href="../demos/hello/"><tt>demos/hello/</tt></a>
80 subdirectory. The README files in the demo directories have several
81 examples of how the demo programs can be built.
82
83 <p>Once you have tried running the Hello World program from the command
84 line, e.g.<pre>
85 <b>gxemul -E testmips hello_mips</b>
86 </pre>
87 you can experiment with adding one or more of the following command line
88 options:
89
90 <p><ul>
91 <li><b><tt>-t</tt></b>, to show a function call trace,
92 <li><b><tt>-i</tt></b>, to show instruction disassembly (for each
93 executed instruction),
94 <li>and finally <b><tt>-V</tt></b> to start the emulator in a "paused"
95 state.
96 </ul>
97
98 <p>If you start the emulator in the paused state, or if you press CTRL-C
99 during normal execution, you will end up with a <tt><b>GXemul></b></tt>
100 prompt. This is the built-in debugger.
101
102 <p>Using the built-in debugger, you can single step (<tt><b>s</b></tt>),
103 show the current contents of the emulated registers (<tt><b>r</b></tt>),
104 turn on/off the function call trace mode (<tt><b>trace</b></tt>), or
105 continue at full speed (<tt><b>c</b></tt>). Typing <tt><b>quit</b></tt>
106 exits the emulator.
107
108 <p>Hopefully this is enough to get you inspired. :-)
109
110
111
112
113
114
115 <p><br>
116 <a name="expdevices"></a>
117 <h3>Experimental devices:</h3>
118
119 The emulator has several modes where it doesn't emulate any real machine.
120 It can either run in "bare" mode, where no devices are included by default
121 (just the CPU), or in a "test" mode where some simple devices are
122 emulated.
123
124 <p>The test machines (<tt>testmips</tt>, <tt>testppc</tt>, etc) have the
125 following experimental devices:
126
127 <p>
128 <center><table border="0" width="80%">
129
130 <tr>
131 <td align="left" valign="top" width="200">
132 <a name="expdevices_cons"><b><tt>cons</tt>:</b></a>
133 <p>A simple console device, for writing
134 characters to the controlling terminal
135 and receiving keypresses.
136 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_cons.c</tt></font>
137 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_cons.h</tt></font>
138 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x10000000</font>
139 </td>
140 <td align="left" valign="top" width="25">&nbsp;</td>
141 <td align="left" valign="top">
142 <table border="0">
143 <tr>
144 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
145 <td align="left" valign="top"><i><u>Effect:</u></i></td>
146 </tr>
147 <tr>
148 <td align="left" valign="top"><tt>0x00</tt></td>
149 <td align="left" valign="top">
150 Read: <b><tt>getchar()</tt></b> (non-blocking; returns
151 <tt>0</tt> if no char was available)<br>
152 Write: <b><tt>putchar(ch)</tt></b></td>
153 </tr>
154 <tr>
155 <td align="left" valign="top"><tt>0x10</tt></td>
156 <td align="left" valign="top">Read or write: <b><tt>halt()</tt></b><br>
157 (Useful for exiting the emulator.)</td>
158 </tr>
159 </table>
160 </td>
161 </tr>
162
163 <tr height="15">
164 <td height="15">&nbsp;</td>
165 </tr>
166
167 <tr>
168 <td align="left" valign="top">
169 <a name="expdevices_mp"><b><tt>mp</tt>:</b></a>
170 <p>This device controls the behaviour of CPUs in an emulated
171 multi-processor system.
172 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_mp.c</tt></font>
173 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_mp.h</tt></font>
174 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x11000000</font>
175 </td>
176 <td></td>
177 <td align="left" valign="top">
178 <table border="0">
179 <tr>
180 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
181 <td align="left" valign="top"><i><u>Effect:</u></i></td>
182 </tr>
183 <tr>
184 <td align="left" valign="top"><tt>0x0000</tt></td>
185 <td align="left" valign="top">Read: <b><tt>whoami()</tt></b>.
186 Returns the id of the CPU doing the read.</td>
187 </tr>
188 <tr>
189 <td align="left" valign="top"><tt>0x0010</tt></td>
190 <td align="left" valign="top">Read: <b><tt>ncpus()</tt></b>.
191 Returns the number of CPUs in the system.</td>
192 </tr>
193 <tr>
194 <td align="left" valign="top"><tt>0x0020</tt></td>
195 <td align="left" valign="top">Write: <b><tt>startupcpu(i)</tt></b>.
196 Starts CPU i. It begins execution at the address
197 set by a write to startupaddr (see below).</td>
198 </tr>
199 <tr>
200 <td align="left" valign="top"><tt>0x0030</tt></td>
201 <td align="left" valign="top">Write: <b><tt>startupaddr(addr)</tt></b>.
202 Sets the starting address for CPUs.</td>
203 </tr>
204 <tr>
205 <td align="left" valign="top"><tt>0x0040</tt></td>
206 <td align="left" valign="top">Write: <b><tt>pause_addr(addr)</tt></b>.
207 Sets the pause address. (NOTE: This is not
208 used anymore.)</td>
209 </tr>
210 <tr>
211 <td align="left" valign="top"><tt>0x0050</tt></td>
212 <td align="left" valign="top">Write: <b><tt>pause_cpu(i)</tt></b>.
213 Pauses all CPUs <i>except</i> CPU i.</td>
214 </tr>
215 <tr>
216 <td align="left" valign="top"><tt>0x0060</tt></td>
217 <td align="left" valign="top">Write: <b><tt>unpause_cpu(i)</tt></b>.
218 Unpauses CPU i.</td>
219 </tr>
220 <tr>
221 <td align="left" valign="top"><tt>0x0070</tt></td>
222 <td align="left" valign="top">Write: <b><tt>startupstack(addr)</tt></b>.
223 Sets the startup stack address. (CPUs started with
224 startupcpu() above will have their stack pointer
225 set to this value.)</td>
226 </tr>
227 <tr>
228 <td align="left" valign="top"><tt>0x0080</tt></td>
229 <td align="left" valign="top">Read: <b><tt>hardware_random()</tt></b>.
230 This produces a "random" number.</td>
231 </tr>
232 <tr>
233 <td align="left" valign="top"><tt>0x0090</tt></td>
234 <td align="left" valign="top">Read: <b><tt>memory()</tt></b>.
235 Returns the number of bytes of RAM in the system.</td>
236 </tr>
237 <tr>
238 <td align="left" valign="top"><tt>0x00a0</tt></td>
239 <td align="left" valign="top">Write: <b><tt>ipi_one((nr &lt;&lt; 16) + cpuid)</tt></b>.
240 Sends IPI <tt>nr</tt> to a specific CPU.</td>
241 </tr>
242 <tr>
243 <td align="left" valign="top"><tt>0x00b0</tt></td>
244 <td align="left" valign="top">Write: <b><tt>ipi_many((nr &lt;&lt; 16) + cpuid)</tt></b>.
245 Sends IPI <tt>nr</tt> to all CPUs <i>except</i>
246 the specified one.</td>
247 </tr>
248 <tr>
249 <td align="left" valign="top"><tt>0x00c0</tt></td>
250 <td align="left" valign="top">Read: <b><tt>ipi_read()</tt></b>.
251 Returns the next pending IPI. 0 is returned if there is no
252 pending IPI (so 0 shouldn't be used for valid IPIs).
253 Hardware int 6 is deasserted when the IPI queue is empty.
254 <br>Write: <b><tt>ipi_flush()</tt></b>.
255 Clears the IPI queue, discarding any pending IPIs.</td>
256 </tr>
257 <tr>
258 <td align="left" valign="top"><tt>0x00d0</tt></td>
259 <td align="left" valign="top">Read: <b><tt>ncycles()</tt></b>.
260 Returns approximately the number of cycles executed on
261 this CPU. Note: this value is not updated for every instruction,
262 so it cannot be used for small measurements.</td>
263 </tr>
264 </table>
265 </td>
266 </tr>
267
268 <tr height="15">
269 <td height="15">&nbsp;</td>
270 </tr>
271
272 <tr>
273 <td align="left" valign="top">
274 <a name="expdevices_fb"><b><tt>fb</tt>:</b></a>
275 <p>A simple linear framebuffer, for graphics output.
276 640 x 480 pixels, 3 bytes per pixel (red, green, blue, 8 bits each).
277 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_fb.c</tt></font>
278 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_fb.h</tt></font>
279 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x12000000</font>
280 </td>
281 <td></td>
282 <td align="left" valign="top">
283 <table border="0">
284 <tr>
285 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
286 <td align="left" valign="top"><i><u>Effect:</u></i></td>
287 </tr>
288 <tr>
289 <td align="left" valign="top"><tt>0x00000-</tt><br><tt>0xe0fff</tt></td>
290 <td align="left" valign="top">Read: read pixel values.
291 <br>Write: write pixel values.</td>
292 </tr>
293 </table>
294 </td>
295 </tr>
296
297 <tr height="15">
298 <td height="15">&nbsp;</td>
299 </tr>
300
301 <tr>
302 <td align="left" valign="top">
303 <a name="expdevices_disk"><b><tt>disk</tt>:</b></a>
304 <p>Disk controller, which can read from and write
305 to emulated IDE disks. It does not use interrupts; read and
306 write operations finish instantaneously.
307 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_disk.c</tt></font>
308 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_disk.h</tt></font>
309 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x13000000</font>
310 </td>
311 <td></td>
312 <td align="left" valign="top">
313 <table border="0">
314 <tr>
315 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
316 <td align="left" valign="top"><i><u>Effect:</u></i></td>
317 </tr>
318 <tr>
319 <td align="left" valign="top"><tt>0x0000</tt></td>
320 <td align="left" valign="top">Write: Set the offset (in bytes) from the beginning
321 of the disk image. This offset will be used for the next read/write operation.</td>
322 </tr>
323 <tr>
324 <td align="left" valign="top"><tt>0x0010</tt></td>
325 <td align="left" valign="top">Write: Select the IDE ID to be used in the next
326 read/write operation.</td>
327 </tr>
328 <tr>
329 <td align="left" valign="top"><tt>0x0020</tt></td>
330 <td align="left" valign="top">Write: Start a read or write operation.
331 (Writing <tt>0</tt> means a Read operation, a <tt>1</tt> means a
332 Write operation.)</td>
333 </tr>
334 <tr>
335 <td align="left" valign="top"><tt>0x0030</tt></td>
336 <td align="left" valign="top">Read: Get status of the last operation.
337 (Status 0 means failure, non-zero means success.)</td>
338 </tr>
339 <tr>
340 <td align="left" valign="top"><tt>0x4000-</tt><br><tt>0x41ff</tt>&nbsp;&nbsp;&nbsp;</td>
341 <td align="left" valign="top">Read/Write: 512 bytes data buffer.</td>
342 </tr>
343 </table>
344 </td>
345 </tr>
346
347 <tr height="15">
348 <td height="15">&nbsp;</td>
349 </tr>
350
351 <tr>
352 <td align="left" valign="top">
353 <a name="expdevices_ether"><b><tt>ether</tt>:</b></a>
354 <p>A simple ethernet controller, enough to send
355 and receive packets on a simulated network.
356 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_ether.c</tt></font>
357 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_ether.h</tt></font>
358 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x14000000</font>
359 </td>
360 <td></td>
361 <td align="left" valign="top">
362 <table border="0">
363 <tr>
364 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
365 <td align="left" valign="top"><i><u>Effect:</u></i></td>
366 </tr>
367 <tr>
368 <td align="left" valign="top"><tt>0x0000-</tt><br><tt>0x3fff</tt></td>
369 <td align="left" valign="top">Read/write buffer for the packet to be sent/received.</td>
370 </tr>
371 <tr>
372 <td align="left" valign="top"><tt>0x4000</tt></td>
373 <td align="left" valign="top">Read: status word, one or more of these:
374 <br><tt>0x01</tt>&nbsp;=&nbsp;something was received (because of
375 the last command)
376 <br><tt>0x02</tt>&nbsp;=&nbsp;more packets are available
377 <br><i>NOTE:</i> Whenever the status word is non-zero,
378 an interrupt is asserted. Reading the status word
379 clears it, and deasserts the interrupt.</td>
380 </tr>
381 <tr>
382 <td align="left" valign="top"><tt>0x4010</tt></td>
383 <td align="left" valign="top">Read: get the Length of the received packet
384 <br>Write: set the Length of the next packet to transmit</td>
385 </tr>
386 <tr>
387 <td align="left" valign="top"><tt>0x4020</tt></td>
388 <td align="left" valign="top">Write: command:
389 <br><tt>0x00:</tt>&nbsp;receive a packet
390 <br><tt>0x01:</tt>&nbsp;send a packet</td>
391 </tr>
392 </table>
393 </td>
394 </tr>
395
396 <tr height="15">
397 <td height="15">&nbsp;</td>
398 </tr>
399
400 <tr>
401 <td align="left" valign="top">
402 <a name="expdevices_rtc"><b><tt>rtc</tt>:</b></a>
403 <p>A Real-Time Clock, used to retrieve the current time
404 and to cause periodic interrupts.
405 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_rtc.c</tt></font>
406 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_rtc.h</tt></font>
407 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x15000000</font>
408 </td>
409 <td></td>
410 <td align="left" valign="top">
411 <table border="0">
412 <tr>
413 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
414 <td align="left" valign="top"><i><u>Effect:</u></i></td>
415 </tr>
416 <tr>
417 <td align="left" valign="top"><tt>0x0000</tt></td>
418 <td align="left" valign="top">Read or Write: Trigger a clock update (a gettimeofday() on the host).</td>
419 </tr>
420 <tr>
421 <td align="left" valign="top"><tt>0x0010</tt></td>
422 <td align="left" valign="top">Read: Seconds since 1st January 1970</td>
423 </tr>
424 <tr>
425 <td align="left" valign="top"><tt>0x0020</tt></td>
426 <td align="left" valign="top">Read: Microseconds</td>
427 </tr>
428 <tr>
429 <td align="left" valign="top"><tt>0x0100</tt></td>
430 <td align="left" valign="top">Read: Get the current
431 timer interrupt frequency.<br>Write: Set the timer
432 interrupt frequency. (Writing 0 disables the timer.)</td>
433 </tr>
434 <tr>
435 <td align="left" valign="top"><tt>0x0110</tt></td>
436 <td align="left" valign="top">Read or Write: Acknowledge
437 one timer interrupt. (Note that if multiple interrupts
438 are pending, only one is acknowledged.)</td>
439 </tr>
440 </table>
441 </td>
442 </tr>
443
444 <tr height="15">
445 <td height="15">&nbsp;</td>
446 </tr>
447
448 <tr>
449 <td align="left" valign="top">
450 <a name="expdevices_irqc"><b><tt>irqc</tt>:</b></a>
451 <p>An Interrupt Controller. (Note: Not used for the MIPS test machine.)
452 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_irqc.c</tt></font>
453 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_irqc.h</tt></font>
454 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x16000000</font>
455 </td>
456 <td></td>
457 <td align="left" valign="top">
458 <table border="0">
459 <tr>
460 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
461 <td align="left" valign="top"><i><u>Effect:</u></i></td>
462 </tr>
463 <tr>
464 <td align="left" valign="top"><tt>0x0</tt></td>
465 <td align="left" valign="top">Read: IRQ status as a 32-bit word, one bit per interrupt source.</td>
466 </tr>
467 <tr>
468 <td align="left" valign="top"><tt>0x4</tt></td>
469 <td align="left" valign="top">Write: Mask one interrupt source. Value should be an integer 0..31.</td>
470 </tr>
471 <tr>
472 <td align="left" valign="top"><tt>0x8</tt></td>
473 <td align="left" valign="top">Write: Unmask one interrupt source. Value should be an integer 0..31.</td>
474 </tr>
475 </table>
476 </td>
477 </tr>
478
479 </table></center>
480
481 <p>The include files for the test machine devices are found in
482 <a href="../src/include/testmachine/"><tt>src/include/testmachine/</tt></a>.
483
484 <p>While these devices may resemble real-world hardware, they are
485 intentionally made simpler to use. (An exception is the framebuffer;
486 some machines actually have simple linear framebuffers like this.)
487
488 <p>If the physical address is <tt>0x10000000</tt>, then for MIPS that
489 means that it can be accessed at virtual address
490 <tt>0xffffffffb0000000</tt>. (Actually it can be accessed at
491 <tt>0xffffffff90000000</tt> too, but devices should usually be accessed in
492 a non-cached manner.)
493
494 <p>When using the ARM or PPC test machines, the addresses are
495 <tt>0x10000000</tt>, <tt>0x11000000</tt> etc., so no need to add any
496 virtual displacement.
497
498 <p>The <tt>mp</tt>, <tt>disk</tt>, and <tt>ether</tt> devices are agnostic
499 when it comes to word-length. For example, when reading offset
500 <tt>0x0000</tt> of the <tt>mp</tt> device, you may use any kind of read
501 (an 8-bit read will work just as well as a 64-bit read, although the value
502 will be truncated to 8 bits in the first case). You can <i>not</i>,
503 however, read one byte from <tt>0x0000</tt> and one from <tt>0x0001</tt>,
504 and combine the result. The read from <tt>0x0001</tt> will be invalid.
505
506 <p>The <tt>cons</tt> device should be accessed using 8-bit reads
507 and writes. Doing a getchar() (ie reading from offset <tt>0x00</tt>)
508 returns <tt>0</tt> if no character was available. Whenever a character is
509 available, the <tt>cons</tt> device' interrupt is asserted. When there are
510 no more available characters, the interrupt is deasserted. (Remember that
511 the interrupt has to be unmasked to be able to actually cause an
512 interrupt.)
513
514 <p>IPIs (inter-processor interrupts) are controlled by the <tt>mp</tt>
515 device. Whenever an IPI is "sent" from a source to one or more target
516 CPUs, the interrupt is asserted on the target CPUs, and the IPI number is
517 added last in the IPI queue for each of the target CPUs. It is then up to
518 those CPUs to individually read from offset <tt>0x00c0</tt>, to figure out
519 what kind of IPI it was.
520
521
522
523 <p>Interrupt mappings are as follows:
524
525 <p><center>
526 <table border="1">
527 <tr><td align="center">
528 <b><tt>testmips</tt></b> (as native MIPS interrupts)
529 </td></tr>
530 <tr><td>
531 <table border="0">
532 <tr><td align="center">IRQ:</td><td>&nbsp;</td>
533 <td>Used for:</td></tr>
534 <tr><td align="center">7</td><td></td>
535 <td>MIPS count/compare interrupt</td></tr>
536 <tr><td align="center">6</td><td></td>
537 <td><tt>mp</tt> (inter-processor interrupts)</td></tr>
538 <tr><td align="center">4</td><td></td>
539 <td><tt>rtc</tt></td></tr>
540 <tr><td align="center">3</td><td></td>
541 <td><tt>ether</tt></td></tr>
542 <tr><td align="center">2</td><td></td>
543 <td><tt>cons</tt></td></tr>
544 </table>
545 </td></tr>
546 </table>
547
548 <p><table border="1">
549 <tr><td align="center">
550 <b><tt>testarm</tt> and others</b> (via the <tt>irqc</tt> device)
551 </td></tr>
552 <tr><td>
553 <table border="0">
554 <tr><td align="center">IRQ:</td><td>&nbsp;</td>
555 <td>Used for:</td></tr>
556 <tr><td align="center">6</td><td></td>
557 <td><tt>mp</tt> (inter-processor interrupts)</td></tr>
558 <tr><td align="center">4</td><td></td>
559 <td><tt>rtc</tt></td></tr>
560 <tr><td align="center">3</td><td></td>
561 <td><tt>ether</tt></td></tr>
562 <tr><td align="center">2</td><td></td>
563 <td><tt>cons</tt></td></tr>
564 </table>
565 </td></tr>
566 </table>
567 </center>
568
569
570
571 <p><br>
572
573
574
575 </p>
576
577 </body>
578 </html>

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