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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============


1 <html><head><title>Gavare's eXperimental Emulator:&nbsp;&nbsp;&nbsp;Experimenting with GXemul</title>
2 <meta name="robots" content="noarchive,nofollow,noindex"></head>
3 <body bgcolor="#f8f8f8" text="#000000" link="#4040f0" vlink="#404040" alink="#ff0000">
4 <table border=0 width=100% bgcolor="#d0d0d0"><tr>
5 <td width=100% align=center valign=center><table border=0 width=100%><tr>
6 <td align="left" valign=center bgcolor="#d0efff"><font color="#6060e0" size="6">
7 <b>Gavare's eXperimental Emulator:</b></font><br>
8 <font color="#000000" size="6"><b>Experimenting with GXemul</b>
9 </font></td></tr></table></td></tr></table><p>
10
11 <!--
12
13 $Id: experiments.html,v 1.110 2007/06/15 18:07:08 debug Exp $
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15 Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
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18 modification, are permitted provided that the following conditions are met:
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20 1. Redistributions of source code must retain the above copyright
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22 2. Redistributions in binary form must reproduce the above copyright
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26 derived from this software without specific prior written permission.
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41
42 <a href="./">Back to the index</a>
43
44 <p><br>
45 <h2>Experimenting with GXemul</h2>
46
47 <p>
48 <ul>
49 <li><a href="#hello">Hello world</a>
50 <li><a href="#expdevices">Experimental devices</a>
51 </ul>
52
53
54
55
56
57
58 <p><br>
59 <a name="hello"></a>
60 <h3>Hello world:</h3>
61
62 You might want to use the emulator to develop programs on your own,
63 not just run precompiled kernels such as NetBSD. To get started, I recommend
64 that you do two things:
65
66 <p>
67 <ul>
68 <li>Build and install a cross-compiler for your chosen target,
69 e.g. <tt>mips64-unknown-elf</tt>.
70 GCC is usually a good compiler choice, because it is portable
71 and in wide-spread use. (Other compilers should work too.)
72
73 <p>
74 <li>Compile the Hello World demo program for your chosen target, and run
75 it in the emulator.
76 </ul>
77
78 <p>The Hello World demo program is included in the GXemul source
79 code distribution, in the <a href="../demos/hello/"><tt>demos/hello/</tt></a>
80 subdirectory. The README files in the demo directories have several
81 examples of how the demo programs can be built.
82
83 <p>Hopefully this is enough to get you inspired. :-)
84
85
86
87
88
89
90 <p><br>
91 <a name="expdevices"></a>
92 <h3>Experimental devices:</h3>
93
94 The emulator has several modes where it doesn't emulate any real machine.
95 It can either run in "bare" mode, where no devices are included by default
96 (just the CPU), or in a "test" mode where some simple devices are
97 emulated.
98
99 <p>The test machines (<tt>testmips</tt>, <tt>testppc</tt>, etc) have the
100 following experimental devices:
101
102 <p>
103 <center><table border="0" width="80%">
104
105 <tr>
106 <td align="left" valign="top" width="200">
107 <a name="expdevices_cons"><b><tt>cons</tt>:</b></a>
108 <p>A simple console device, for writing
109 characters to the controlling terminal
110 and receiving keypresses.
111 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_cons.c</tt></font>
112 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_cons.h</tt></font>
113 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x10000000</font>
114 </td>
115 <td align="left" valign="top" width="25">&nbsp;</td>
116 <td align="left" valign="top">
117 <table border="0">
118 <tr>
119 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
120 <td align="left" valign="top"><i><u>Effect:</u></i></td>
121 </tr>
122 <tr>
123 <td align="left" valign="top"><tt>0x00</tt></td>
124 <td align="left" valign="top">
125 Read: <b><tt>getchar()</tt></b> (non-blocking; returns
126 <tt>0</tt> if no char was available)<br>
127 Write: <b><tt>putchar(ch)</tt></b></td>
128 </tr>
129 <tr>
130 <td align="left" valign="top"><tt>0x10</tt></td>
131 <td align="left" valign="top">Read or write: <b><tt>halt()</tt></b><br>
132 (Useful for exiting the emulator.)</td>
133 </tr>
134 </table>
135 </td>
136 </tr>
137
138 <tr height="15">
139 <td height="15">&nbsp;</td>
140 </tr>
141
142 <tr>
143 <td align="left" valign="top">
144 <a name="expdevices_mp"><b><tt>mp</tt>:</b></a>
145 <p>This device controls the behaviour of CPUs in an emulated
146 multi-processor system.
147 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_mp.c</tt></font>
148 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_mp.h</tt></font>
149 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x11000000</font>
150 </td>
151 <td></td>
152 <td align="left" valign="top">
153 <table border="0">
154 <tr>
155 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
156 <td align="left" valign="top"><i><u>Effect:</u></i></td>
157 </tr>
158 <tr>
159 <td align="left" valign="top"><tt>0x0000</tt></td>
160 <td align="left" valign="top">Read: <b><tt>whoami()</tt></b>.
161 Returns the id of the CPU doing the read.</td>
162 </tr>
163 <tr>
164 <td align="left" valign="top"><tt>0x0010</tt></td>
165 <td align="left" valign="top">Read: <b><tt>ncpus()</tt></b>.
166 Returns the number of CPUs in the system.</td>
167 </tr>
168 <tr>
169 <td align="left" valign="top"><tt>0x0020</tt></td>
170 <td align="left" valign="top">Write: <b><tt>startupcpu(i)</tt></b>.
171 Starts CPU i. It begins execution at the address
172 set by a write to startupaddr (see below).</td>
173 </tr>
174 <tr>
175 <td align="left" valign="top"><tt>0x0030</tt></td>
176 <td align="left" valign="top">Write: <b><tt>startupaddr(addr)</tt></b>.
177 Sets the starting address for CPUs.</td>
178 </tr>
179 <tr>
180 <td align="left" valign="top"><tt>0x0040</tt></td>
181 <td align="left" valign="top">Write: <b><tt>pause_addr(addr)</tt></b>.
182 Sets the pause address. (NOTE: This is not
183 used anymore.)</td>
184 </tr>
185 <tr>
186 <td align="left" valign="top"><tt>0x0050</tt></td>
187 <td align="left" valign="top">Write: <b><tt>pause_cpu(i)</tt></b>.
188 Pauses all CPUs <i>except</i> CPU i.</td>
189 </tr>
190 <tr>
191 <td align="left" valign="top"><tt>0x0060</tt></td>
192 <td align="left" valign="top">Write: <b><tt>unpause_cpu(i)</tt></b>.
193 Unpauses CPU i.</td>
194 </tr>
195 <tr>
196 <td align="left" valign="top"><tt>0x0070</tt></td>
197 <td align="left" valign="top">Write: <b><tt>startupstack(addr)</tt></b>.
198 Sets the startup stack address. (CPUs started with
199 startupcpu() above will have their stack pointer
200 set to this value.)</td>
201 </tr>
202 <tr>
203 <td align="left" valign="top"><tt>0x0080</tt></td>
204 <td align="left" valign="top">Read: <b><tt>hardware_random()</tt></b>.
205 This produces a "random" number.</td>
206 </tr>
207 <tr>
208 <td align="left" valign="top"><tt>0x0090</tt></td>
209 <td align="left" valign="top">Read: <b><tt>memory()</tt></b>.
210 Returns the number of bytes of RAM in the system.</td>
211 </tr>
212 <tr>
213 <td align="left" valign="top"><tt>0x00a0</tt></td>
214 <td align="left" valign="top">Write: <b><tt>ipi_one((nr &lt;&lt; 16) + cpuid)</tt></b>.
215 Sends IPI <tt>nr</tt> to a specific CPU.</td>
216 </tr>
217 <tr>
218 <td align="left" valign="top"><tt>0x00b0</tt></td>
219 <td align="left" valign="top">Write: <b><tt>ipi_many((nr &lt;&lt; 16) + cpuid)</tt></b>.
220 Sends IPI <tt>nr</tt> to all CPUs <i>except</i>
221 the specified one.</td>
222 </tr>
223 <tr>
224 <td align="left" valign="top"><tt>0x00c0</tt></td>
225 <td align="left" valign="top">Read: <b><tt>ipi_read()</tt></b>.
226 Returns the next pending IPI. 0 is returned if there is no
227 pending IPI (so 0 shouldn't be used for valid IPIs).
228 Hardware int 6 is deasserted when the IPI queue is empty.
229 <br>Write: <b><tt>ipi_flush()</tt></b>.
230 Clears the IPI queue, discarding any pending IPIs.</td>
231 </tr>
232 <tr>
233 <td align="left" valign="top"><tt>0x00d0</tt></td>
234 <td align="left" valign="top">Read: <b><tt>ncycles()</tt></b>.
235 Returns approximately the number of cycles executed on
236 this CPU. Note: this value is not updated for every instruction,
237 so it cannot be used for small measurements.</td>
238 </tr>
239 </table>
240 </td>
241 </tr>
242
243 <tr height="15">
244 <td height="15">&nbsp;</td>
245 </tr>
246
247 <tr>
248 <td align="left" valign="top">
249 <a name="expdevices_fb"><b><tt>fb</tt>:</b></a>
250 <p>A simple linear framebuffer, for graphics output.
251 640 x 480 pixels, 3 bytes per pixel (red, green, blue, 8 bits each).
252 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_fb.c</tt></font>
253 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_fb.h</tt></font>
254 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x12000000</font>
255 </td>
256 <td></td>
257 <td align="left" valign="top">
258 <table border="0">
259 <tr>
260 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
261 <td align="left" valign="top"><i><u>Effect:</u></i></td>
262 </tr>
263 <tr>
264 <td align="left" valign="top"><tt>0x00000-</tt><br><tt>0xe0fff</tt></td>
265 <td align="left" valign="top">Read: read pixel values.
266 <br>Write: write pixel values.</td>
267 </tr>
268 </table>
269 </td>
270 </tr>
271
272 <tr height="15">
273 <td height="15">&nbsp;</td>
274 </tr>
275
276 <tr>
277 <td align="left" valign="top">
278 <a name="expdevices_disk"><b><tt>disk</tt>:</b></a>
279 <p>Disk controller, which can read from and write
280 to emulated IDE disks. It does not use interrupts; read and
281 write operations finish instantaneously.
282 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_disk.c</tt></font>
283 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_disk.h</tt></font>
284 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x13000000</font>
285 </td>
286 <td></td>
287 <td align="left" valign="top">
288 <table border="0">
289 <tr>
290 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
291 <td align="left" valign="top"><i><u>Effect:</u></i></td>
292 </tr>
293 <tr>
294 <td align="left" valign="top"><tt>0x0000</tt></td>
295 <td align="left" valign="top">Write: Set the offset (in bytes) from the beginning
296 of the disk image. This offset will be used for the next read/write operation.</td>
297 </tr>
298 <tr>
299 <td align="left" valign="top"><tt>0x0010</tt></td>
300 <td align="left" valign="top">Write: Select the IDE ID to be used in the next
301 read/write operation.</td>
302 </tr>
303 <tr>
304 <td align="left" valign="top"><tt>0x0020</tt></td>
305 <td align="left" valign="top">Write: Start a read or write operation.
306 (Writing <tt>0</tt> means a Read operation, a <tt>1</tt> means a
307 Write operation.)</td>
308 </tr>
309 <tr>
310 <td align="left" valign="top"><tt>0x0030</tt></td>
311 <td align="left" valign="top">Read: Get status of the last operation.
312 (Status 0 means failure, non-zero means success.)</td>
313 </tr>
314 <tr>
315 <td align="left" valign="top"><tt>0x4000-</tt><br><tt>0x41ff</tt>&nbsp;&nbsp;&nbsp;</td>
316 <td align="left" valign="top">Read/Write: 512 bytes data buffer.</td>
317 </tr>
318 </table>
319 </td>
320 </tr>
321
322 <tr height="15">
323 <td height="15">&nbsp;</td>
324 </tr>
325
326 <tr>
327 <td align="left" valign="top">
328 <a name="expdevices_ether"><b><tt>ether</tt>:</b></a>
329 <p>A simple ethernet controller, enough to send
330 and receive packets on a simulated network.
331 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_ether.c</tt></font>
332 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_ether.h</tt></font>
333 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x14000000</font>
334 </td>
335 <td></td>
336 <td align="left" valign="top">
337 <table border="0">
338 <tr>
339 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
340 <td align="left" valign="top"><i><u>Effect:</u></i></td>
341 </tr>
342 <tr>
343 <td align="left" valign="top"><tt>0x0000-</tt><br><tt>0x3fff</tt></td>
344 <td align="left" valign="top">Read/write buffer for the packet to be sent/received.</td>
345 </tr>
346 <tr>
347 <td align="left" valign="top"><tt>0x4000</tt></td>
348 <td align="left" valign="top">Read: status word, one or more of these:
349 <br><tt>0x01</tt>&nbsp;=&nbsp;something was received (because of
350 the last command)
351 <br><tt>0x02</tt>&nbsp;=&nbsp;more packets are available
352 <br><i>NOTE:</i> Whenever the status word is non-zero,
353 an interrupt is asserted. Reading the status word
354 clears it, and deasserts the interrupt.</td>
355 </tr>
356 <tr>
357 <td align="left" valign="top"><tt>0x4010</tt></td>
358 <td align="left" valign="top">Read: get the Length of the received packet
359 <br>Write: set the Length of the next packet to transmit</td>
360 </tr>
361 <tr>
362 <td align="left" valign="top"><tt>0x4020</tt></td>
363 <td align="left" valign="top">Write: command:
364 <br><tt>0x00:</tt>&nbsp;receive a packet
365 <br><tt>0x01:</tt>&nbsp;send a packet</td>
366 </tr>
367 </table>
368 </td>
369 </tr>
370
371 <tr height="15">
372 <td height="15">&nbsp;</td>
373 </tr>
374
375 <tr>
376 <td align="left" valign="top">
377 <a name="expdevices_rtc"><b><tt>rtc</tt>:</b></a>
378 <p>A Real-Time Clock, used to retrieve the current time
379 and to cause periodic interrupts.
380 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_rtc.c</tt></font>
381 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_rtc.h</tt></font>
382 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x15000000</font>
383 </td>
384 <td></td>
385 <td align="left" valign="top">
386 <table border="0">
387 <tr>
388 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
389 <td align="left" valign="top"><i><u>Effect:</u></i></td>
390 </tr>
391 <tr>
392 <td align="left" valign="top"><tt>0x0000</tt></td>
393 <td align="left" valign="top">Read or Write: Trigger a clock update (a gettimeofday() on the host).</td>
394 </tr>
395 <tr>
396 <td align="left" valign="top"><tt>0x0010</tt></td>
397 <td align="left" valign="top">Read: Seconds since 1st January 1970</td>
398 </tr>
399 <tr>
400 <td align="left" valign="top"><tt>0x0020</tt></td>
401 <td align="left" valign="top">Read: Microseconds</td>
402 </tr>
403 <tr>
404 <td align="left" valign="top"><tt>0x0100</tt></td>
405 <td align="left" valign="top">Read: Get the current
406 timer interrupt frequency.<br>Write: Set the timer
407 interrupt frequency. (Writing 0 disables the timer.)</td>
408 </tr>
409 <tr>
410 <td align="left" valign="top"><tt>0x0110</tt></td>
411 <td align="left" valign="top">Read or Write: Acknowledge
412 one timer interrupt. (Note that if multiple interrupts
413 are pending, only one is acknowledged.)</td>
414 </tr>
415 </table>
416 </td>
417 </tr>
418
419 <tr height="15">
420 <td height="15">&nbsp;</td>
421 </tr>
422
423 <tr>
424 <td align="left" valign="top">
425 <a name="expdevices_irqc"><b><tt>irqc</tt>:</b></a>
426 <p>An Interrupt Controller. (Note: Not used for the MIPS test machine.)
427 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_irqc.c</tt></font>
428 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_irqc.h</tt></font>
429 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x16000000</font>
430 </td>
431 <td></td>
432 <td align="left" valign="top">
433 <table border="0">
434 <tr>
435 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
436 <td align="left" valign="top"><i><u>Effect:</u></i></td>
437 </tr>
438 <tr>
439 <td align="left" valign="top"><tt>0x0</tt></td>
440 <td align="left" valign="top">Read: IRQ status as a 32-bit word, one bit per interrupt source.</td>
441 </tr>
442 <tr>
443 <td align="left" valign="top"><tt>0x4</tt></td>
444 <td align="left" valign="top">Write: Mask one interrupt source. Value should be an integer 0..31.</td>
445 </tr>
446 <tr>
447 <td align="left" valign="top"><tt>0x8</tt></td>
448 <td align="left" valign="top">Write: Unmask one interrupt source. Value should be an integer 0..31.</td>
449 </tr>
450 </table>
451 </td>
452 </tr>
453
454 </table></center>
455
456 <p>The include files for the test machine devices are found in
457 <a href="../src/include/testmachine/"><tt>src/include/testmachine/</tt></a>.
458
459 <p>While these devices may resemble real-world hardware, they are
460 intentionally made simpler to use. (An exception is the framebuffer;
461 some machines actually have simple linear framebuffers like this.)
462
463 <p>If the physical address is <tt>0x10000000</tt>, then for MIPS that
464 means that it can be accessed at virtual address
465 <tt>0xffffffffb0000000</tt>. (Actually it can be accessed at
466 <tt>0xffffffff90000000</tt> too, but devices should usually be accessed in
467 a non-cached manner.)
468
469 <p>When using the ARM or PPC test machines, the addresses are
470 <tt>0x10000000</tt>, <tt>0x11000000</tt> etc., so no need to add any
471 virtual displacement.
472
473 <p>The <tt>mp</tt>, <tt>disk</tt>, and <tt>ether</tt> devices are agnostic
474 when it comes to word-length. For example, when reading offset
475 <tt>0x0000</tt> of the <tt>mp</tt> device, you may use any kind of read
476 (an 8-bit read will work just as well as a 64-bit read, although the value
477 will be truncated to 8 bits in the first case). You can <i>not</i>,
478 however, read one byte from <tt>0x0000</tt> and one from <tt>0x0001</tt>,
479 and combine the result. The read from <tt>0x0001</tt> will be invalid.
480
481 <p>The <tt>cons</tt> device should be accessed using 8-bit reads
482 and writes. Doing a getchar() (ie reading from offset <tt>0x00</tt>)
483 returns <tt>0</tt> if no character was available. Whenever a character is
484 available, the <tt>cons</tt> device' interrupt is asserted. When there are
485 no more available characters, the interrupt is deasserted. (Remember that
486 the interrupt has to be unmasked to be able to actually cause an
487 interrupt.)
488
489 <p>IPIs (inter-processor interrupts) are controlled by the <tt>mp</tt>
490 device. Whenever an IPI is "sent" from a source to one or more target
491 CPUs, the interrupt is asserted on the target CPUs, and the IPI number is
492 added last in the IPI queue for each of the target CPUs. It is then up to
493 those CPUs to individually read from offset <tt>0x00c0</tt>, to figure out
494 what kind of IPI it was.
495
496
497
498 <p>Interrupt mappings are as follows:
499
500 <p><center>
501 <table border="1">
502 <tr><td align="center">
503 <b><tt>testmips</tt></b> (as native MIPS interrupts)
504 </td></tr>
505 <tr><td>
506 <table border="0">
507 <tr><td align="center">IRQ:</td><td>&nbsp;</td>
508 <td>Used for:</td></tr>
509 <tr><td align="center">7</td><td></td>
510 <td>MIPS count/compare interrupt</td></tr>
511 <tr><td align="center">6</td><td></td>
512 <td><tt>mp</tt> (inter-processor interrupts)</td></tr>
513 <tr><td align="center">4</td><td></td>
514 <td><tt>rtc</tt></td></tr>
515 <tr><td align="center">3</td><td></td>
516 <td><tt>ether</tt></td></tr>
517 <tr><td align="center">2</td><td></td>
518 <td><tt>cons</tt></td></tr>
519 </table>
520 </td></tr>
521 </table>
522
523 <p><table border="1">
524 <tr><td align="center">
525 <b><tt>testarm</tt> and others</b> (via the <tt>irqc</tt> device)
526 </td></tr>
527 <tr><td>
528 <table border="0">
529 <tr><td align="center">IRQ:</td><td>&nbsp;</td>
530 <td>Used for:</td></tr>
531 <tr><td align="center">6</td><td></td>
532 <td><tt>mp</tt> (inter-processor interrupts)</td></tr>
533 <tr><td align="center">4</td><td></td>
534 <td><tt>rtc</tt></td></tr>
535 <tr><td align="center">3</td><td></td>
536 <td><tt>ether</tt></td></tr>
537 <tr><td align="center">2</td><td></td>
538 <td><tt>cons</tt></td></tr>
539 </table>
540 </td></tr>
541 </table>
542 </center>
543
544
545
546 <p><br>
547
548
549
550 </p>
551
552 </body>
553 </html>

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