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revision 7 by dpavlin, Mon Oct 8 16:18:11 2007 UTC revision 8 by dpavlin, Mon Oct 8 16:18:19 2007 UTC
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1  <html>  <html>
2  <head><title>GXemul documentation: Experimenting with GXemul</title>  <head><title>GXemul documentation: Experimenting with GXemul</title>
3    <meta name="robots" content="noarchive,nofollow,noindex">
4  </head>  </head>
5  <body bgcolor="#f8f8f8" text="#000000" link="#4040f0" vlink="#404040" alink="#ff0000">  <body bgcolor="#f8f8f8" text="#000000" link="#4040f0" vlink="#404040" alink="#ff0000">
6  <table border=0 width=100% bgcolor="#d0d0d0"><tr>  <table border=0 width=100% bgcolor="#d0d0d0"><tr>
# Line 8  Line 9 
9  <b>GXemul documentation:</b></font>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;  <b>GXemul documentation:</b></font>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
10  <font color="#000000" size="6"><b>Experimenting with GXemul</b>  <font color="#000000" size="6"><b>Experimenting with GXemul</b>
11  </font></td></tr></table></td></tr></table><p>  </font></td></tr></table></td></tr></table><p>
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14    
15  $Id: experiments.html,v 1.68 2005/05/27 07:29:23 debug Exp $  $Id: experiments.html,v 1.71 2005/06/12 12:31:53 debug Exp $
16    
17  Copyright (C) 2003-2005  Anders Gavare.  All rights reserved.  Copyright (C) 2003-2005  Anders Gavare.  All rights reserved.
18    
# Line 221  It can either run in "bare" mode, where Line 220  It can either run in "bare" mode, where
220  emulated.  emulated.
221    
222  <p>  <p>
223  The "test" MIPS machine has the following experimental devices:  The <tt>testmips</tt> machine has the following experimental devices:
224    
225  <p>  <p>
226  <center><table border="0" width="80%">  <center><table border="0" width="80%">
227    
228    <tr>    <tr>
229      <td align="left" valign="top" width="200">      <td align="left" valign="top" width="200">
230          <b>cons:</b>          <b><tt>cons</tt>:</b>
231          <p>This is a simple console device, for writing          <p>This is a simple console device, for writing
232          characters to the controlling terminal.          characters to the controlling terminal.
233          <p>Source code:&nbsp;&nbsp;<font color="#0000f0">devices/dev_cons.c</font>          <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_cons.c</tt></font>
234          <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x10000000</font>          <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x10000000</font>
235      </td>      </td>
236      <td align="left" valign="top" width="25">&nbsp;</td>      <td align="left" valign="top" width="25">&nbsp;</td>
# Line 244  The "test" MIPS machine has the followin Line 243  The "test" MIPS machine has the followin
243            <tr>            <tr>
244              <td align="left" valign="top">0x0000</td>              <td align="left" valign="top">0x0000</td>
245              <td align="left" valign="top">              <td align="left" valign="top">
246                  Read: <b>getchar()</b> (non-blocking)<br>                  Read: <b><tt>getchar()</tt></b> (non-blocking)<br>
247                  Write: <b>putchar(ch)</b></td>                  Write: <b><tt>putchar(ch)</tt></b></td>
248            </tr>            </tr>
249            <tr>            <tr>
250              <td align="left" valign="top">0x0010</td>              <td align="left" valign="top">0x0010</td>
251              <td align="left" valign="top">Read or write: <b>halt()</b><br>              <td align="left" valign="top">Read or write: <b><tt>halt()</tt></b><br>
252                  (Useful for exiting the emulator.)</td>                  (Useful for exiting the emulator.)</td>
253            </tr>            </tr>
254          </table>          </table>
# Line 262  The "test" MIPS machine has the followin Line 261  The "test" MIPS machine has the followin
261    
262    <tr>    <tr>
263      <td align="left" valign="top">      <td align="left" valign="top">
264          <b>mp:</b>          <b><tt>mp</tt>:</b>
265          <p>This device controls the behaviour of CPUs in an emulated          <p>This device controls the behaviour of CPUs in an emulated
266          multi-processor system.          multi-processor system.
267          <p>Source code:&nbsp;&nbsp;<font color="#0000f0">devices/dev_mp.c</font>          <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_mp.c</tt></font>
268          <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x11000000</font>          <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x11000000</font>
269      </td>      </td>
270      <td></td>      <td></td>
# Line 277  The "test" MIPS machine has the followin Line 276  The "test" MIPS machine has the followin
276            </tr>            </tr>
277            <tr>            <tr>
278              <td align="left" valign="top">0x0000</td>              <td align="left" valign="top">0x0000</td>
279              <td align="left" valign="top">Read: <b>whoami()</b>.              <td align="left" valign="top">Read: <b><tt>whoami()</tt></b>.
280                  Returns the id of the CPU doing the read.</td>                  Returns the id of the CPU doing the read.</td>
281            </tr>            </tr>
282            <tr>            <tr>
283              <td align="left" valign="top">0x0010</td>              <td align="left" valign="top">0x0010</td>
284              <td align="left" valign="top">Read: <b>ncpus()</b>.              <td align="left" valign="top">Read: <b><tt>ncpus()</tt></b>.
285                  Returns the number of CPUs in the system.</td>                  Returns the number of CPUs in the system.</td>
286            </tr>            </tr>
287            <tr>            <tr>
288              <td align="left" valign="top">0x0020</td>              <td align="left" valign="top">0x0020</td>
289              <td align="left" valign="top">Write: <b>startupcpu(i)</b>.              <td align="left" valign="top">Write: <b><tt>startupcpu(i)</tt></b>.
290                  Starts CPU i. It begins execution at the address                  Starts CPU i. It begins execution at the address
291                  set by a write to startupaddr (see below).</td>                  set by a write to startupaddr (see below).</td>
292            </tr>            </tr>
293            <tr>            <tr>
294              <td align="left" valign="top">0x0030</td>              <td align="left" valign="top">0x0030</td>
295              <td align="left" valign="top">Write: <b>startupaddr(addr)</b>.              <td align="left" valign="top">Write: <b><tt>startupaddr(addr)</tt></b>.
296                  Sets the starting address for CPUs.</td>                  Sets the starting address for CPUs.</td>
297            </tr>            </tr>
298            <tr>            <tr>
299              <td align="left" valign="top">0x0040</td>              <td align="left" valign="top">0x0040</td>
300              <td align="left" valign="top">Write: <b>pause_addr(addr)</b>.              <td align="left" valign="top">Write: <b><tt>pause_addr(addr)</tt></b>.
301                  Sets the pause address. (TODO: This is not                  Sets the pause address. (TODO: This is not
302                  used anymore?)</td>                  used anymore?)</td>
303            </tr>            </tr>
304            <tr>            <tr>
305              <td align="left" valign="top">0x0050</td>              <td align="left" valign="top">0x0050</td>
306              <td align="left" valign="top">Write: <b>pause_cpu(i)</b>.              <td align="left" valign="top">Write: <b><tt>pause_cpu(i)</tt></b>.
307                  Stops all CPUs <i>except</i> CPU i.</td>                  Stops all CPUs <i>except</i> CPU i.</td>
308            </tr>            </tr>
309            <tr>            <tr>
310              <td align="left" valign="top">0x0060</td>              <td align="left" valign="top">0x0060</td>
311              <td align="left" valign="top">Write: <b>unpause_cpu(i)</b>.              <td align="left" valign="top">Write: <b><tt>unpause_cpu(i)</tt></b>.
312                  Unpauses all CPUs <i>except</i> CPU i.</td>                  Unpauses all CPUs <i>except</i> CPU i.</td>
313            </tr>            </tr>
314            <tr>            <tr>
315              <td align="left" valign="top">0x0070</td>              <td align="left" valign="top">0x0070</td>
316              <td align="left" valign="top">Write: <b>startupstack(addr)</b>.              <td align="left" valign="top">Write: <b><tt>startupstack(addr)</tt></b>.
317                  Sets the startup stack address. (CPUs started with                  Sets the startup stack address. (CPUs started with
318                  startupcpu() above will have their stack pointer                  startupcpu() above will have their stack pointer
319                  set to this value.)</td>                  set to this value.)</td>
320            </tr>            </tr>
321            <tr>            <tr>
322              <td align="left" valign="top">0x0080</td>              <td align="left" valign="top">0x0080</td>
323              <td align="left" valign="top">Read: <b>hardware_random()</b>.              <td align="left" valign="top">Read: <b><tt>hardware_random()</tt></b>.
324                  This produces a "random" number.</td>                  This produces a "random" number.</td>
325            </tr>            </tr>
326            <tr>            <tr>
327              <td align="left" valign="top">0x0090</td>              <td align="left" valign="top">0x0090</td>
328              <td align="left" valign="top">Read: <b>memory()</b>.              <td align="left" valign="top">Read: <b><tt>memory()</tt></b>.
329                  Returns the number of bytes of RAM in the system.</td>                  Returns the number of bytes of RAM in the system.</td>
330            </tr>            </tr>
331              <tr>
332                <td align="left" valign="top">0x00a0</td>
333                <td align="left" valign="top">Write: <b><tt>ipi_one((nr &lt;&lt; 16) + cpuid)</tt></b>.
334                    Sends IPI <tt>nr</tt> to a specific CPU.</td>
335              </tr>
336              <tr>
337                <td align="left" valign="top">0x00b0</td>
338                <td align="left" valign="top">Write: <b><tt>ipi_many((nr &lt;&lt; 16) + cpuid)</tt></b>.
339                    Sends IPI <tt>nr</tt> to all CPUs <i>except</i>
340                    the specified one.</td>
341              </tr>
342              <tr>
343                <td align="left" valign="top">0x00c0</td>
344                <td align="left" valign="top">Read: <b><tt>ipi_read()</tt></b>.
345                    Returns the next pending IPI. 0 is returned if there is no
346                    pending IPI (so 0 shouldn't be used for valid IPIs).
347                    Hardware int 6 is deasserted when the IPI queue is empty.
348                <br>Write: <b><tt>ipi_flush()</tt></b>.
349                    Clears the IPI queue, discarding any pending IPIs.</td>
350              </tr>
351          </table>          </table>
352      </td>      </td>
353    </tr>    </tr>
# Line 339  The "test" MIPS machine has the followin Line 358  The "test" MIPS machine has the followin
358    
359    <tr>    <tr>
360      <td align="left" valign="top">      <td align="left" valign="top">
361          <b>fb:</b>          <b><tt>fb</tt>:</b>
362          <p>A simple linear framebuffer, for graphics output.          <p>A simple linear framebuffer, for graphics output.
363          640 x 480 pixels, 3 bytes per pixel (red, green, blue, 8 bits each).          640 x 480 pixels, 3 bytes per pixel (red, green, blue, 8 bits each).
364          <p>Source code:&nbsp;&nbsp;<font color="#0000f0">devices/dev_fb.c</font>          <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_fb.c</tt></font>
365          <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x12000000</font>          <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x12000000</font>
366      </td>      </td>
367      <td></td>      <td></td>
# Line 375  accessed at 0xffffffff90000000 too, but Line 394  accessed at 0xffffffff90000000 too, but
394  in a non-cached manner.)  in a non-cached manner.)
395    
396  <p>  <p>
397  (When using the PPC test machine, "testppc", the addresses are  (When using the PPC test machine (<tt>testppc</tt>), the addresses are
398  0x10000000, 0x11000000 etc., so no need to add any virtual displacement.)  0x10000000, 0x11000000 etc., so no need to add any virtual displacement.)
399    
400  <p>  <p>The <b><tt>mp</tt></b> device is agnostic when it comes to word-length.
401  The <b>mp</b> device is agnostic when it comes to  For example, when reading offset 0x0000 of the <b><tt>mp</tt></b> device,
402  word-length. For example, when reading offset 0x0000 of the <b>mp</b>  you may use any kind of read (an 8-bit read will work just as well as a
403  device, you may use any kind of read (an 8-bit read will work just as well  64-bit read, although the value will be truncated to 8 bits in the first
404  as a 64-bit read, although the value will be truncated to 8 bits in the  case).
405  first case).  
406    <p>The <b><tt>cons</tt></b> device should be accessed using 8-bit reads
407  <p>  and writes. Doing a getchar() (ie reading from offset 0x0000) returns 0x00
408  The <b>cons</b> device should be accessed using 8-bit reads and writes.  if no character was available.
409  Doing a getchar() (ie reading from offset 0x0000) returns 0x00 if no  
410  character was available.  <p>On MIPS, the <b><tt>cons</tt></b> device is hardwired to interrupt 2
411    (the lowest hardware interrupt). Whenever a character is available, the
412  <p>  interrupt is asserted. When there are no more available characters, the
413  On MIPS, the <b>cons</b> device is hardwired to interrupt 2 (the lowest  interrupt is deasserted. (Remember that the interrupt has to be enabled in
414  hardware interrupt). Whenever a character is available, the interrupt is  the status register of the system coprocessor.)
415  asserted. When there are no more available characters, the interrupt is  
416  deasserted. (Remember that the interrupt has to be enabled in the status  <p>The IPIs controlled by the <b><tt>mp</tt></b> device are hardwired to
417  register of the system coprocessor.)  interrupt 6. Whenever an IPI is "sent", interrupt 6 is asserted on the
418    target CPU(s), and the IPI number is added last in the IPI queue for that
419    CPU. It is then up to that CPU to read from offset 0x00c0, to figure out
420    what kind of IPI it was.
421    
422    
423    
# Line 660  probably doesn't work in GXemul. Line 681  probably doesn't work in GXemul.
681  </ul>  </ul>
682    
683  <p>  <p>
684  The following work even less than the ones listed above:  The following don't work at all, or just very very little.
685    
686  <p>  <p>
687  <ul>  <ul>
# Line 705  The following work even less than the on Line 726  The following work even less than the on
726      </ul>      </ul>
727    </li>    </li>
728    
729  </ul>    <p>
730    
731  <p>    <li>EVBMIPS:
732  The following don't work at all, actually, because the PPC and SPARC      <ul>
733  modes are just skeletons so far.        <li><a href="http://www.netbsd.org/Ports/evbmips/">NetBSD/evbmips</a>:
734            <br><a href="ftp://ftp.netbsd.org/pub/NetBSD/NetBSD-2.0.2/evbmips-mipseb/binary/kernel/">ftp://ftp.netbsd.org/pub/NetBSD/NetBSD-2.0.2/evbmips-mipseb/binary/kernel</a>/<a href="ftp://ftp.netbsd.org/pub/NetBSD/NetBSD-2.0.2/evbmips-mipseb/binary/kernel/netbsd-MALTA.gz">netbsd-MALTA.gz</a>
735            <br><b><tt>gxemul -t -E evbmips -e malta netbsd-MALTA</tt></b>
736            <br>or
737            <br><a href="ftp://ftp.netbsd.org/pub/NetBSD/NetBSD-2.0.2/evbmips-mipseb/binary/kernel/">ftp://ftp.netbsd.org/pub/NetBSD/NetBSD-2.0.2/evbmips-mipseb/binary/kernel</a>/<a href="ftp://ftp.netbsd.org/pub/NetBSD/NetBSD-2.0.2/evbmips-mipseb/binary/kernel/netbsd-PB1000.gz">netbsd-PB1000.gz</a>
738            <br><b><tt>gxemul -t -E evbmips -e pb1000 netbsd-PB1000</tt></b>
739        </ul>
740      </li>
741    
742  <p>    <p>
 <ul>  
743    
744    <li>Walnut (evbppc):    <li>Walnut (evbppc):
745      <ul>      <ul>

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