/[gxemul]/trunk/TODO
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 24 by dpavlin, Mon Oct 8 16:19:56 2007 UTC revision 30 by dpavlin, Mon Oct 8 16:20:40 2007 UTC
# Line 1  Line 1 
1  $Id: TODO,v 1.292 2006/06/23 09:13:34 debug Exp $  $Id: TODO,v 1.343 2006/08/14 18:46:30 debug Exp $
2    
3  Hm. This file is in random order, and not all parts of it are up-to-date.  Hm. This file is in random order, and not all parts of it are up-to-date.
4    
 --------------  
5    
6  Possible release schedule:  Implementation:
7            x)  ARM "wait"-like instruction.
8            x)  CLOCK FRAMEWORK!
9            x)  Mouse support for NetBSD/pmax 4.x!
10            x)  See netwinder_reset() in NetBSD; the current "an internal error
11                occured" message after reboot/halt is too ugly.
12            x)  64-bit ranges in src/cpus/memory_mips_v2p.c
13            x)  Revert the dyntrans page template experiment? Hm.
14            x)  Refactor the cpu type detection/initialization/listing.
15                    Macro, which can be used as long as the cpu definitions
16                    contain a 'name'?
17            x)  Testmachine includes:
18                    + dev_fb block fill and copy
19                    + dev_fb draw characters (from the built-in font)?
20                    + dev_fb input device? mouse pointer coordinates and buttons
21                            (allow changes in these to cause interrupts as well?)
22                    + Redefine the halt() function so that it stops "sometimes
23                      soon", i.e. usage in demo code should be:
24                            for (;;) {
25                                    halt();
26                            }
27            x)  Continue on SPARC emulation
28                    + Enable it in the configure script as soon as it can
29                      run all the demo programs.
30            x)  Continue on Alpha emulation  (virtual memory, etc). Cleanup.
31            x)  Nicer MIPS status bits in register dumps.
32            x)  Alignment exceptions (MIPS, PPC, ARM?, ...)
33            x)  Rewrite the networking stack; make OpenBSD work better as a guest
34                OS, fix the performance problems, make Linux work with DHCP, etc.
35                Support VDE (vde.sf.net)? Allow SLIP connections, possibly PPP,
36                in addition to ethernet?
37            x)  Implement more ethernet NICs.
38            x)  IOP (I2O) device?
39    
40  0.4.0:  Documentation:
41          x)  Quick release, even though performance for non-R3000 MIPS dyntrans          x)  "Install netbsd/pmax first" => only use the install kernel?
42              is really poor. (Assuming everything mentioned in the documentation          x)  Rewrite the section about experimental devices, after the
43              works as expected.)              framebuffer acceleration has been implemented, and demos
44                written. (Symbolic names instead of numbers; example
45  0.4.1:              use cases, etc. Mention demo files that use the various
46          x)  FIX THE NON-R3000 TRANSLATION CACHE INVALIDATION BOTTLENECKS!              features?)
47          x)  Fix the interrupt problems with Ultrix!          x)  "a very simple linear framebuffer device (for graphics output)"
48          x)  Find/fix bug which is triggered when building the emulator inside              under "which machines does gxemul emulate" ==> better
49              NetBSD/pmax 3.0 inside the emulator!              description?
50            x)  Better description on how to set up a cross compiler?
51  0.4.2 ...?              Example for MIPS64.
52          x)  Clean-up!  
53          x)  Clock framework? Go through all clock devices, make sure they  Long-term design:
54            x)  Instruction combination collisions? How to avoid easily...
55            x)  Think about how to do both SHmedia and SHcompact in a reasonable
56                way!
57            o)  Actually use the settings object, better debugger stuff, etc!
58            o)  Debugger command for enabling/disabling instruction statistics
59                during runtime.   machine.statistics = on|off
60            x)  MAINBUS REDESIGN!
61            x)  PCI redesign... I need to read up on how PCI actually works :)
62            x)  Clock framework! Go through all clock devices, make sure they
63              return correct data, and run at correct speeds!              return correct data, and run at correct speeds!
64          x)  Optimizations, continuing on 64-bit issues etc with dyntrans          x)  Dyntrans with valgrind-inspired memory checker. (In memory_rw,
65                it would be reasonably simple to add; in each individual fast
66                load/store routine = a lot more work, and it would become
67                kludgy very fast.)
68          x)  Dyntrans with SMP... lots of work to be done here.          x)  Dyntrans with SMP... lots of work to be done here.
69          x)  Dyntrans with cache emulation... lots of work here as well.          x)  Dyntrans with cache emulation... lots of work here as well.
70          x)  Actually use the settings object, better debugger stuff, etc.          x)  Reimplement the config file parser from scratch.
71          x)  Wait for new releases of NetBSD, and test with those.  
72    -------------------------------------------------------------------------------
73    
74  --------------  Simple Valgrind-like checks?
75            o)  Mark every address with bits which tell whether or not the address
76                has been written to.
77            o)  What should happen when programs are loaded?  Text/data, bss (zero
78                filled). But stack space and heap is uninitialized.
79            o)  Uninitialized local variables:
80                    A load from a place on the stack which has not previously
81                    been stored to => warning. Increasing the stack pointer using
82                    any available means should reset the memory to uninitialized.
83            o)  If calls to malloc() and free() can be intercepted:
84                    o)  Access to a memory area after free() => warning.
85                    o)  Memory returned by malloc() is marked as not-initialized.
86                    o)  Non-passive, but good to have: Change the argument
87                        given to malloc, to return a slightly larger memory
88                        area, i.e.  margin_before + size + margin_after,
89                        and return the pointer  + margin_before.
90                        Any access to the margin_before or _after space results
91                        in warnings. (free() must be modified to free the
92                        actually allocated address.)
93    
94  SMP:  SMP:
95          o)  dev_mp doesn't work well with dyntrans yet          o)  dev_mp doesn't work well with dyntrans yet
96          o)  In general, IPIs, CAS, LL/SC etc must be made to work with dyntrans          o)  In general, IPIs, CAS, LL/SC etc must be made to work with dyntrans
97    
98  MIPS:  MIPS:
         o)  Fix invalidate_asid so it works well for non-R3000 too!  
         x)  [Re]add an interrupt-asserted bit for MIPS, to speed up  
             interrupt handling slightly?  
         +)  Print a warning on the first reserved instruction.  
99          +)  Some more work on opcodes.          +)  Some more work on opcodes.
100                    x) The "wait" instruction. How to implement this functionality?
101                            (SMP, non-MIPS, interrupt correctness, host idling, ...)
102                  x) MIPS64 revision 2.                  x) MIPS64 revision 2.
103                            o)  Find out which actual CPUs implement the rev2 ISA!
104                  x) _MAYBE_ TX79 and R5900 actually differ in their                  x) _MAYBE_ TX79 and R5900 actually differ in their
105                     opcodes? Check this carefully!                     opcodes? Check this carefully!
106          o)  Dyntrans: Count register updates are probably not 100% correct yet.          o)  Dyntrans: Count register updates are probably not 100% correct yet.
         o)  Dyntrans: SMP correctness  
107          o)  Refactor code for performance and readability/maintainability.          o)  Refactor code for performance and readability/maintainability.
         o)  Instruction combinations? Possible candidates (but profile first!):  
                 o)  multiple loads/stores in a row  
                 o)  strlen, memset loops etc  
                 o)  compare + branch  
108          o)  DROTR32 and similar MIPS64 rev 2 instructions, which have          o)  DROTR32 and similar MIPS64 rev 2 instructions, which have
109              a rotation bit which differs from previous ISAs.              a rotation bit which differs from previous ISAs.
110          o)  EI and DI instructions for MIPS64/32 rev 2. NOTE: These are          o)  EI and DI instructions for MIPS64/32 rev 2. NOTE: These are
111              _NOT_ the same as for R5900!              _NOT_ the same as for R5900!
112            o)  (Re)implement 128-bit loads/stores for R5900.
113          o)  R4000 and others:          o)  R4000 and others:
114                  x)  watchhi/watchlo exceptions, and other exception                  x)  watchhi/watchlo exceptions, and other exception
115                      handling details                      handling details
# Line 62  MIPS: Line 119  MIPS:
119                      (http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)                      (http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)
120    
121  Dyntrans:  Dyntrans:
122          x)  Move the mips_init_64bit_dummy_tables() etc calls into          x)  Redesign/rethink the delay slot mechanism used for e.g. MIPS,
123              src/cpu.c, for all 64-bit cpus?                  so that it caches a translation (that is, an instruction
124          x)  64-bit "phystranslation" lookup as in 32-bit mode? Would probably                  word and the instr_call it was translated to the last
125                  help performance a bit.                  time), so that it doesn't need to do slow
126                    to_be_translated for each end of page?
127            x)  Program Counter statistics:
128                    Per machine? What about SMP? All data to the same file?
129                    A debugger command should be possible to use to enable/
130                    disable statistics gathering.
131                    Configuration file option!
132          x)  Common fatal_abort() function, which drops into the debugger          x)  Common fatal_abort() function, which drops into the debugger
133                  without continuing.                  without continuing.
134          x)  INVALIDATION should cause translations in _all_ cpus to be          x)  INVALIDATION should cause translations in _all_ cpus to be
135              invalidated, e.g. on a write to a write-protected page              invalidated, e.g. on a write to a write-protected page
136              (containing code)              (containing code)
         x)  better (formally defined) instr call statistics (-s command  
             line option?), multiple different types? (virtual pc, physical pc)  
         x)  Call/return hints?  
137          x)  16-bit encodings? (MIPS16, ARM Thumb, SH3, ...)          x)  16-bit encodings? (MIPS16, ARM Thumb, SH3, ...)
         x)  H8?  
138          x)  Lots of other stuff: see src/cpus/README_DYNTRANS          x)  Lots of other stuff: see src/cpus/README_DYNTRANS
139          x)  true recompilation backend? think carefully about this,          x)  true recompilation backend? think carefully about this,
140              experiment in a separate project (not in GXemul)              experiment in a separate project (not in GXemul)
141          x)  Remove the dyntrans_alignment_check functionality; although                  o) First test would be to just implement a simple
142              it gives slightly higher peformance sometimes, it increases                     instruction such as MIPS' addiu or lui, on AMD64
143              the complexity of the code too much!                     hosts...
144            x)  Idle loop detection? (Depends on target.) Could be turned
145                into usleep(1) or similar on the host... except when doing
146                e.g. SMP emulation. Then it becomes trickier.
147    
148    Transputer:
149            x)  Implement support for Helios binaries.
150            x)  Stack and register contents at startup?
151            x)  Figure out how to boot an entire Helios distribution.
152            x)  Implement all instructions. :)
153    
154  Alpha:  Alpha:
155          o)  Virtual memory (tlbs etc)          o)  Virtual memory (tlbs etc)
156          o)  Get {NetBSD,OpenBSD,Linux}/alpha booting. :)          o)  Get {NetBSD,OpenBSD,Linux}/alpha booting. :)
157    
158  SPARC:  SPARC:
159          o)  Add all registers (floating point, control regs etc)          o)  Load/stores to alternate address spaces!
160          o)  Save/restore register windows etc!          o)  Save/restore register windows etc!
161          o)  Disassemly of some more instructions.          o)  Finish the subcc and addcc flag computation code.
162            o)  Add more registers (floating point, control regs etc)
163            o)  Disassemly of some more instructions?
164          o)  Are sll etc 32-bit sign-extending or zero-extending?          o)  Are sll etc 32-bit sign-extending or zero-extending?
         o)  Finish the cmp (subcc) flag computation code.  
165          o)  Finish the GDB register stuff.          o)  Finish the GDB register stuff.
166            o)  SPARC v8, v7 etc?
167    
168  Debugger:  Debugger:
169          o)  How does SMP debugging work? Does it simply use "threads"?          o)  How does SMP debugging work? Does it simply use "threads"?
# Line 123  Debugger: Line 193  Debugger:
193                          o)  Remove a setting.                          o)  Remove a setting.
194                          o)  Read/write a setting given a name. (Read as                          o)  Read/write a setting given a name. (Read as
195                              string and/or int64_t simultaneously?)                              string and/or int64_t simultaneously?)
196                            o)  Warnings when exiting the emulator, if the
197                                settings have not been removed exactly in
198                                the same way as they were added? This would
199                                improve code cleanliness in the long term.
200                                (I.e. require a corresponding _destroy()
201                                function for all _new functions... machine_
202                                cpu_ etc.)
203    
204                  Help command should have subsections! One for "expressions",                  Help command should have subsections! One for "expressions",
205                  mirrored in the documentation, but the internal help should                  mirrored in the documentation, but the internal help should
# Line 131  Debugger: Line 208  Debugger:
208    
209  POWER/PowerPC:  POWER/PowerPC:
210          x)  PPC optimizations; instr combs          x)  PPC optimizations; instr combs
211          x)  64-bit stuff          x)  64-bit stuff: either Linux on G5, or perhaps some hobbyist
212                    version of AIX? (if there exists such a thing)
213          x)  find and fix the bug which causes NetBSD/macppc to fail after          x)  find and fix the bug which causes NetBSD/macppc to fail after
214              an install!              an install!
215          x)  macppc: adb controller; keyboard (for framebuffer mode)          x)  macppc: adb controller; keyboard (for framebuffer mode)
216          x)  make OpenBSD/macppc work (PCI controller stuff)          x)  make OpenBSD/macppc work (PCI controller stuff)
217    
218  Algor:  Algor:
219          PCI and ISA and LOCAL interrupts! --> wdc could start working          PCI interrupts... needed or stuff like the tlp NIC?
         Add interrupt controller in dev_algor.c.  
220    
221  ARM:  ARM:
222          o)  try to get netbsd/evbarm 3.x running (iq80321)          o)  try to get netbsd/evbarm 3.x running (iq80321)
# Line 150  ARM: Line 227  ARM:
227              fix this?              fix this?
228    
229  Cache simulation:  Cache simulation:
230            o)  Command line flags for:
231                    o)  CPU endianness?
232                    o)  Cache sizes? (multiple levels)
233          o)  Separate from the CPU concept, so that multi-core CPUs sharing          o)  Separate from the CPU concept, so that multi-core CPUs sharing
234              e.g. a L2 cache can be simulated (?)              e.g. a L2 cache can be simulated (?)
235          o)  Instruction cache emulation is easiest (if separate from the          o)  Instruction cache emulation is easiest (if separate from the
# Line 183  Breakpoints: 32-bit vs 64-bit sign exten Line 263  Breakpoints: 32-bit vs 64-bit sign exten
263          extended soon to support stuff like  "2*x + symbol + y" etc. cool          extended soon to support stuff like  "2*x + symbol + y" etc. cool
264          stuff)          stuff)
265    
 Sprite (guest OS for DECstation emulation)  
         x)  Timing problems during bootup?  
   
266  The Device subsystem:  The Device subsystem:
267          x)  allow devices to be moved and/or changed in size (down to a          x)  allow devices to be moved and/or changed in size (down to a
268              minimum size, etc, or up to a max size)              minimum size, etc, or up to a max size)
# Line 253  ASC SCSI controller: Line 330  ASC SCSI controller:
330              2005/11/06/0024.html suggests that.)              2005/11/06/0024.html suggests that.)
331    
332  Caches / memory hierarchies: (this is mostly MIPS-specific)  Caches / memory hierarchies: (this is mostly MIPS-specific)
         o)  MIPS coproc.c: bits in config registers should reflect  
             correct cache sizes for _all_ CPU types. (currently only  
             implemented for R4000, R1x000, and a few others)  
333          o)  src/memory*.c: Implement correct cache emulation for          o)  src/memory*.c: Implement correct cache emulation for
334              all CPU types. (currently only R2000/R3000 is implemented)              all CPU types. (currently only R2000/R3000 is implemented)
335              (per CPU, multiple levels should be possible,              (per CPU, multiple levels should be possible, associativity etc!)
             associativity etc!)  
336          o)  R2000/R3000 isn't _100%_ correct, just almost correct :)          o)  R2000/R3000 isn't _100%_ correct, just almost correct :)
337          o)  Move the -S (fill mem with random) functionality into the          o)  Move the -S (fill mem with random) functionality into the
338              memory.c subsystem, not machine.c or wherever it is now              memory.c subsystem, not machine.c or wherever it is now
# Line 273  Caches / memory hierarchies: (this is mo Line 346  Caches / memory hierarchies: (this is mo
346              possible.              possible.
347    
348  File/disk/symbol handling:  File/disk/symbol handling:
349            o)  Remove some of the complexity in file format guessing, for
350                    Ultrix kernels that are actually disk images?
351          o)  Better handling of tape files          o)  Better handling of tape files
352          o)  Read function argument count and types from binaries? (ELF?)          o)  Read function argument count and types from binaries? (ELF?)
353          o)  Better demangling of C++ names. Note: GNU's C++ differs from e.g.          o)  Better demangling of C++ names. Note: GNU's C++ differs from e.g.

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