This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Contents of /trunk/TODO

Parent Directory Parent Directory | Revision Log Revision Log

Revision 32 - (show annotations)
Mon Oct 8 16:20:58 2007 UTC (13 years ago) by dpavlin
File size: 20919 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1421 2006/11/06 05:32:37 debug Exp $
20060816	Adding a framework for emulated/virtual timers (src/timer.c),
		using only setitimer().
		Rewriting the mc146818 to use the new timer framework.
20060817	Adding a call to gettimeofday() every now and then (once every
		second, at the moment) to resynch the timer if it drifts.
		Beginning to convert the ISA timer interrupt mechanism (8253
		and 8259) to use the new timer framework.
		Removing the -I command line option.
20060819	Adding the -I command line option again, with new semantics.
		Working on Footbridge timer interrupts; NetBSD/NetWinder and
		NetBSD/CATS now run at correct speed, but unfortunately with
		HUGE delays during bootup.
20060821	Some minor m68k updates. Adding the first instruction: nop. :)
		Minor Alpha emulation updates.
20060822	Adding a FreeBSD development specific YAMON environment
		variable ("khz") (as suggested by Bruce M. Simpson).
		Moving YAMON environment variable initialization from
		machine_evbmips.c into promemul/yamon.c, and adding some more
		Continuing on the LCA PCI bus controller (for Alpha machines).
20060823	Continuing on the timer stuff: experimenting with MIPS count/
		compare interrupts connected to the timer framework.
20060825	Adding bogus SCSI commands 0x51 (SCSICDROM_READ_DISCINFO) and
		0x52 (SCSICDROM_READ_TRACKINFO) to the SCSI emulation layer,
		to allow NetBSD/pmax 4.0_BETA to be installed from CDROM.
		Minor updates to the LCA PCI controller.
20060827	Implementing a CHIP8 cpu mode, and a corresponding CHIP8
		machine, for fun. Disassembly support for all instructions,
		and most of the common instructions have been implemented: mvi,
		mov_imm, add_imm, jmp, rand, cls, sprite, skeq_imm, jsr,
		skne_imm, bcd, rts, ldr, str, mov, or, and, xor, add, sub,
		font, ssound, sdelay, gdelay, bogus skup/skpr, skeq, skne.
20060828	Beginning to convert the CHIP8 cpu in the CHIP8 machine to a
		(more correct) RCA 180x cpu. (Disassembly for all 1802
		instructions has been implemented, but no execution yet, and
		no 1805 extended instructions.)
20060829	Minor Alpha emulation updates.
20060830	Beginning to experiment a little with PCI IDE for SGI O2.
		Fixing the cursor key mappings for MobilePro 770 emulation.
		Fixing the LK201 warning caused by recent NetBSD/pmax.
		The MIPS R41xx standby, suspend, and hibernate instructions now
		behave like the RM52xx/MIPS32/MIPS64 wait instruction.
		Fixing dev_wdc so it calculates correct (64-bit) offsets before
		giving them to diskimage_access().
20060831	Continuing on Alpha emulation (OSF1 PALcode).
20060901	Minor Alpha updates; beginning on virtual memory pagetables.
		Removed the limit for max nr of devices (in preparation for
		allowing devices' base addresses to be changed during runtime).
		Adding a hack for MIPS [d]mfc0 select 0 (except the count
		register), so that the coproc register is simply copied.
		The MIPS suspend instruction now exits the emulator, instead
		of being treated as a wait instruction (this causes NetBSD/
		hpcmips to get correct 'halt' behavior).
		The VR41xx RTC now returns correct time.
		Connecting the VR41xx timer to the timer framework (fixed at
		128 Hz, for now).
		Continuing on SPARC emulation, adding more instructions:
		restore, ba_xcc, ble. The rectangle drawing demo works :)
		Removing the last traces of the old ENABLE_CACHE_EMULATION
		MIPS stuff (not usable with dyntrans anyway).
20060902	Splitting up src/net.c into several smaller files in its own
		subdirectory (src/net/).
20060903	Cleanup of the files in src/net/, to make them less ugly.
20060904	Continuing on the 'settings' subsystem.
		Minor progress on the SPARC emulation mode.
20060905	Cleanup of various things, and connecting the settings
		infrastructure to various subsystems (emul, machine, cpu, etc).
		Changing the lk201 mouse update routine to not rely on any
		emulated hardware framebuffer cursor coordinates, but instead
		always do (semi-usable) relative movements.
20060906	Continuing on the lk201 mouse stuff. Mouse behaviour with
		multiple framebuffers (which was working in Ultrix) is now
		semi-broken (but it still works, in a way).
		Moving the documentation about networking into its own file
		(networking.html), and refreshing it a bit. Adding an example
		of how to use ethernet frame direct-access (udp_snoop).
20060907	Continuing on the settings infrastructure.
20060908	Minor updates to SH emulation: for 32-bit emulation: delay
		slots and the 'jsr @Rn' instruction. I'm putting 64-bit SH5 on
		ice, for now.
20060909-10	Implementing some more 32-bit SH instructions. Removing the
		64-bit mode completely. Enough has now been implemented to run
		the rectangle drawing demo. :-)
20060912	Adding more SH instructions.
20060916	Continuing on SH emulation (some more instructions: div0u,
		div1, rotcl/rotcr, more mov instructions, dt, braf, sets, sett,
		tst_imm, dmuls.l, subc, ldc_rm_vbr, movt, clrt, clrs, clrmac).
		Continuing on the settings subsystem (beginning on reading/
		writing settings, removing bugs, and connecting more cpus to
		the framework).
20060919	More work on SH emulation; adding an ldc banked instruction,
		and attaching a 640x480 framebuffer to the Dreamcast machine
		mode (NetBSD/dreamcast prints the NetBSD copyright banner :-),
		and then panics).
20060920	Continuing on the settings subsystem.
20060921	Fixing the Footbridge timer stuff so that NetBSD/cats and
		NetBSD/netwinder boot up without the delays.
20060922	Temporarily hardcoding MIPS timer interrupt to 100 Hz. With
		'wait' support disabled, NetBSD/malta and Linux/malta run at
		correct speed.
20060923	Connecting dev_gt to the timer framework, so that NetBSD/cobalt
		runs at correct speed.
		Moving SH4-specific memory mapped registers into its own
		device (dev_sh4.c).
		Running with -N now prints "idling" instead of bogus nr of
		instrs/second (which isn't valid anyway) while idling.
20060924	Algor emulation should now run at correct speed.
		Adding disassembly support for some MIPS64 revision 2
		instructions: ext, dext, dextm, dextu.
20060926	The timer framework now works also when the MIPS wait
		instruction is used.
20060928	Re-implementing checks for coprocessor availability for MIPS
		cop0 instructions. (Thanks to Carl van Schaik for noticing the
		lack of cop0 availability checks.)
20060929	Implementing an instruction combination hack which treats
		NetBSD/pmax' idle loop as a wait-like instruction.
20060930	The ENTRYHI_R_MASK was missing in (at least) memory_mips_v2p.c,
		causing TLB lookups to sometimes succeed when they should have
		failed. (A big thank you to Juli Mallett for noticing the
		Adding disassembly support for more MIPS64 revision 2 opcodes
		(seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu,
		dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also
		implementing seb, seh, dsbh, dshd, and wsbh.
		Implementing an instruction combination hack for Linux/pmax'
		idle loop, similar to the NetBSD/pmax case.
20061001	Changing the NetBSD/sgimips install instructions to extract
		files from an iso image, instead of downloading them via ftp.
20061002	More-than-31-bit userland addresses in memory_mips_v2p.c were
		not actually working; applying a fix from Carl van Schaik to
		enable them to work + making some other updates (adding kuseg
		Fixing hpcmips (vr41xx) timer initialization.
		Experimenting with O(n)->O(1) reduction in the MIPS TLB lookup
		loop. Seems to work both for R3000 and non-R3000.
20061003	Continuing a little on SH emulation (adding more control
		registers; mini-cleanup of memory_sh.c).
20061004	Beginning on a dev_rtc, a clock/timer device for the test
		machines; also adding a demo, and some documentation.
		Fixing a bug in SH "mov.w @(disp,pc),Rn" (the result wasn't
		sign-extended), and adding the addc and ldtlb instructions.
20061005	Contining on SH emulation: virtual to physical address
		translation, and a skeleton exception mechanism.
20061006	Adding more SH instructions (various loads and stores, rte,
		negc, muls.w, various privileged register-move instructions).
20061007	More SH instructions: various move instructions, trapa, div0s,
		float, fdiv, ftrc.
		Continuing on dev_rtc; removing the rtc demo.
20061008	Adding a dummy Dreamcast PROM module. (Homebrew Dreamcast
		programs using KOS libs need this.)
		Adding more SH instructions: "stc vbr,rn", rotl, rotr, fsca,
		fmul, fadd, various floating-point moves, etc. A 256-byte
		demo for Dreamcast runs :-)
20061012	Adding the SH "lds Rm,pr" and bsr instructions.
20061013	More SH instructions: "sts fpscr,rn", tas.b, and some more
		floating point instructions, cmp/str, and more moves.
		Adding a dummy dev_pvr (Dreamcast graphics controller).
20061014	Generalizing the expression evaluator (used in the built-in
		debugger) to support parentheses and +-*/%^&|.
20061015	Removing the experimental tlb index hint code in
		mips_memory_v2p.c, since it didn't really have any effect.
20061017	Minor SH updates; adding the "sts pr,Rn", fcmp/gt, fneg,
		frchg, and some other instructions. Fixing missing sign-
		extension in an 8-bit load instruction.
20061019	Adding a simple dev_dreamcast_rtc.
		Implementing memory-mapped access to the SH ITLB/UTLB arrays.
20061021	Continuing on various SH and Dreamcast things: sh4 timers,
		debug messages for dev_pvr, fixing some virtual address
		translation bugs, adding the bsrf instruction.
		The NetBSD/dreamcast GENERIC_MD kernel now reaches userland :)
		Adding a dummy dev_dreamcast_asic.c (not really useful yet).
		Implementing simple support for Store Queues.
		Beginning on the PVR Tile Accelerator.
20061022	Generalizing the PVR framebuffer to support off-screen drawing,
		multiple bit-depths, etc. (A small speed penalty, but most
		likely worth it.)
		Adding more SH instructions (mulu.w, fcmp/eq, fsub, fmac,
		fschg, and some more); correcting bugs in "fsca" and "float".
20061024	Adding the SH ftrv (matrix * vector) instruction. Marcus
		Comstedt's "tatest" example runs :) (wireframe only).
		Correcting disassembly for SH floating point instructions that
		use the xd* registers.
		Adding the SH fsts instruction.
		In memory_device_dyntrans_access(), only the currently used
		range is now invalidated, and not the entire device range.
20061025	Adding a dummy AVR32 cpu mode skeleton.
20061026	Various Dreamcast updates; beginning on a Maple bus controller.
20061027	Continuing on the Maple bus. A bogus Controller, Keyboard, and
		Mouse can now be detected by NetBSD and KOS homebrew programs.
		Cleaning up the SH4 Timer Management Unit, and beginning on
		SH4 interrupts.
		Implementing the Dreamcast SYSASIC.
20061028	Continuing on the SYSASIC.
		Adding the SH fsqrt instruction.
		memory_sh.c now actually scans the ITLB.
		Fixing a bug in dev_sh4.c, related to associative writes into
		the memory-mapped UTLB array. NetBSD/dreamcast now reaches
		userland stably, and prints the "Terminal type?" message :-]
		Implementing enough of the Dreamcast keyboard to make NetBSD
		accept it for input.
		Enabling SuperH for stable (non-development) builds.
		Adding NetBSD/dreamcast to the documentation, although it
		doesn't support root-on-nfs yet.
20061029	Changing usleep(1) calls in the debugger to to usleep(10000)
		(according to Brian Foley, this makes GXemul run better on
		MacOS X).
		Making the Maple "Controller" do something (enough to barely
		interact with dcircus.elf).
20061030-31	Some progress on the PVR. More test programs start running (but
		with strange output).
		Various other SH4-related updates.
20061102	Various Dreamcast and SH4 updates; more KOS demos run now.
20061104	Adding a skeleton dev_mb8696x.c (the Dreamcast's LAN adapter).
20061105	Continuing on the MB8696x; NetBSD/dreamcast detects it as mbe0.
		Testing for the release.

==============  RELEASE 0.4.3  ==============

1 $Id: TODO,v 1.410 2006/11/06 05:32:38 debug Exp $
3 This file is my list of things I want to work on in the future. It is in
4 random order, and some parts of it are probably out-to-date by now.
7 Dyntrans:
8 x) Instruction combination collisions? How to avoid easily...
9 x) Think about how to do both SHmedia and SHcompact in a reasonable
10 way! (Or AMD64 long/protected/real, for that matter.)
11 x) 68K emulation; think about how to do variable instruction
12 lengths across page boundaries.
13 x) Dyntrans with valgrind-inspired memory checker. (In memory_rw,
14 it would be reasonably simple to add; in each individual fast
15 load/store routine = a lot more work, and it would become
16 kludgy very fast.)
17 x) Dyntrans with SMP... lots of work to be done here.
18 x) Dyntrans with cache emulation... lots of work here as well.
19 o) dev_mp doesn't work well with dyntrans yet
20 o) In general, IPIs, CAS, LL/SC etc must be made to work with dyntrans
21 x) Redesign/rethink the delay slot mechanism used for e.g. MIPS,
22 so that it caches a translation (that is, an instruction
23 word and the instr_call it was translated to the last
24 time), so that it doesn't need to do slow
25 to_be_translated for each end of page?
26 x) Program Counter statistics:
27 Per machine? What about SMP? All data to the same file?
28 A debugger command should be possible to use to enable/
29 disable statistics gathering.
30 Configuration file option!
31 x) Breakpoints:
32 o) Physical vs virtual addresses!
33 o) 32-bit vs 64-bit sign extension for MIPS, and others?
34 x) INVALIDATION should cause translations in _all_ cpus to be
35 invalidated, e.g. on a write to a write-protected page
36 (containing code)
37 x) 16-bit encodings? (MIPS16, ARM Thumb, 32-bit SH on SH64)
38 x) Lots of other stuff: see src/cpus/README_DYNTRANS
39 x) true recompilation backend? think carefully about this,
40 experiment in a separate project (not in GXemul)
41 o) First test would be to just implement a simple
42 instruction such as MIPS' addiu or lui, on AMD64
43 hosts...
45 Simple Valgrind-like checks?
46 o) Mark every address with bits which tell whether or not the address
47 has been written to.
48 o) What should happen when programs are loaded? Text/data, bss (zero
49 filled). But stack space and heap is uninitialized.
50 o) Uninitialized local variables:
51 A load from a place on the stack which has not previously
52 been stored to => warning. Increasing the stack pointer using
53 any available means should reset the memory to uninitialized.
54 o) If calls to malloc() and free() can be intercepted:
55 o) Access to a memory area after free() => warning.
56 o) Memory returned by malloc() is marked as not-initialized.
57 o) Non-passive, but good to have: Change the argument
58 given to malloc, to return a slightly larger memory
59 area, i.e. margin_before + size + margin_after,
60 and return the pointer + margin_before.
61 Any access to the margin_before or _after space results
62 in warnings. (free() must be modified to free the
63 actually allocated address.)
65 MIPS:
66 o) Nicer MIPS status bits in register dumps.
67 o) Alignment exceptions.
68 o) Floating point exception correctness.
69 o) Fix this? Triggered by NetBSD/sgimips? Hm:
70 to_be_translated(): TODO: unimplemented instruction:
71 000000000065102c: 00200800 (d) rot_00 at,zr,0
72 o) Some more work on opcodes.
73 x) MIPS64 revision 2.
74 o) Find out which actual CPUs implement the rev2 ISA!
75 o) DROTR32 and similar MIPS64 rev 2 instructions,
76 which have a rotation bit which differs from
77 previous ISAs.
78 o) EI and DI instructions for MIPS64/32 rev 2.
79 NOTE: These are _NOT_ the same as for R5900!
80 x) _MAYBE_ TX79 and R5900 actually differ in their
81 opcodes? Check this carefully!
82 o) Dyntrans: Count register updates are probably not 100% correct yet.
83 o) Refactor code for performance and readability/maintainability.
84 o) (Re)implement 128-bit loads/stores for R5900.
85 o) R4000 and others:
86 x) watchhi/watchlo exceptions, and other exception
87 handling details
88 o) R10000 and others: (R12000, R14000 ?)
89 x) memory space, exceptions, ...
90 x) use cop0 framemask for tlb lookups
91 (http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)
93 SuperH:
94 x) DMA (0xffa00000)
95 x) Instruction tracing should include symbols for branch targets,
96 and so on...
97 x) SH4 interrupt controller:
98 x) Implement correct priorities of interrupts
99 x) SH4 BSC (Bus State Controller)
100 x) NetBSD/evbsh3, dreamcast, mmeye, hpcsh! Linux?
101 x) Replace pc-relative loads with immediate load, if within the
102 same page. (Similar to the same optimization for ARM.)
103 x) Floating point exception correctness.
104 x) Floating point speed!
105 x) Think carefully about how to implement SH5/SH64 (for evbsh5).
107 Dreamcast:
108 x) CD image bootup:
109 0) Find IP.BIN, and load it to 0x8c008000.
110 1) Run code at 0x8c008300 (SEGA license code).
111 2) When the license code runs a "boot menu" syscall,
112 load the 1ST_READ.BIN file (unscrambled?) to 0x8c010000.
113 3) Run code at 0x8c00b800 (Bootstrap 1). This will in turn
114 jump to 0x8c00e000 (Bootstrap 2), and then jump to
115 0x8c010000, to start the program.
116 (Try with e.g. Comstedt's Serial IP Slave, to make sure it
117 works as expected.)
118 x) LAN adapter.
119 x) PVR: Lots of stuff. See dev_pvr.c.
120 x) Maple bus:
121 x) Correct controller input
122 x) Mouse input
123 x) PROM/BIOS calls:
124 x) GD-ROM emulation
125 x) NetBSD/dreamcast: Root on nfs?
126 x) Linux/dreamcast? (The gentoo kernel currently crashes.)
127 x) More homebrew demos/games.
128 x) Sound emulation (ARM cpu).
129 x) VME processor emulation?
131 Transputer:
132 x) Implement support for Helios binaries.
133 x) Stack and register contents at startup?
134 x) Figure out how to boot an entire Helios distribution.
135 x) Implement all instructions. :)
137 RCA1802/RCA1805, CHIP8:
138 x) CHIP8 -> RCA180x conversion
139 x) Think about how to do dual-mode, variable-instr-length
140 ISAs, and switch between modes.
141 x) 1805 "extended" opcode -> trigger CHIP8 emulation?
142 That is, all calls 0NNN could point to 0x68 opcodes,
143 which, if running on a 1802 in CHIP8-emulation-mode,
144 would be manually interpreted.
145 x) Better solution:
146 CHIP8 calls to 00xx => handle at high level,
147 calls to 0xxx in general = call 180X machine code
148 (0000 = reboot?)
149 x) 1802 info: http://www.nyx.net/~lturner/public_html/Cosmac.html
150 and: http://www.elf-emulation.com/1802.html
151 x) 1805 extended opcodes: Implement at least disassembly support!
152 x) Keyboard input.
153 x) Sound (beep only).
154 x) Slow-down to correct speed? Wikipedia: "it was usually operated
155 at 3.58 MHz/2 to suit the requirements of the 1861 chip which
156 gave a speed of a little over 100,000 instructions per second"
157 (Note that _CHIP8_ emulation would then be even slower.)
158 x) SCHIP48 (Super) emulation:
159 Some more opcodes, 128x64 framebuffer, larger
160 sprites and fonts.
162 Alpha:
163 x) OSF1 PALcode, Virtual memory support.
164 x) PALcode replacement! PAL1E etc opcodes...?
165 x) Interrupt/exception/trap handling.
166 x) Floating point exception correctness.
167 x) More work on bootup memory and register contents.
168 x) More Alpha machine types, so it could work with
169 OpenBSD, FreeBSD, and Linux too?
171 SPARC:
172 o) Implement Adress space identifiers; load/stores etc.
173 o) Save/restore register windows etc!
174 o) Finish the subcc and addcc flag computation code.
175 o) Add more registers (floating point, control regs etc)
176 o) Exception/trap handling.
177 o) Disassemly of some more instructions?
178 o) Are sll etc 32-bit sign-extending or zero-extending?
179 o) Finish the GDB register stuff.
180 x) Floating point exception correctness.
181 o) SPARC v8, v7 etc?
183 Debugger:
184 o) How does SMP debugging work? Does it simply use "threads"?
185 What if the guest OS (running on an emulated SMP machine)
186 has a usertask running, with userland threads?
187 o) Try to make the debugger more modular and, if possible, reentrant!
188 o) Remove the emul command? (But show network info if showing
189 machines?)
190 o) Settings:
191 x) Special handlers for Write!
192 +) MIPS coproc regs
193 +) Alpha/MIPS/SPARC zero registers
194 +) x86 64/32/16-bit registers
195 x) Value formatter for resulting output.
196 o) see src/debugger.c for more
198 POWER/PowerPC:
199 x) find and fix the bug which causes NetBSD/macppc to fail after
200 an install!
201 x) NetBSD/prep 3.x triggers a possible bug in the emulator:
202 <wdc_exec_command(0xd005e514,0xd60cdd30,0,8,..)>
203 <ata_get_xfer(0,0xd60cdd30,0,8,..)>
204 <0x26c550(&ata_xfer_pool,2,0,8,..)>
205 <0x35c71c(0x3f27000,0,52,8,..)>
206 <ata_exec_xfer(0xd005e4c8,0x3f27000,0,13,..)>
207 <atastart(0xd005e4c8,0x3f27000,0,13,..)>
208 <__wdccommand_start(0xd005e4c8,0x3f27000,0,13,..)>
209 <bsw1(&prep_isa_io_space_tag,0x800001f6,0,176,..)>
210 [ wdc: write to SDH: 0xb0 (sectorsize 2, lba=1, drive 1, head 0) ]
211 <wdcwait(0xd005e4c8,72,64,0xbb8,..)>
212 <0x198120(0xd005e4c8,72,64,0xbb8,..)>
213 <bsr1(&prep_isa_io_space_tag,0,0,0xbb8,..)>
214 <delay(100,0,0,0xbb8,..)>
215 Note: <bsr1(&prep_isa_io_space_tag,0,0,0xbb8,..)>
216 x) PPC optimizations; instr combs
217 x) 64-bit stuff: either Linux on G5, or perhaps some hobbyist
218 version of AIX? (if there exists such a thing)
219 x) macppc: adb controller; keyboard (for framebuffer mode)
220 x) make OpenBSD/macppc work (PCI controller stuff)
221 x) Floating point exception correctness.
222 x) Alignment exceptions.
224 Algor:
225 o) Other models than the P5064?
226 o) PCI interrupts... needed for stuff like the tlp NIC?
228 HPCmips:
229 x) Mouse/pad support! :)
230 x) A NIC? (As a PCMCIA device?)
232 AVR:
233 o) Everything.
235 AVR32:
236 o) Everything. It would be good if there was NetBSD/avr32 to
237 experiment with...
239 ARM:
240 o) See netwinder_reset() in NetBSD; the current "an internal error
241 occured" message after reboot/halt is too ugly.
242 o) ARM "wait"-like instruction?
243 o) try to get netbsd/evbarm 3.x running (iq80321)
244 o) make the xscale counter registers (ccnt) work
245 o) make the ata controller usable for FreeBSD!
246 o) zaurus for openbsd...
247 o) debian/cats crashes because of unimplemented coproc stuff.
248 fix this?
250 Test machines:
251 + dev_fb block fill and copy
252 + dev_fb draw characters (from the built-in font)?
253 + dev_fb input device? mouse pointer coordinates and buttons
254 (allow changes in these to cause interrupts as well?)
255 + Redefine the halt() function so that it stops "sometimes
256 soon", i.e. usage in demo code should be:
257 for (;;) {
258 halt();
259 }
261 Better CD Image file support:
262 x) Support CD formats that contain more than 1 track, e.g.
263 CDI files (?). These can then contain a mixture of e.g. sound
264 and data tracks, and booting from an ISO filesystem path
265 would boot from [by default] the first data track.
266 (This would make sense for e.g. Dreamcast CD images, or
267 possibly other live-CD formats.)
269 Networking:
270 x) Fix performance problems caused by only allowing a
271 single TCP packet to be unacked.
272 x) Don't hardcode offsets into packets!
273 x) Test with lower than 100 max tcp/udp connections,
274 to make sure that reuse works!
275 x) Make OpenBSD work better as a guest OS!
276 x) DHCP? Debian doesn't actually send DHCP packets, even
277 though it claims to? So it is hard to test.
278 x) Multiple networks per emulation, and let different
279 NICs in machines connect to different networks.
280 x) Support VDE (vde.sf.net)? Easiest/cleanest (before a
281 redesign of the network framework has been done) is
282 probably to connect it using the current (udp) solution.
283 x) Allow SLIP connections, possibly PPP, in addition to
284 ethernet?
286 Cache simulation:
287 o) Command line flags for:
288 o) CPU endianness?
289 o) Cache sizes? (multiple levels)
290 o) Separate from the CPU concept, so that multi-core CPUs sharing
291 e.g. a L2 cache can be simulated (?)
292 o) Instruction cache emulation is easiest (if separate from the
293 data cache); similar hack as the S;I; hack in cpu_dyntrans.c.
294 NOTE: if the architecture has a delay slot, then an instruction
295 slot can actually be executed as 2 instructions.
296 o) Data cache emulation = harder; each arch's load/store routines
297 must include support? running one instruction at a time and
298 having a cpu-dependant lookup function for each instruction
299 is another option (easier to implement, but very very slow).
301 Documentation:
302 x) Note about sandboxing/security:
303 Not all emulated instructions fail in the way they would
304 do on real hardware (e.g. a userspace program writing to
305 a system register might work in GXemul, but it would
306 fail on real hardware). Sandbox = contain from the
307 host OS. But the emulated programs will run "less
308 securely".
309 x) Try NetBSD/arc 4.x! (It seems to work with disk images!)
310 x) NetBSD/pmax 4 install instructions: xterm instead of vt100!
311 x) DEVICE_TICK in technical.html
312 x) Rewrite the section about experimental devices, after the
313 framebuffer acceleration has been implemented, and demos
314 written. (Symbolic names instead of numbers; example
315 use cases, etc. Mention demo files that use the various
316 features?)
317 x) "a very simple linear framebuffer device (for graphics output)"
318 under "which machines does gxemul emulate" ==> better
319 description?
320 x) Better description on how to set up a cross compiler?
321 Example for MIPS64.
322 o) Automagic documentation generation?
323 x) machines, cpus, devices.
324 x) REMEMBER that several machines/devices can be in
325 the same source file!
326 o) Try to rewrite the install instructions for those machines
327 that use 3MAX into using CATS or hpcmips? (To remove the need
328 to use a raw ffs partition, using up all of the disk image.)
330 More generic out_of_memory error reporting, and check everywhere!
331 Causes: OpenBSD has low default limits for normal users.
332 Host is 32-bit? (32-bit hosts are limited to 4 GB or less
333 of userspace memory.)
334 You are actually low on RAM. (As trivial as this might sound,
335 Unix systems usually allow processes to allocate virtual
336 memory beyond the amount of RAM in the machine.)
338 The Device subsystem:
339 x) allow devices to be moved and/or changed in size (down to a
340 minimum size, etc, or up to a max size); if there is a collision,
341 return false. It is up to the caller to handle this situation!
342 x) NOTE: Translations must be invalidated, both for
343 registering new devices, and for moving existing ones.
344 cpu->invalidate translation caches, for all CPUs that
345 are connected to a specific memory.
346 x) keep track of interrupts and busses? actually, allowing any device
347 to be a bus might be a nice idea.
348 x) turn interrupt controllers into devices? :-)
349 x) refactor various clocks/nvram/cmos into one device?
351 PCI:
352 x) last write was ffffffff ==> fix this, it should be used
353 together with a mask to get the correct bits. also, not ALL
354 bits are size bits! (lowest 4 vs lowest 2?)
355 x) add support for address fixups
356 x) generalize the interrupt routing stuff (lines etc)
358 Clocks and timers:
359 x) DON'T HARDCODE 100 HZ IN cpu_mips_coproc.c!
360 x) Test the 8253? Right now it doesn't seem to be used?
361 x) NetWinder timeofday is incorrect!
362 x) Cobalt TOD is incorrect!
363 x) Go through all other machines, one by one, and fix them.
365 Busses:
366 o) Redesign the entire "mainbus" concept!
367 x) Busses should be placed in a hierarchical tree (?)
368 x) Specific clock/bus speeds, cpu speeds etc.
369 o) Interrupt routing subsystem:
370 x) IF POSSIBLE, try to make the new system work with the
371 current system, but print annoying warning messages. :)
372 Think carefully about this.
373 x) Registry for all available interrupts.
374 +) Each interrupt controller (including CPU cores
375 that can handle interrupts) should register its
376 interrupts, e.g.
377 cpu[0].irq[3]
378 cpu[0].irq[3].pcmcia_slot[1]
379 cpu[0].irq.pci[3]
380 +) Note: MIPS cpus have multiple irqs in the core,
381 while some other CPUs only have one (irq[0]
382 or just irq).
383 x) Users should use interrupt _names_ instead of integers
384 when attaching to an interrupt controller, but when
385 asserting/deasserting irq lines, small integers must
386 still be used (for obvious performance reasons).
387 Figure out a way to do this nicely!
388 x) Any users need to say whether they need the interrupt line
389 exclusively or allow shared access.
390 x) Must work with everything from native IRQs to
391 TurboChannel/PCI/ISA/ADB/PCMCIA/...
392 x) Must work with SMP emulation!
393 x) Make it with device_add(). How does the end user find
394 out the name of an interrupt controller/line in e.g.
395 a configuration file?
396 o) Synchronization over network? or at least in dyntrans within
397 one emulated machine
398 o) Convert to real busses: TurboChannel, PCMCIA, ADB
400 Config file parser:
401 o) Rewrite it from scratch!
402 o) Usage of any expression available through the debugger
403 o) Support for running debugger commands (like the -c
404 command line option)
406 Floating point layer:
407 o) make it common enough to be used by _all_ emulation modes
408 o) implement correct error/exception handling and rounding modes
409 o) implement more helper functions (i.e. add, sub, mul...)
410 o) non-IEEE modes (i.e. x86)?
412 Userland emulation:
413 x) Lots of stuff; freebsd and netbsd (and linux?) syscalls.
414 x) Dynamic linking? Hm.
416 Sound:
417 x) generic sound framework
418 x) add one or more sound cards as devices; add a testmachine
419 sound card first?
421 ASC SCSI controller:
422 x) NetBSD/arc 2.0 uses the ASC controller in a way which GXemul
423 cannot yet handle. (NetBSD 1.6.2 works ok.) (Possibly a problem
424 in NetBSD itself, http://mail-index.netbsd.org/source-changes/
425 2005/11/06/0024.html suggests that.)
426 NetBSD 4.x seems to work? :)
428 Caches / memory hierarchies: (this is mostly MIPS-specific)
429 o) src/memory*.c: Implement correct cache emulation for
430 all CPU types. (currently only R2000/R3000 is implemented)
431 (per CPU, multiple levels should be possible, associativity etc!)
432 o) R2000/R3000 isn't _100%_ correct, just almost correct :)
433 o) Move the -S (fill mem with random) functionality into the
434 memory.c subsystem, not machine.c or wherever it is now
435 o) ECC stuff, simulation of memory errors? (Machine dependent)
436 o) More than 4GB of emulated RAM, when run on a 32-bit host?
437 (using manual swap-out of blocks to disk, ugly)
438 o) A global command line option should be used to turn
439 cache emulation on or off. When off, caches should be
440 faked like they are right now. When on, caches and
441 memory latencies should be emulated as correctly as
442 possible.
444 File/disk/symbol handling:
445 o) Remove some of the complexity in file format guessing, for
446 Ultrix kernels that are actually disk images?
447 o) Better handling of tape files
448 o) Read function argument count and types from binaries? (ELF?)
449 o) Better demangling of C++ names. Note: GNU's C++ differs from e.g.
450 Microsoft's C++, so multiple schemes must be possible. See
451 URL at top of src/symbol_demangle.c for more info.
453 Userland ABI emulation:
454 o) see src/useremul.c
456 Terminal/console:
457 o) allow emulated serial ports to be connected to the outside
458 world in a more generic way, or even to other emulated
459 machines(?)
461 Save state of the whole emulated machine, to be able to load it back
462 in later? (Memory, all device's states, all registers and
463 so on. Like taking a snapshot. (SimOS seems to do this,
464 according to its website.))
466 Better framebuffer and X-windows functionality:
467 o) Generalize the update_x1y1x2y2 stuff to an extend-region()
468 function...
469 o) -Yx sometimes causes crashes.
470 o) Simple device access to framebuffer_blockcopyfill() etc,
471 and text output (using the built-in fonts), for dev_fb.
472 o) CLEAN UP the ugly event code
473 o) Mouse clicks can be "missed" in the current system; this is
474 not good. They should be put on a stack of some kind.
475 o) More 2D and 3D framebuffer acceleration.
476 o) Non-resizable windows? Or choose scaledown depending
477 on size (and center the image, with a black border).
478 o) Different scaledown on different windows?
479 o) Non-integral scale-up? (E.g. 640x480 -> 1024x768)
480 o) Switch scaledown during runtime? (Ala CTRL-ALT-plus/minus)
481 o) Bug reported by Elijah Rutschman on MacOS with weird
482 keys (F5 = cursor down?).
483 o) Keyboard and mouse events:
484 x) Do this for more machines than just DECstation
485 x) more X11 cursor keycodes
486 x) Keys like CTRL, ALT, SHIFT do not get through
487 by themselves (these are necessary for example
488 to change the font of an xterm in X in the
489 emulator)
490 o) Generalize the framebuffer stuff by moving _ALL_ X11
491 specific code to src/x11.c!

  ViewVC Help
Powered by ViewVC 1.1.26