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Contents of /trunk/TODO

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Revision 18 - (show annotations)
Mon Oct 8 16:19:11 2007 UTC (13 years, 3 months ago) by dpavlin
File size: 6257 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE  ==============

1 $Id: TODO,v 1.175 2005/10/23 14:24:09 debug Exp $
3 ===============================================================================
5 High priority stuff:
8 Old MIPS bintrans:
10 x) call/return address cache?
12 x) Turn the MIPS cpu family stuff into dyntrans.
15 Dyntrans:
17 x) Separate data and instruction translations?
19 x) Generalize the inline quick_pc_to_pointers?
21 x) Call/return hints...
23 x) More 64-bit stuff.
25 x) Lots of other stuff: see src/cpus/README_DYNTRANS
28 Userland emulation:
30 x) Lots of stuff.
32 x) Dynamic linking? Hm.
34 ===============================================================================
36 Lower priority, but still important:
38 Redesign the entire "mainbus" concept:
39 o) Easily configurable interrupt routing in SMP systems.
40 o) Specific clock/bus speeds, cpu speeds etc.
41 o) Synchronization over network?
43 Caches / memory hierarchies: (this is mostly MIPS-specific)
44 o) MIPS coproc.c: bits in config registers should reflect
45 correct cache sizes for _all_ CPU types. (currently only
46 implemented for R4000, R1x000, and a few others)
47 o) src/memory*.c: Implement correct cache emulation for
48 all CPU types. (currently only R2000/R3000 is implemented)
49 (per CPU, multiple levels should be possible,
50 associativity etc!)
51 o) R2000/R3000 isn't _100%_ correct, just almost correct :)
52 o) Move the -S (fill mem with random) functionality into the
53 memory.c subsystem, not machine.c or wherever it is now
54 o) ECC stuff, simulation of memory errors? (Machine dependant)
55 o) More than 4GB of emulated RAM, when run on a 32-bit host?
56 (using manual swap-out of blocks to disk, ugly)
57 o) A global command line option should be used to turn
58 cache emulation on or off. When off, caches should be
59 faked like they are right now. When on, caches and
60 memory latencies should be emulated as correctly as
61 possible.
63 Network layer:
64 o) Multiple networks per emulation, and let different
65 NICs in machines connect to different networks.
66 o) many other issues: see src/net.c
68 MIPS CPU emulation:
69 o) i386 bintrans backend: movn etc, slt[u] for
70 64-bit mode, 64-bit shifts etc
71 o) Instructions:
72 o) All ISAs:
73 o) Floating point exception handling, and
74 add more instructions.
75 o) Finish the MIPS16 translator, and test it!
77 o) MIPS V (SIMD vector stuff?)
78 o) MDMX (MIPS Digital Media Extension)
79 o) MIPS 3D
80 o) MIPS MT (Multi-thread stuff) (What's this?)
81 o) Warn about mis-used bit fields (ie bits that
82 should be all zeroes, warn about if they are not)!
83 Both for coprocessor registers and for instruction
84 opcodes.
85 o) the special2 stuff is a mess right now
86 o) warn and/or cause exceptions for unimplemented
87 instructions (depending on CPU type)
88 o) R2000/R3000:
89 x) R3000 "tri-byte stores". (What's this?)
90 o) R4000 and others:
91 x) watchhi/watchlo exceptions, and other exception
92 handling details
93 o) R10000 and others: (R12000, R14000 ?)
94 x) memory space, exceptions, ...
95 x) use cop0 framemask for tlb lookups
96 (http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)
97 o) Implement load delays? Warnings on interlocks.
98 o) Implement all coprocessor 0 bits / functions.
99 x) coproc 0 selectors! (R4000 ?)
100 o) R4300 (nintendo64, no mmu?), R5900 (playstation2, weird
101 TLB/cache? 128-bit GPRs, new instructions),
102 4K (note: NOT R4000), 5K (note: NOT R5000),
103 R6000 (ISA II), R8000
104 o) Multi-cpu stuff:
105 +) Interrupt routing (ie devices vs mainbus, or
106 connect each device to a fixed cpu)
107 +) SGI's NUMA architecture. Study
108 x) Linux sources
109 x) SGI's specs on NUMA address space
110 +) Ultrix? NetBSD doesn't do SMP on MIPS yet :-(
111 +) Own experiments with ycx2.
113 File/disk handling:
114 o) Better handling of tape files
116 Debugger:
117 o) Read function argument count and types from binaries? (ELF?)
118 o) Demangle C++ names.
119 o) see src/debugger.c for more stuff
121 Userland ABI emulation:
122 o) see src/useremul.c
124 Terminal/console stuff:
125 o) allow emulated serial ports to be connected to the outside
126 world in a more generic way, or even to other emulated
127 machines(!)
129 Regression tests. (Needs to be totally rewritten, the old framework
130 was removed because it was useless.)
132 Save state of the whole emulated machine, to be able to load it back
133 in later? (Memory, all device's states, all registers and
134 so on. Like taking a snapshot. (SimOS seems to do this,
135 according to its website.))
137 Better X-windows functionality:
138 o) CLEAN UP the ugly event code
139 o) Mouse clicks can be "missed" in the current system; this is
140 not good. They should be put on a stack of some kind.
141 o) More 2D and 3D framebuffer acceleration.
142 o) Non-resizable windows? Or choose scaledown depending
143 on size (and center the image, with a black border).
144 o) Different scaledown on different windows?
145 o) Switch scaledown during runtime? (Ala CTRL-ALT-plus/minus)
146 o) Keyboard and mouse events:
147 x) Do this for more machines than just DECstation
148 x) more X11 cursor keycodes
149 x) Keys like CTRL, ALT, SHIFT do not get through
150 by themselves (these are necessary for example
151 to change the font of an xterm in X in the
152 emulator)
153 o) Generalize the framebuffer stuff by moving _ALL_ X11
154 specific code to src/x11.c!
156 Statistics: (this could be interesting)
157 o) Save to file and show graphics. It should be possible to
158 run gxemul after a simulation to just show the graphics,
159 or convert to a .ppm or .tga or similar.
160 o) memory accesses (to measure cache efficiency and
161 page coloring efficiency)
162 o) nr of simultaneous ASIDs in use in the TLB, for MIPS
163 o) percentage of time spent in different "states", such as
164 running userland code, kernel code, or idling (for CPUs
165 that have such an instruction, or whenever the PC is
166 inside a specific idle-function (address range)).
167 Possible additional state (for example on R3000): caches
168 disabled.
169 o) position of read/write on (SCSI) disks

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