This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /trunk/TODO

Parent Directory Parent Directory | Revision Log Revision Log

Revision 20 - (hide annotations)
Mon Oct 8 16:19:23 2007 UTC (13 years ago) by dpavlin
File size: 6178 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============

1 dpavlin 20 $Id: TODO,v 1.176 2005/11/13 00:14:05 debug Exp $
2 dpavlin 2
3 dpavlin 20 NOTE: This TODO is hopefully out-of-date. I don't keep it updated.
5 dpavlin 12 ===============================================================================
6 dpavlin 2
7 dpavlin 14 Old MIPS bintrans:
8 dpavlin 12 x) call/return address cache?
9 dpavlin 14 x) Turn the MIPS cpu family stuff into dyntrans.
10 dpavlin 12
11 dpavlin 14 Dyntrans:
12 dpavlin 18 x) Separate data and instruction translations?
13     x) Generalize the inline quick_pc_to_pointers?
14     x) Call/return hints...
15     x) More 64-bit stuff.
16     x) Lots of other stuff: see src/cpus/README_DYNTRANS
18 dpavlin 14 Userland emulation:
19     x) Lots of stuff.
20     x) Dynamic linking? Hm.
21 dpavlin 12
22 dpavlin 20 Misc:
23 dpavlin 12 Redesign the entire "mainbus" concept:
24     o) Easily configurable interrupt routing in SMP systems.
25     o) Specific clock/bus speeds, cpu speeds etc.
26     o) Synchronization over network?
28 dpavlin 2 Caches / memory hierarchies: (this is mostly MIPS-specific)
29     o) MIPS coproc.c: bits in config registers should reflect
30     correct cache sizes for _all_ CPU types. (currently only
31     implemented for R4000, R1x000, and a few others)
32     o) src/memory*.c: Implement correct cache emulation for
33     all CPU types. (currently only R2000/R3000 is implemented)
34     (per CPU, multiple levels should be possible,
35     associativity etc!)
36     o) R2000/R3000 isn't _100%_ correct, just almost correct :)
37     o) Move the -S (fill mem with random) functionality into the
38     memory.c subsystem, not machine.c or wherever it is now
39     o) ECC stuff, simulation of memory errors? (Machine dependant)
40     o) More than 4GB of emulated RAM, when run on a 32-bit host?
41     (using manual swap-out of blocks to disk, ugly)
42     o) A global command line option should be used to turn
43     cache emulation on or off. When off, caches should be
44     faked like they are right now. When on, caches and
45     memory latencies should be emulated as correctly as
46     possible.
48     Network layer:
49     o) Multiple networks per emulation, and let different
50     NICs in machines connect to different networks.
51     o) many other issues: see src/net.c
53     MIPS CPU emulation:
54 dpavlin 12 o) i386 bintrans backend: movn etc, slt[u] for
55     64-bit mode, 64-bit shifts etc
56 dpavlin 2 o) Instructions:
57 dpavlin 12 o) All ISAs:
58 dpavlin 2 o) Floating point exception handling, and
59     add more instructions.
60     o) Finish the MIPS16 translator, and test it!
61     o) MIPS ISA I, II, III, IV
62     o) MIPS V (SIMD vector stuff?)
63     o) MDMX (MIPS Digital Media Extension)
64     o) MIPS 3D
65     o) MIPS MT (Multi-thread stuff) (What's this?)
66     o) Warn about mis-used bit fields (ie bits that
67     should be all zeroes, warn about if they are not)!
68     Both for coprocessor registers and for instruction
69     opcodes.
70     o) the special2 stuff is a mess right now
71     o) warn and/or cause exceptions for unimplemented
72     instructions (depending on CPU type)
73     o) R2000/R3000:
74     x) R3000 "tri-byte stores". (What's this?)
75     o) R4000 and others:
76     x) watchhi/watchlo exceptions, and other exception
77     handling details
78     o) R10000 and others: (R12000, R14000 ?)
79     x) memory space, exceptions, ...
80     x) use cop0 framemask for tlb lookups
81     (http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)
82     o) Implement load delays? Warnings on interlocks.
83     o) Implement all coprocessor 0 bits / functions.
84     x) coproc 0 selectors! (R4000 ?)
85     o) R4300 (nintendo64, no mmu?), R5900 (playstation2, weird
86     TLB/cache? 128-bit GPRs, new instructions),
87     4K (note: NOT R4000), 5K (note: NOT R5000),
88     R6000 (ISA II), R8000
89     o) Multi-cpu stuff:
90 dpavlin 12 +) Interrupt routing (ie devices vs mainbus, or
91     connect each device to a fixed cpu)
92 dpavlin 2 +) SGI's NUMA architecture. Study
93     x) Linux sources
94     x) SGI's specs on NUMA address space
95     +) Ultrix? NetBSD doesn't do SMP on MIPS yet :-(
96     +) Own experiments with ycx2.
98     File/disk handling:
99     o) Better handling of tape files
101 dpavlin 12 Debugger:
102     o) Read function argument count and types from binaries? (ELF?)
103     o) Demangle C++ names.
104 dpavlin 14 o) see src/debugger.c for more stuff
105 dpavlin 12
106 dpavlin 2 Userland ABI emulation:
107     o) see src/useremul.c
109 dpavlin 6 Terminal/console stuff:
110     o) allow emulated serial ports to be connected to the outside
111     world in a more generic way, or even to other emulated
112     machines(!)
114 dpavlin 12 Regression tests. (Needs to be totally rewritten, the old framework
115     was removed because it was useless.)
116 dpavlin 2
117     Save state of the whole emulated machine, to be able to load it back
118     in later? (Memory, all device's states, all registers and
119     so on. Like taking a snapshot. (SimOS seems to do this,
120     according to its website.))
122     Better X-windows functionality:
123     o) CLEAN UP the ugly event code
124     o) Mouse clicks can be "missed" in the current system; this is
125     not good. They should be put on a stack of some kind.
126     o) More 2D and 3D framebuffer acceleration.
127     o) Non-resizable windows? Or choose scaledown depending
128     on size (and center the image, with a black border).
129     o) Different scaledown on different windows?
130     o) Switch scaledown during runtime? (Ala CTRL-ALT-plus/minus)
131     o) Keyboard and mouse events:
132     x) Do this for more machines than just DECstation
133     x) more X11 cursor keycodes
134     x) Keys like CTRL, ALT, SHIFT do not get through
135     by themselves (these are necessary for example
136     to change the font of an xterm in X in the
137     emulator)
138     o) Generalize the framebuffer stuff by moving _ALL_ X11
139     specific code to src/x11.c!
141     Statistics: (this could be interesting)
142     o) Save to file and show graphics. It should be possible to
143     run gxemul after a simulation to just show the graphics,
144     or convert to a .ppm or .tga or similar.
145     o) memory accesses (to measure cache efficiency and
146     page coloring efficiency)
147     o) nr of simultaneous ASIDs in use in the TLB, for MIPS
148     o) percentage of time spent in different "states", such as
149     running userland code, kernel code, or idling (for CPUs
150     that have such an instruction, or whenever the PC is
151     inside a specific idle-function (address range)).
152     Possible additional state (for example on R3000): caches
153     disabled.
154     o) position of read/write on (SCSI) disks

  ViewVC Help
Powered by ViewVC 1.1.26