This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Revision 14 - (hide annotations)
Mon Oct 8 16:18:51 2007 UTC (13 years, 3 months ago) by dpavlin
File size: 6099 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.982 2005/10/07 22:45:32 debug Exp $
20050816	Some success in decoding the way the SGI O2 PROM draws graphics
		during bootup; lines/rectangles and bitmaps work, enough to
		show the bootlogo etc. :-)
		Adding more PPC instructions, and (dummy) BAT registers.
20050817	Updating the pckbc to support scancode type 3 keyboards
		(required in order to interact with the SGI O2 PROM).
		Adding more PPC instructions.
20050818	Adding more ARM instructions; general register forms.
		Importing armreg.h from NetBSD (ARM cpu ids). Adding a (dummy)
		CATS machine mode (using SA110 as the default CPU).
		Continuing on general dyntrans related stuff.
20050819	Register forms for ARM load/stores. Gaah! The Compaq C Compiler
		bug is triggered for ARM loads as well, not just PPC :-(
		Adding full support for ARM PC-relative load/stores, and load/
		stores where the PC register is the destination register.
		Adding support for ARM a.out binaries.
20050820	Continuing to add more ARM instructions, and correcting some
		bugs. Continuing on CATS emulation.
		More work on the PPC stuff.
20050821	Minor PPC and ARM updates. Adding more machine types.
20050822	All ARM "data processing instructions" are now generated
20050824	Beginning the work on the ARM system control coprocessor.
		Adding support for ARM halfword load/stores, and signed loads.
20050825	Fixing an important bug related to the ARM condition codes.
		OpenBSD/zaurus and NetBSD/netwinder now print some boot
		messages. :)
		Adding a dummy SH (Hitachi SuperH) cpu family.
		Beginning to add some ARM virtual address translation.
		MIPS bugfixes: unaligned PC now cause an ADEL exception (at
		least for non-bintrans execution), and ADEL/ADES (not
		TLBL/TLBS) are used if userland tries to access kernel space.
		(Thanks to Joshua Wise for making me aware of these bugs.)
20050827	More work on the ARM emulation, and various other updates.
20050828	More ARM updates.
		Finally taking the time to work on translation invalidation
		(i.e. invalidating translated code mappings when memory is
		written to). Hopefully this doesn't break anything.
20050829	Moving CPU related files from src/ to a new subdir, src/cpus/.
		Moving PROM emulation stuff from src/ to src/promemul/.
		Better debug instruction trace for ARM loads and stores.
20050830	Various ARM updates (correcting CMP flag calculation, etc).
20050831	PPC instruction updates. (Flag fixes, etc.)
20050901	Various minor PPC and ARM instruction emulation updates.
		Minor OpenFirmware emulation updates.
20050903	Adding support for adding arbitrary ARM coprocessors (with
		the i80321 I/O coprocessor as a first test).
		Various other ARM and PPC updates.
20050904	Adding some SHcompact disassembly routines.
20050907	(Re)adding a dummy HPPA CPU module, and a dummy i960 module.
20050908	Began hacking on some Apple Partition Table support.
20050909	Adding support for loading Mach-O (Darwin PPC) binaries.
20050910	Fixing an ARM bug (Carry flag was incorrectly updated for some
		data processing instructions); OpenBSD/cats and NetBSD/
		netwinder get quite a bit further now.
		Applying a patch to dev_wdc, and a one-liner to dev_pcic, to
		make them work better when emulating new versions of OpenBSD.
		(Thanks to Alexander Yurchenko for the patches.)
		Also doing some other minor updates to dev_wdc. (Some cleanup,
		and finally converting to devinit, etc.)
20050912	IRIX doesn't have u_int64_t by default (noticed by Andreas
		<avr@gnulinux.nl>); configure updated to reflect this.
		Working on ARM register bank switching, CPSR vs SPSR issues,
		and beginning the work on interrupt/exception support.
20050913	Various minor ARM updates (speeding up load/store multiple,
		and fixing a ROR bug in R(); NetBSD/cats now boots as far as
20050917	Adding a dummy Atmel AVR (8-bit) cpu family skeleton.
20050918	Various minor updates.
20050919	Symbols are now loaded from Mach-O executables.
		Continuing the work on adding ARM exception support.
20050920	More work on ARM stuff: OpenBSD/cats and NetBSD/cats reach
		userland! :-)
20050921	Some more progress on ARM interrupt specifics.
20050923	Fixing linesize for VR4121 (patch by Yurchenko). Also fixing
		linesizes/cachesizes for some other VR4xxx.
		Adding a dummy Acer Labs M1543 PCI-ISA bridge (for CATS) and a
		dummy Symphony Labs 83C553 bridge (for Netwinder), usable by 
20050924	Some PPC progress.
20050925	More PPC progress.
20050926	PPC progress (fixing some bugs etc); Darwin's kernel gets
		slightly further than before.
20050928	Various updates: footbridge/ISA/pciide stuff, and finally
		fixing the VGA text scroll-by-changing-the-base-offset bug.
20050930	Adding a dummy S3 ViRGE pci card for CATS emulation, which
		both NetBSD and OpenBSD detects as VGA.
		Continuing on Footbridge (timers, ISA interrupt stuff).
20051001	Continuing... there are still bugs, probably interrupt-
20051002	More work on the Footbridge (interrupt stuff).
20051003	Various minor updates. (Trying to find the bug(s).)
20051004	Continuing on the ARM stuff.
20051005	More ARM-related fixes.
20051007	FINALLY! Found and fixed 2 ARM bugs: 1 memory related, and the
		other was because of an error in the ARM manual (load multiple
		with the S-bit set should _NOT_ load usermode registers, as the
		manual says, but it should load saved registers, which may or
		may not happen to be usermode registers).
		NetBSD/cats and OpenBSD/cats seem to install fine now :-)
		except for a minor bug at the end of the OpenBSD/cats install.
		Updating the documentation, preparing for the next release.
20051008	Continuing with release testing and cleanup.

1 dpavlin 14 $Id: TODO,v 1.173 2005/09/17 17:14:25 debug Exp $
2 dpavlin 2
3 dpavlin 12 ===============================================================================
4 dpavlin 2
5 dpavlin 12 High priority stuff:
8 dpavlin 14 Old MIPS bintrans:
10 dpavlin 12 x) call/return address cache?
12 dpavlin 14 x) Turn the MIPS cpu family stuff into dyntrans.
13 dpavlin 12
15 dpavlin 14 Dyntrans:
16 dpavlin 12
17 dpavlin 14 x) Lots of stuff: see src/cpus/README_DYNTRANS
18 dpavlin 12
20 dpavlin 14 Userland emulation:
21 dpavlin 12
22 dpavlin 14 x) Lots of stuff.
23 dpavlin 12
24 dpavlin 14 x) Dynamic linking? Hm.
25 dpavlin 12
26     ===============================================================================
28     Lower priority, but still important:
30     Redesign the entire "mainbus" concept:
31     o) Easily configurable interrupt routing in SMP systems.
32     o) Specific clock/bus speeds, cpu speeds etc.
33     o) Synchronization over network?
35 dpavlin 2 Caches / memory hierarchies: (this is mostly MIPS-specific)
36     o) MIPS coproc.c: bits in config registers should reflect
37     correct cache sizes for _all_ CPU types. (currently only
38     implemented for R4000, R1x000, and a few others)
39     o) src/memory*.c: Implement correct cache emulation for
40     all CPU types. (currently only R2000/R3000 is implemented)
41     (per CPU, multiple levels should be possible,
42     associativity etc!)
43     o) R2000/R3000 isn't _100%_ correct, just almost correct :)
44     o) Move the -S (fill mem with random) functionality into the
45     memory.c subsystem, not machine.c or wherever it is now
46     o) ECC stuff, simulation of memory errors? (Machine dependant)
47     o) More than 4GB of emulated RAM, when run on a 32-bit host?
48     (using manual swap-out of blocks to disk, ugly)
49     o) A global command line option should be used to turn
50     cache emulation on or off. When off, caches should be
51     faked like they are right now. When on, caches and
52     memory latencies should be emulated as correctly as
53     possible.
55     Network layer:
56     o) Multiple networks per emulation, and let different
57     NICs in machines connect to different networks.
58     o) many other issues: see src/net.c
60     MIPS CPU emulation:
61 dpavlin 12 o) i386 bintrans backend: movn etc, slt[u] for
62     64-bit mode, 64-bit shifts etc
63 dpavlin 2 o) Instructions:
64 dpavlin 12 o) All ISAs:
65 dpavlin 2 o) Floating point exception handling, and
66     add more instructions.
67     o) Finish the MIPS16 translator, and test it!
68     o) MIPS ISA I, II, III, IV
69     o) MIPS V (SIMD vector stuff?)
70     o) MDMX (MIPS Digital Media Extension)
71     o) MIPS 3D
72     o) MIPS MT (Multi-thread stuff) (What's this?)
73     o) Warn about mis-used bit fields (ie bits that
74     should be all zeroes, warn about if they are not)!
75     Both for coprocessor registers and for instruction
76     opcodes.
77     o) the special2 stuff is a mess right now
78     o) warn and/or cause exceptions for unimplemented
79     instructions (depending on CPU type)
80     o) R2000/R3000:
81     x) R3000 "tri-byte stores". (What's this?)
82     o) R4000 and others:
83     x) watchhi/watchlo exceptions, and other exception
84     handling details
85     o) R10000 and others: (R12000, R14000 ?)
86     x) memory space, exceptions, ...
87     x) use cop0 framemask for tlb lookups
88     (http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)
89     o) Implement load delays? Warnings on interlocks.
90     o) Implement all coprocessor 0 bits / functions.
91     x) coproc 0 selectors! (R4000 ?)
92     o) R4300 (nintendo64, no mmu?), R5900 (playstation2, weird
93     TLB/cache? 128-bit GPRs, new instructions),
94     4K (note: NOT R4000), 5K (note: NOT R5000),
95     R6000 (ISA II), R8000
96     o) Multi-cpu stuff:
97 dpavlin 12 +) Interrupt routing (ie devices vs mainbus, or
98     connect each device to a fixed cpu)
99 dpavlin 2 +) SGI's NUMA architecture. Study
100     x) Linux sources
101     x) SGI's specs on NUMA address space
102     +) Ultrix? NetBSD doesn't do SMP on MIPS yet :-(
103     +) Own experiments with ycx2.
105     File/disk handling:
106     o) Better handling of tape files
108 dpavlin 12 Debugger:
109     o) Read function argument count and types from binaries? (ELF?)
110     o) Demangle C++ names.
111 dpavlin 14 o) see src/debugger.c for more stuff
112 dpavlin 12
113 dpavlin 2 Userland ABI emulation:
114     o) see src/useremul.c
116 dpavlin 6 Terminal/console stuff:
117     o) allow emulated serial ports to be connected to the outside
118     world in a more generic way, or even to other emulated
119     machines(!)
121 dpavlin 12 Regression tests. (Needs to be totally rewritten, the old framework
122     was removed because it was useless.)
123 dpavlin 2
124     Save state of the whole emulated machine, to be able to load it back
125     in later? (Memory, all device's states, all registers and
126     so on. Like taking a snapshot. (SimOS seems to do this,
127     according to its website.))
129     Better X-windows functionality:
130     o) CLEAN UP the ugly event code
131     o) Mouse clicks can be "missed" in the current system; this is
132     not good. They should be put on a stack of some kind.
133     o) More 2D and 3D framebuffer acceleration.
134     o) Non-resizable windows? Or choose scaledown depending
135     on size (and center the image, with a black border).
136     o) Different scaledown on different windows?
137     o) Switch scaledown during runtime? (Ala CTRL-ALT-plus/minus)
138     o) Keyboard and mouse events:
139     x) Do this for more machines than just DECstation
140     x) more X11 cursor keycodes
141     x) Keys like CTRL, ALT, SHIFT do not get through
142     by themselves (these are necessary for example
143     to change the font of an xterm in X in the
144     emulator)
145     o) Generalize the framebuffer stuff by moving _ALL_ X11
146     specific code to src/x11.c!
148     Statistics: (this could be interesting)
149     o) Save to file and show graphics. It should be possible to
150     run gxemul after a simulation to just show the graphics,
151     or convert to a .ppm or .tga or similar.
152     o) memory accesses (to measure cache efficiency and
153     page coloring efficiency)
154     o) nr of simultaneous ASIDs in use in the TLB, for MIPS
155     o) percentage of time spent in different "states", such as
156     running userland code, kernel code, or idling (for CPUs
157     that have such an instruction, or whenever the PC is
158     inside a specific idle-function (address range)).
159     Possible additional state (for example on R3000): caches
160     disabled.
161     o) position of read/write on (SCSI) disks

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