--- trunk/HISTORY 2007/10/08 16:19:56 24 +++ trunk/HISTORY 2007/10/08 16:21:53 38 @@ -1,4 +1,4 @@ -$Id: HISTORY,v 1.1256 2006/06/23 20:43:44 debug Exp $ +$Id: HISTORY,v 1.1515 2007/04/14 05:39:46 debug Exp $ Changelog for GXemul: --------------------- @@ -2803,3 +2803,591 @@ ============== RELEASE 0.4.0 ============== +20060624 Replacing the error-prone machine type initialization stuff + with something more reasonable. + Finally removing the old "cpu_run" kludge; moving around stuff + in machine.c and emul.c to better suit the dyntrans system. + Various minor dyntrans cleanups (renaming translate_address to + translate_v2p, and experimenting with template physpages). +20060625 Removing the speed hack which separated the vph entries into + two halves (code vs data); things seem a lot more stable now. + Minor performance hack: R2000/R3000 cache isolation now only + clears address translations when going into isolation, not + when going out of it. + Fixing the MIPS interrupt problems by letting mtc0 immediately + cause interrupts. + +============== RELEASE 0.4.0.1 ============== + +20060626 Continuing on SPARC emulation (beginning on the 'save' + instruction, register windows, etc). +20060629 Planning statistics gathering (new -s command line option), + and renaming speed_tricks to allow_instruction_combinations. +20060630 Some minor manual page updates. + Various cleanups. + Implementing the -s command line option. +20060701 FINALLY found the bug which prevented Linux and Ultrix from + running without the ugly hack in the R2000/R3000 cache isol + code; it was the phystranslation hint array which was buggy. + Removing the phystranslation hint code completely, for now. +20060702 Minor dyntrans cleanups; invalidation of physpages now only + invalidate those parts of a page that have actually been + translated. (32 parts per page.) + Some MIPS non-R3000 speed fixes. + Experimenting with MIPS instruction combination for some + addiu+bne+sw loops, and sw+sw+sw. + Adding support (again) for larger-than-4KB pages in MIPS tlbw*. + Continuing on SPARC emulation: adding load/store instructions. +20060704 Fixing a virtual vs physical page shift bug in the new tlbw* + implementation. Problem noticed by Jakub Jermar. (Many thanks.) + Moving rfe and eret to cpu_mips_instr.c, since that is the + only place that uses them nowadays. +20060705 Removing the BSD license from the "testmachine" include files, + placing them in the public domain instead; this enables the + testmachine stuff to be used from projects which are + incompatible with the BSD license for some reason. +20060707 Adding instruction combinations for the R2000/R3000 L1 + I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu, + various branches followed by addiu or nop, and jr ra followed + by addiu. The time it takes to perform a full NetBSD/pmax R3000 + install on the laptop has dropped from 573 seconds to 539. :-) +20060708 Adding a framebuffer controller device (dev_fbctrl), which so + far can be used to change the fb resolution during runtime, but + in the future will also be useful for accelerated block fill/ + copy, and possibly also simplified character output. + Adding an instruction combination for NetBSD/pmax' strlen. +20060709 Minor fixes: reading raw files in src/file.c wasn't memblock + aligned, removing buggy multi_sw MIPS instruction combination, + etc. +20060711 Adding a machine_qemu.c, which contains a "qemu_mips" machine. + (It mimics QEMU's MIPS machine mode, so that a test kernel + made for QEMU_MIPS also can run in GXemul... at least to some + extent.) Adding a short section about how to run this mode to + doc/guestoses.html. +20060714 Misc. minor code cleanups. +20060715 Applying a patch which adds getchar() to promemul/yamon.c + (from Oleksandr Tymoshenko). + Adding yamon.h from NetBSD, and rewriting yamon.c to use it + (instead of ugly hardcoded numbers) + some cleanup. +20060716 Found and fixed the bug which broke single-stepping of 64-bit + programs between 0.4.0 and 0.4.0.1 (caused by too quick + refactoring and no testing). Hopefully this fix will not + break too many other things. +20060718 Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS. + Re-adding the sw+sw+sw instr comb (the problem was that I had + ignored endian issues); however, it doesn't seem to give any + big performance gain. +20060720 Adding a dummy Transputer mode (T414, T800 etc) skeleton (only + the 'j' and 'ldc' instructions are implemented so far). :-} +20060721 Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus + misc. other updates to get Linux 2.6 for evbmips/malta working + (thanks to Alec Voropay for the details). + FINALLY found and fixed the bug which made tlbw* for non-R3000 + buggy; it was a reference count problem in the dyntrans core. +20060722 Testing stuff; things seem stable enough for a new release. + +============== RELEASE 0.4.1 ============== + +20060723 More Transputer instructions (pfix, nfix, opr, mint, ldl, ldlp, + eqc, rev, ajw, stl, stlf, sthf, sub, ldnl, ldnlp, ldpi, move, + wcnt, add, bcnt). + Adding more SPARC instructions (andcc, addcc, bl, rdpr). + Progress on the igsfb framebuffer used by NetBSD/netwinder. + Enabling 8-bit fills in dev_fb. + NetBSD/netwinder 3.0.1 can now run from a disk image :-) +20060724 Cleanup/performance fix for 64-bit virtual translation table + updates (by removing the "timestamp" stuff). A full NetBSD/pmax + 3.0.1 install for R4400 has dropped from 667 seconds to 584 :) + Fixing the igsfb "almost vga" color (it is 24-bit, not 18-bit). + Adding some MIPS instruction combinations (3*lw, and 3*addu). + The 8048 keyboard now turns off interrupt enable between the + KBR_ACK and the KBR_RSTDONE, to work better with Linux 2.6. + Not causing PPC DEC interrupts if PPC_NO_DEC is set for a + specific CPU; NetBSD/bebox gets slightly further than before. + Adding some more SPARC instructions: branches, udiv. +20060725 Refreshing dev_pckbc.c a little. + Cleanups for the SH emulation mode, and adding the first + "compact" (16-bit) instructions: various simple movs, nop, + shll, stc, or, ldc. +20060726 Adding dummy "pcn" (AMD PCnet NIC) PCI glue. +20060727 Various cleanups; removing stuff from cpu.h, such as + running_translated (not really meaningful anymore), and + page flags (breaking into the debugger clears all translations + anyway). + Minor MIPS instruction combination updates. +20060807 Expanding the 3*sw and 3*lw MIPS instruction combinations to + work with 2* and 4* too, resulting in a minor performance gain. + Implementing a usleep hack for the RM52xx/MIPS32/MIPS64 "wait" + instruction (when emulating 1 cpu). +20060808 Experimenting with some more MIPS instruction combinations. + Implementing support for showing a (hardcoded 12x22) text + cursor in igsfb. +20060809 Simplifying the NetBSD/evbmips (Malta) install instructions + somewhat (by using a NetBSD/pmax ramdisk install kernel). +20060812 Experimenting more with the MIPS 'wait' instruction. + PCI configuration register writes can now be handled, which + allow PCI IDE controllers to work with NetBSD/Malta 3.0.1 and + NetBSD/cobalt 3.0.1. (Previously only NetBSD 2.1 worked.) +20060813 Updating dev_gt.c based on numbers from Alec Voropay, to enable + Linux 2.6 to use PCI on Malta. + Continuing on Algor interrupt stuff. +20060814 Adding support for routing ISA interrupts to two different + interrupts, making it possible to run NetBSD/algor :-) +20060814-15 Testing for the release. + +============== RELEASE 0.4.2 ============== + +20060816 Adding a framework for emulated/virtual timers (src/timer.c), + using only setitimer(). + Rewriting the mc146818 to use the new timer framework. +20060817 Adding a call to gettimeofday() every now and then (once every + second, at the moment) to resynch the timer if it drifts. + Beginning to convert the ISA timer interrupt mechanism (8253 + and 8259) to use the new timer framework. + Removing the -I command line option. +20060819 Adding the -I command line option again, with new semantics. + Working on Footbridge timer interrupts; NetBSD/NetWinder and + NetBSD/CATS now run at correct speed, but unfortunately with + HUGE delays during bootup. +20060821 Some minor m68k updates. Adding the first instruction: nop. :) + Minor Alpha emulation updates. +20060822 Adding a FreeBSD development specific YAMON environment + variable ("khz") (as suggested by Bruce M. Simpson). + Moving YAMON environment variable initialization from + machine_evbmips.c into promemul/yamon.c, and adding some more + variables. + Continuing on the LCA PCI bus controller (for Alpha machines). +20060823 Continuing on the timer stuff: experimenting with MIPS count/ + compare interrupts connected to the timer framework. +20060825 Adding bogus SCSI commands 0x51 (SCSICDROM_READ_DISCINFO) and + 0x52 (SCSICDROM_READ_TRACKINFO) to the SCSI emulation layer, + to allow NetBSD/pmax 4.0_BETA to be installed from CDROM. + Minor updates to the LCA PCI controller. +20060827 Implementing a CHIP8 cpu mode, and a corresponding CHIP8 + machine, for fun. Disassembly support for all instructions, + and most of the common instructions have been implemented: mvi, + mov_imm, add_imm, jmp, rand, cls, sprite, skeq_imm, jsr, + skne_imm, bcd, rts, ldr, str, mov, or, and, xor, add, sub, + font, ssound, sdelay, gdelay, bogus skup/skpr, skeq, skne. +20060828 Beginning to convert the CHIP8 cpu in the CHIP8 machine to a + (more correct) RCA 180x cpu. (Disassembly for all 1802 + instructions has been implemented, but no execution yet, and + no 1805 extended instructions.) +20060829 Minor Alpha emulation updates. +20060830 Beginning to experiment a little with PCI IDE for SGI O2. + Fixing the cursor key mappings for MobilePro 770 emulation. + Fixing the LK201 warning caused by recent NetBSD/pmax. + The MIPS R41xx standby, suspend, and hibernate instructions now + behave like the RM52xx/MIPS32/MIPS64 wait instruction. + Fixing dev_wdc so it calculates correct (64-bit) offsets before + giving them to diskimage_access(). +20060831 Continuing on Alpha emulation (OSF1 PALcode). +20060901 Minor Alpha updates; beginning on virtual memory pagetables. + Removed the limit for max nr of devices (in preparation for + allowing devices' base addresses to be changed during runtime). + Adding a hack for MIPS [d]mfc0 select 0 (except the count + register), so that the coproc register is simply copied. + The MIPS suspend instruction now exits the emulator, instead + of being treated as a wait instruction (this causes NetBSD/ + hpcmips to get correct 'halt' behavior). + The VR41xx RTC now returns correct time. + Connecting the VR41xx timer to the timer framework (fixed at + 128 Hz, for now). + Continuing on SPARC emulation, adding more instructions: + restore, ba_xcc, ble. The rectangle drawing demo works :) + Removing the last traces of the old ENABLE_CACHE_EMULATION + MIPS stuff (not usable with dyntrans anyway). +20060902 Splitting up src/net.c into several smaller files in its own + subdirectory (src/net/). +20060903 Cleanup of the files in src/net/, to make them less ugly. +20060904 Continuing on the 'settings' subsystem. + Minor progress on the SPARC emulation mode. +20060905 Cleanup of various things, and connecting the settings + infrastructure to various subsystems (emul, machine, cpu, etc). + Changing the lk201 mouse update routine to not rely on any + emulated hardware framebuffer cursor coordinates, but instead + always do (semi-usable) relative movements. +20060906 Continuing on the lk201 mouse stuff. Mouse behaviour with + multiple framebuffers (which was working in Ultrix) is now + semi-broken (but it still works, in a way). + Moving the documentation about networking into its own file + (networking.html), and refreshing it a bit. Adding an example + of how to use ethernet frame direct-access (udp_snoop). +20060907 Continuing on the settings infrastructure. +20060908 Minor updates to SH emulation: for 32-bit emulation: delay + slots and the 'jsr @Rn' instruction. I'm putting 64-bit SH5 on + ice, for now. +20060909-10 Implementing some more 32-bit SH instructions. Removing the + 64-bit mode completely. Enough has now been implemented to run + the rectangle drawing demo. :-) +20060912 Adding more SH instructions. +20060916 Continuing on SH emulation (some more instructions: div0u, + div1, rotcl/rotcr, more mov instructions, dt, braf, sets, sett, + tst_imm, dmuls.l, subc, ldc_rm_vbr, movt, clrt, clrs, clrmac). + Continuing on the settings subsystem (beginning on reading/ + writing settings, removing bugs, and connecting more cpus to + the framework). +20060919 More work on SH emulation; adding an ldc banked instruction, + and attaching a 640x480 framebuffer to the Dreamcast machine + mode (NetBSD/dreamcast prints the NetBSD copyright banner :-), + and then panics). +20060920 Continuing on the settings subsystem. +20060921 Fixing the Footbridge timer stuff so that NetBSD/cats and + NetBSD/netwinder boot up without the delays. +20060922 Temporarily hardcoding MIPS timer interrupt to 100 Hz. With + 'wait' support disabled, NetBSD/malta and Linux/malta run at + correct speed. +20060923 Connecting dev_gt to the timer framework, so that NetBSD/cobalt + runs at correct speed. + Moving SH4-specific memory mapped registers into its own + device (dev_sh4.c). + Running with -N now prints "idling" instead of bogus nr of + instrs/second (which isn't valid anyway) while idling. +20060924 Algor emulation should now run at correct speed. + Adding disassembly support for some MIPS64 revision 2 + instructions: ext, dext, dextm, dextu. +20060926 The timer framework now works also when the MIPS wait + instruction is used. +20060928 Re-implementing checks for coprocessor availability for MIPS + cop0 instructions. (Thanks to Carl van Schaik for noticing the + lack of cop0 availability checks.) +20060929 Implementing an instruction combination hack which treats + NetBSD/pmax' idle loop as a wait-like instruction. +20060930 The ENTRYHI_R_MASK was missing in (at least) memory_mips_v2p.c, + causing TLB lookups to sometimes succeed when they should have + failed. (A big thank you to Juli Mallett for noticing the + problem.) + Adding disassembly support for more MIPS64 revision 2 opcodes + (seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu, + dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also + implementing seb, seh, dsbh, dshd, and wsbh. + Implementing an instruction combination hack for Linux/pmax' + idle loop, similar to the NetBSD/pmax case. +20061001 Changing the NetBSD/sgimips install instructions to extract + files from an iso image, instead of downloading them via ftp. +20061002 More-than-31-bit userland addresses in memory_mips_v2p.c were + not actually working; applying a fix from Carl van Schaik to + enable them to work + making some other updates (adding kuseg + support). + Fixing hpcmips (vr41xx) timer initialization. + Experimenting with O(n)->O(1) reduction in the MIPS TLB lookup + loop. Seems to work both for R3000 and non-R3000. +20061003 Continuing a little on SH emulation (adding more control + registers; mini-cleanup of memory_sh.c). +20061004 Beginning on a dev_rtc, a clock/timer device for the test + machines; also adding a demo, and some documentation. + Fixing a bug in SH "mov.w @(disp,pc),Rn" (the result wasn't + sign-extended), and adding the addc and ldtlb instructions. +20061005 Contining on SH emulation: virtual to physical address + translation, and a skeleton exception mechanism. +20061006 Adding more SH instructions (various loads and stores, rte, + negc, muls.w, various privileged register-move instructions). +20061007 More SH instructions: various move instructions, trapa, div0s, + float, fdiv, ftrc. + Continuing on dev_rtc; removing the rtc demo. +20061008 Adding a dummy Dreamcast PROM module. (Homebrew Dreamcast + programs using KOS libs need this.) + Adding more SH instructions: "stc vbr,rn", rotl, rotr, fsca, + fmul, fadd, various floating-point moves, etc. A 256-byte + demo for Dreamcast runs :-) +20061012 Adding the SH "lds Rm,pr" and bsr instructions. +20061013 More SH instructions: "sts fpscr,rn", tas.b, and some more + floating point instructions, cmp/str, and more moves. + Adding a dummy dev_pvr (Dreamcast graphics controller). +20061014 Generalizing the expression evaluator (used in the built-in + debugger) to support parentheses and +-*/%^&|. +20061015 Removing the experimental tlb index hint code in + mips_memory_v2p.c, since it didn't really have any effect. +20061017 Minor SH updates; adding the "sts pr,Rn", fcmp/gt, fneg, + frchg, and some other instructions. Fixing missing sign- + extension in an 8-bit load instruction. +20061019 Adding a simple dev_dreamcast_rtc. + Implementing memory-mapped access to the SH ITLB/UTLB arrays. +20061021 Continuing on various SH and Dreamcast things: sh4 timers, + debug messages for dev_pvr, fixing some virtual address + translation bugs, adding the bsrf instruction. + The NetBSD/dreamcast GENERIC_MD kernel now reaches userland :) + Adding a dummy dev_dreamcast_asic.c (not really useful yet). + Implementing simple support for Store Queues. + Beginning on the PVR Tile Accelerator. +20061022 Generalizing the PVR framebuffer to support off-screen drawing, + multiple bit-depths, etc. (A small speed penalty, but most + likely worth it.) + Adding more SH instructions (mulu.w, fcmp/eq, fsub, fmac, + fschg, and some more); correcting bugs in "fsca" and "float". +20061024 Adding the SH ftrv (matrix * vector) instruction. Marcus + Comstedt's "tatest" example runs :) (wireframe only). + Correcting disassembly for SH floating point instructions that + use the xd* registers. + Adding the SH fsts instruction. + In memory_device_dyntrans_access(), only the currently used + range is now invalidated, and not the entire device range. +20061025 Adding a dummy AVR32 cpu mode skeleton. +20061026 Various Dreamcast updates; beginning on a Maple bus controller. +20061027 Continuing on the Maple bus. A bogus Controller, Keyboard, and + Mouse can now be detected by NetBSD and KOS homebrew programs. + Cleaning up the SH4 Timer Management Unit, and beginning on + SH4 interrupts. + Implementing the Dreamcast SYSASIC. +20061028 Continuing on the SYSASIC. + Adding the SH fsqrt instruction. + memory_sh.c now actually scans the ITLB. + Fixing a bug in dev_sh4.c, related to associative writes into + the memory-mapped UTLB array. NetBSD/dreamcast now reaches + userland stably, and prints the "Terminal type?" message :-] + Implementing enough of the Dreamcast keyboard to make NetBSD + accept it for input. + Enabling SuperH for stable (non-development) builds. + Adding NetBSD/dreamcast to the documentation, although it + doesn't support root-on-nfs yet. +20061029 Changing usleep(1) calls in the debugger to usleep(10000) + (according to Brian Foley, this makes GXemul run better on + MacOS X). + Making the Maple "Controller" do something (enough to barely + interact with dcircus.elf). +20061030-31 Some progress on the PVR. More test programs start running (but + with strange output). + Various other SH4-related updates. +20061102 Various Dreamcast and SH4 updates; more KOS demos run now. +20061104 Adding a skeleton dev_mb8696x.c (the Dreamcast's LAN adapter). +20061105 Continuing on the MB8696x; NetBSD/dreamcast detects it as mbe0. + Testing for the release. + +============== RELEASE 0.4.3 ============== + +20061107 Adding a new disk image option (-d o...) which sets the ISO9660 + filesystem base offset; also making some other hacks to allow + NetBSD/dreamcast and homebrew demos/games to boot directly + from a filesystem image. + Moving Dreamcast-specific stuff in the documentation to its + own page (dreamcast.html). + Adding a border to the Dreamcast PVR framebuffer. +20061108 Adding a -T command line option (again?), for halting the + emulator on unimplemented memory accesses. +20061109 Continuing on various SH4 and Dreamcast related things. + The emulator should now halt on more unimplemented device + accesses, instead of just printing a warning, forcing me to + actually implement missing stuff :) +20061111 Continuing on SH4 and Dreamcast stuff. + Adding a bogus Landisk (SH4) machine mode. +20061112 Implementing some parts of the Dreamcast GDROM device. With + some ugly hacks, NetBSD can (barely) mount an ISO image. +20061113 NetBSD/dreamcast now starts booting from the Live CD image, + but crashes randomly quite early on in the boot process. +20061122 Beginning on a skeleton interrupt.h and interrupt.c for the + new interrupt subsystem. +20061124 Continuing on the new interrupt system; taking the first steps + to attempt to connect CPUs (SuperH and MIPS) and devices + (dev_cons and SH4 timer interrupts) to it. Many things will + probably break from now on. +20061125 Converting dev_ns16550, dev_8253 to the new interrupt system. + Attempting to begin to convert the ISA bus. +20061130 Incorporating a patch from Brian Foley for the configure + script, which checks for X11 libs in /usr/X11R6/lib64 (which + is used on some Linux systems). +20061227 Adding a note in the man page about booting from Dreamcast + CDROM images (i.e. that no external kernel is needed). +20061229 Continuing on the interrupt system rewrite: beginning to + convert more devices, adding abort() calls for legacy interrupt + system calls so that everything now _has_ to be rewritten! + Almost all machine modes are now completely broken. +20061230 More progress on removing old interrupt code, mostly related + to the ISA bus + devices, the LCA bus (on AlphaBook1), and + the Footbridge bus (for CATS). And some minor PCI stuff. + Connecting the ARM cpu to the new interrupt system. + The CATS, NetWinder, and QEMU_MIPS machine modes now work with + the new interrupt system :) +20061231 Connecting PowerPC CPUs to the new interrupt system. + Making PReP machines (IBM 6050) work again. + Beginning to convert the GT PCI controller (for e.g. Malta + and Cobalt emulation). Some things work, but not everything. + Updating Copyright notices for 2007. +20070101 Converting dev_kn02 from legacy style to devinit; the 3max + machine mode now works with the new interrupt system :-] +20070105 Beginning to convert the SGI O2 machine to the new interrupt + system; finally converting O2 (IP32) devices to devinit, etc. +20070106 Continuing on the interrupt system redesign/rewrite; KN01 + (PMAX), KN230, and Dreamcast ASIC interrupts should work again, + moving out stuff from machine.h and devices.h into the + corresponding devices, beginning the rewrite of i80321 + interrupts, etc. +20070107 Beginning on the rewrite of Eagle interrupt stuff (PReP, etc). +20070117 Beginning the rewrite of Algor (V3) interrupts (finally + changing dev_v3 into devinit style). +20070118 Removing the "bus" registry concept from machine.h, because + it was practically meaningless. + Continuing on the rewrite of Algor V3 ISA interrupts. +20070121 More work on Algor interrupts; they are now working again, + well enough to run NetBSD/algor. :-) +20070122 Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips + can be installed using the new interrupt system :-) +20070123 Making the testmips mode work with the new interrupt system. +20070127 Beginning to convert DEC5800 devices to devinit, and to the + new interrupt system. + Converting Playstation 2 devices to devinit, and converting + the interrupt system. Also fixing a severe bug: the interrupt + mask register on Playstation 2 is bitwise _toggled_ on writes. +20070128 Removing the dummy NetGear machine mode and the 8250 device + (which was only used by the NetGear machine). + Beginning to convert the MacPPC GC (Grand Central) interrupt + controller to the new interrupt system. + Converting Jazz interrupts (PICA61 etc.) to the new interrupt + system. NetBSD/arc can be installed again :-) + Fixing the JAZZ timer (hardcoding it at 100 Hz, works with + NetBSD and it is better than a completely dummy timer as it + was before). + Converting dev_mp to the new interrupt system, although I + haven't had time to actually test it yet. + Completely removing src/machines/interrupts.c, cpu_interrupt + and cpu_interrupt_ack in src/cpu.c, and + src/include/machine_interrupts.h! Adding fatal error messages + + abort() in the few places that are left to fix. + Converting dev_z8530 to the new interrupt system. + FINALLY removing the md_int struct completely from the + machine struct. + SH4 fixes (adding a PADDR invalidation in the ITLB replacement + code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs + all the way to the login prompt, and can be interacted with :-) + Converting the CPC700 controller (PCI and interrupt controller + for PM/PPC) to the new interrupt system. +20070129 Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/ + sgimips' and OpenBSD/sgi's ramdisk kernels can now be + interacted with again. +20070130 Moving out the MIPS multi_lw and _sw instruction combinations + so that they are auto-generated at compile time instead. +20070131 Adding detection of amd64/x86_64 hosts in the configure script, + for doing initial experiments (again :-) with native code + generation. + Adding a -k command line option to set the size of the dyntrans + cache, and a -B command line option to disable native code + generation, even if GXemul was compiled with support for + native code generation for the specific host CPU architecture. +20070201 Experimenting with a skeleton for native code generation. + Changing the default behaviour, so that native code generation + is now disabled by default, and has to be enabled by using + -b on the command line. +20070202 Continuing the native code generation experiments. + Making PCI interrupts work for Footbridge again. +20070203 More native code generation experiments. + Removing most of the native code generation experimental code, + it does not make sense to include any quick hacks like this. + Minor cleanup/removal of some more legacy MIPS interrupt code. +20070204 Making i80321 interrupts work again (for NetBSD/evbarm etc.), + and fixing the timer at 100 Hz. +20070206 Experimenting with removing the wdc interrupt slowness hack. +20070207 Lowering the number of dyntrans TLB entries for MIPS from + 192 to 128, resulting in a minor speed improvement. + Minor optimization to the code invalidation routine in + cpu_dyntrans.c. +20070208 Increasing (experimentally) the nr of dyntrans instructions per + loop from 60 to 120. +20070210 Commenting out (experimentally) the dyntrans_device_danger + detection in memory_rw.c. + Changing the testmips and baremips machines to use a revision 2 + MIPS64 CPU by default, instead of revision 1. + Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC + files, the PC bios emulation, and the Olivetti M700 (ARC) and + db64360 emulation modes. +20070211 Adding an "mp" demo to the demos directory, which tests the + SMP functionality of the testmips machine. + Fixing PReP interrupts some more. NetBSD/prep now boots again. +20070216 Adding a "nop workaround" for booting Mach/PMAX to the + documentation; thanks to Artur Bujdoso for the values. + Converting more of the MacPPC interrupt stuff to the new + system. + Beginning to convert BeBox interrupts to the new system. + PPC603e should NOT have the PPC_NO_DEC flag! Removing it. + Correcting BeBox clock speed (it was set to 100 in the NetBSD + bootinfo block, but should be 33000000/4), allowing NetBSD + to start without using the (incorrect) PPC_NO_DEC hack. +20070217 Implementing (slow) AltiVec vector loads and stores, allowing + NetBSD/macppc to finally boot using the GENERIC kernel :-) + Updating the documentation with install instructions for + NetBSD/macppc. +20070218-19 Regression testing for the release. + +============== RELEASE 0.4.4 ============== + +20070224 Minor update to the initialization of the ns16550 in + machine_walnut.c, to allow that machine type to boot with the + new interrupt system (although it is still a dummy machine). + Adding a wdc at 0x14000000 to machine_landisk.c, and fixing + the SCIF serial interrupts of the SH4 cpu enough to get + NetBSD/landisk booting from a disk image :-) Adding a + preliminary install instruction skeleton to guestoses.html. +20070306 Adding SH-IPL+G PROM emulation, and also passing the "end" + symbol in r5 on bootup, for Landisk emulation. This is enough + to get OpenBSD/landisk to install :) Adding a preliminary + install instruction skeleton to the documentation. SuperH + emulation is still shaky, though :-/ +20070307 Fixed a strangeness in memory_sh.c (read/write was never + returned for any page). (Unknown whether this fixes any actual + problems, though.) +20070308 dev_ram.c fix: invalidate code translations on writes to + RAM, emulated as separate devices. Linux/dreamcast gets + further in the boot process than before, but still bugs out + in userland. + Fixing bugs in the "stc.l gbr,@-rN" and "ldc.l @rN+,gbr" SuperH + instructions (they should NOT check the MD bit), allowing the + Linux/dreamcast Live CD to reach userland correctly :-) +20070310 Changing the cpu name "Alpha" in src/useremul.c to "21364" to + unbreak userland syscall emulation of FreeBSD/Alpha binaries. +20070314 Applying a patch from Michael Yaroslavtsev which fixes the + previous Linux lib64 patch to the configure script. +20070315 Adding a (dummy) sun4v machine type, and SPARC T1 cpu type. +20070316 Creating a new directory, src/disk, and moving diskimage.c + to it. Separating out bootblock loading stuff from emul.c into + new files in src/disk. + Adding some more SPARC registers. +20070318 Preparing/testing for a minirelease, 0.4.4.1. + +============== RELEASE 0.4.4.1 ============== + +20070324 Adding a "--debug" option to the configure script, to disable + optimizations in unstable development builds. + Moving out SCSI-specific stuff from diskimage.c into a new + diskimage_scsicmd.c. + Applying Håvard Eidnes' patch for SCSICDROM_READ_DISKINFO and + SCSICDROM_READ_TRACKINFO. (Not really tested yet.) + Implementing disk image "overlays" (to allow simple roll-back + to previous disk state). Adding a 'V' disk flag for this, and + updating the man page and misc.html. +20070325 Stability fix to cpu_dyntrans.c, when multiple physical pages + share the same initial table entry. (The ppp == NULL check + should be physpage_ofs == 0.) Bug found by analysing GXemul + against a version patched for Godson. + Fixing a second occurance of the same problem (also in + cpu_dyntrans.c). + Fixing a MAJOR physical page leak in cpu_dyntrans.c; pages + weren't _added_ to the set of translated pages, they _replaced_ + all previous pages. It's amazing that this bug has been able + to live for this long. (Triggered when emulating >128MB RAM.) +20070326 Removing the GDB debugging stub support; it was too hackish + and ugly. +20070328 Moving around some native code generation skeleton code. +20070329 The -lm check in the configure script now also checks for sin() + in addition to sqrt(). (Thanks to Nigel Horne for noticing that + sqrt was not enough on Fedora Core 6.) (Not verified yet.) +20070330 Fixing an indexing bug in dev_sh4.c, found by using gcc version + 4.3.0 20070323. +20070331 Some more experimentation with native code generation. +20070404 Attempting to fix some more SH4 SCIF interrupt bugs; rewriting + the SH interrupt assertion/deassertion code somewhat. +20070410 Splitting src/file.c into separate files in src/file/. + Cleanup: Removing the dummy TS7200, Walnut, PB1000, and + Meshcube emulation modes, and dev_epcom and dev_au1x00. + Removing the experimental CHIP8/RCA180x code; it wasn't really + working much lately, anyway. It was fun while it lasted. + Also removing the experimental Transputer CPU support. +20070412 Moving the section about how the dynamic translation system + works from intro.html to a separate translation.html file. + Minor SH fixes; attempting to get OpenBSD/landisk to run + without randomly bugging out, but no success yet. +20070413 SH SCI (serial bit interface) should now work together with a + (new) RS5C313 clock device (for Landisk emulation). +20070414 Moving Redhat/MIPS down from supported to experimental, in + guestoses.html. + Preparing for a new release; doing some regression testing etc. + +============== RELEASE 0.4.5 ============== +