--- trunk/HISTORY 2007/10/08 16:17:48 2 +++ trunk/HISTORY 2007/10/08 16:21:53 38 @@ -1,4 +1,4 @@ -$Id: HISTORY,v 1.676 2005/04/07 15:14:55 debug Exp $ +$Id: HISTORY,v 1.1515 2007/04/14 05:39:46 debug Exp $ Changelog for GXemul: --------------------- @@ -1817,3 +1817,1577 @@ ============== RELEASE 0.3.1 ============== +20050408 Some minor updates to the wdc. Linux now doesn't complain + anymore if a disk is non-present. +20050409 Various minor fixes (a bintrans bug, and some other things). + The wdc seems to work with Playstation2 emulation, but there + is a _long_ annoying delay when disks are detected. + Fixing a really important bintrans bug (when devices and RAM + are mixed within 4KB pages), which was triggered with + NetBSD/playstation2 kernels. +20050410 Adding a dummy dev_ps2_ether (just so that NetBSD doesn't + complain as much during bootup). + Symbols starting with '$' are now ignored. + Renaming dev_ps2_ohci.c to dev_ohci.c, etc. +20050411 Moving the bintrans-cache-isolation check from cpu_mips.c to + cpu_mips_coproc.c. (I thought this would give a speedup, but + it's not noticable.) + Better playstation2 sbus interrupt code. + Skip ahead many ticks if the count register is read manually. + (This increases the speed of delay-loops that simply read + the count register.) +20050412 Updates to the playstation2 timer/interrupt code. + Some other minor updates. +20050413 NetBSD/cobalt runs from a disk image :-) including userland; + updating the documentation on how to install NetBSD/cobalt + using NetBSD/pmax (!). + Some minor bintrans updates (no real speed improvement) and + other minor updates (playstation2 now uses the -o options). +20050414 Adding a dummy x86 (and AMD64) mode. +20050415 Adding some (32-bit and 16-bit) x86 instructions. + Adding some initial support for non-SCSI, non-IDE floppy + images. (The x86 mode can boot from these, more or less.) + Moving the devices/ and include/ directories to src/devices/ + and src/include/, respectively. +20050416 Continuing on the x86 stuff. (Adding pc_bios.c and some simple + support for software interrupts in 16-bit mode.) +20050417 Ripping out most of the x86 instruction decoding stuff, trying + to rewrite it in a cleaner way. + Disabling some of the least working CPU families in the + configure script (sparc, x86, alpha, hppa), so that they are + not enabled by default. +20050418 Trying to fix the bug which caused problems when turning on + and off bintrans interactively, by flushing the bintrans cache + whenever bintrans is manually (re)enabled. +20050419 Adding the 'lswi' ppc instruction. + Minor updates to the x86 instruction decoding. +20050420 Renaming x86 register name indices from R_xx to X86_R_xx (this + makes building on Tru64 nicer). +20050422 Adding a check for duplicate MIPS TLB entries on tlbwr/tlbwi. +20050427 Adding screenshots to guestoses.html. + Some minor fixes and testing for the next release. + +============== RELEASE 0.3.2 ============== + +20050428 Disabling the "-fmove-all-movables" option in the configure + script, because it causes the compile to fail on OpenBSD/sgi. +20050502 Minor updates. +20050503 Removing the WRT54G mode (it was bogus anyway), and adding a + comment about Windows NT for MIPS in doc/experiments.html. + Minor updates to the x86 instruction decoding. +20050504 Adding some more x86 instructions. + Adding support for reading files from ISO9660 CDROMs (including + gzipped files). It's an ugly hack, but it seems to work. + Various other minor updates (dev_vga.c, pc_bios.c etc). +20050505 Some more x86-related updates. + Beginning (what I hope will be) a major code cleanup phase. + "bootris" (an x86 bootsector) runs :-) +20050506 Adding some more x86 instructions. +20050507 tmpnam => mkstemp. + Working on a hack to allow VGA charcells to be shown even when + not running with X11. + Adding more x86 instructions. +20050508 x86 32-bit SIB addressing fix, and more instructions. +20050509 Adding more x86 instructions. +20050510 Minor documentation updates, and other updates (x86 stuff etc.) +20050511 More x86-related updates. +20050513 Various updates, mostly x86-related. (Trying to fix flag + calculation, factoring out the ugly shift/rotate code, and + some other things.) +20050514 Adding support for loading some old i386 a.out executables. + Finally beginning the cleanup of machine/PROM/bios dependant + info. + Some minor documentation updates. + Trying to clean up ARCBIOS stuff a little. +20050515 Trying to make it possible to actually use more than one disk + type per machine (floppy, ide, scsi). + Trying to clean up the kbd vs PROM console stuff. (For PC and + ARC emulation modes, mostly.) + Beginning to add an 8259 interrupt controller, and connecting + it to the x86 emulation. +20050516 The first x86 interrupts seem to work (keyboard stuff). + Adding a 8253/8254 programmable interval timer skeleton. + FreeDOS now reaches a command prompt and can be interacted + with. +20050517 After some bugfixes, MS-DOS also (sometimes) reaches a + command prompt now. + Trying to fix the pckbc to work with MS-DOS' keyb.com, but no + success yet. +20050518 Adding a simple 32-bit x86 MMU skeleton. +20050519 Some more work on the x86 stuff. (Beginning the work on paging, + and various other fixes). +20050520 More updates. Working on dev_vga (4-bit graphics modes), adding + 40 columns support to the PC bios emulation. + Trying to add support for resizing windows when switching + between graphics modes. +20050521 Many more x86-related updates. +20050522 Correcting the initial stack pointer's sign-extension for + ARCBIOS emulation (thanks to Alec Voropay for noticing the + error). + Continuing on the cleanup (ARCBIOS etc). + dev_vga updates. +20050523 More x86 updates: trying to add some support for protected mode + interrupts (via gate descriptors) and many other fixes. + More ARCBIOS cleanup. + Adding a device flag which indicates that reads cause no + side-effects. (Useful for the "dump" command in the debugger, + and other things.) + Adding support for directly starting up x86 ELFs, skipping the + bootloader stage. (Most ELFs, however, are not suitable for + this.) +20050524 Adding simple 32-bit x86 TSS task switching, but no privilege + level support yet. + More work on dev_vga. A small "Copper bars" demo works. :-) + Adding support for Trap Flag (single-step exceptions), at least + in real mode, and various other x86-related fixes. +20050525 Adding a new disk image prefix (gH;S;) which can be used to + override the default nr of heads and sectors per track. +20050527 Various bug fixes, more work on the x86 mode (stack change on + interrupts between different priv.levels), and some minor + documentation updates. +20050528 Various fixes (x86 stuff). +20050529 More x86 fixes. An OpenBSD/i386 bootfloppy reaches userland + and can be interacted with (although there are problems with + key repetition). NetBSD/i386 triggers a serious CISC-related + problem: instruction fetches across page boundaries, where + the later part isn't actually part of the instruction. +20050530 Various minor updates. (Documentation updates, etc.) +20050531 Adding some experimental code (experiments/new_test_*) which + could be useful for dynamic (but not binary) translation in + the future. +20050602 Adding a dummy ARM skeleton. + Fixing the pckbc key repetition problem (by adding release + scancodes for all keypresses). +20050603 Minor updates for the next release. +20050604 Release testing. Minor updates. + +============== RELEASE 0.3.3 ============== + +20050604 There'll probably be a 0.3.3.1 release soon, with some very + very tiny updates. + +============== RELEASE 0.3.3.1 ============== + +20050609 Adding simple MIPS IPIs (to dev_mp). +20050611 Adding an ugly hack to track down low-reference bugs + (define TRACE_NULL_CRASHES, or configure --tracenull). + Other minor updates. +20050612 Adding a dummy evbmips mode. + +============== RELEASE 0.3.3.2 ============== + +20050617 Experimenting some more with netbooting OpenBSD/sgi. Adding + a hack which allows emulated ethernet networks to be + distributed across multiple emulator processes. +20050618 Minor updates (documentation, dummy YAMON emulation, etc). +20050620 strcpy/strcat -> strlcpy/strlcat updates. + Some more progress on evbmips (Malta). +20050621 Adding a section to doc/configfiles.html about ethernet + emulation across multiple hosts. + Beginning the work on the ARM translation engine (using the + dynamic-but-not-binary translation method). + Fixing a bintrans bug: 0x9fc00000 should always be treated as + PROM area, just as 0xbfc00000 is. + Minor progress on Malta emulation (the PCI-ISA bus). +20050622 NetBSD/evbmips can now be installed (using another emulated + machine) and run (including userland and so on). :-) + Spliting up the bintrans haddr_entry field into two (one for + read, one for write). Probably not much of a speed increase, + though. + Updating some NetBSD 2.0 -> 2.0.2 in the documentation. +20050623 Minor updates (documentation, the TODO file, etc). + gzipped kernels are now always automagically gunzipped when + loaded. +20050624 Adding a dummy Playstation Portable (PSP) mode, just barely + enough to run Hello World (in weird colors :-). + Removing the -b command line option; old bintrans is enabled + by default instead. It makes more sense. + Trying to finally fix the non-working performance measurement + thing (instr/second etc). +20050625 Continuing on the essential basics for ARM emulation. Two + instructions seem to work, a branch and a simple "mov". (The + mov arguments are not correct yet.) Performance is definitely + reasonable. + Various other minor updates. + Adding the ARM "bl" instruction. + Adding support for combining multiple ARM instructions into one + function call. ("mov" + "mov" is the only one implemented so + far, but it seems to work.) + Cleaning up some IP32 interrupt things (crime/mace); disabling + the PS/2 keyboard controller on IP32, so that NetBSD/sgimips + boots into userland again. +20050626 Finally! NetBSD/sgimips netboots. Adding instructions to + doc/guestoses.html on how to set up an nfs server etc. + Various other minor fixes. + Playstation Portable ".pbp" files can now be used directly. + (The ELF part of the .pbp is extracted transparently.) + Converting some sprintf -> snprintf. + Adding some more instructions to the ARM disassembler. +20050627 More ARM updates. Adding some simple ldr(b), str(b), + cmps, and conditional branch instructions, enough to run + a simple Hello World program. + All ARM instructions are now inlined/generated for all possible + condition codes. + Adding add and sub, and more load/store instructions. + Removing dummy files: cpu_alpha.c, cpu_hppa.c, and cpu_sparc.c. + Some minor documentation updates; preparing for a 0.3.4 + release. Updating some URLs. + +============== RELEASE 0.3.4 ============== + +20050628 Continuing the work on the ARM translation engine. end_of_page + works. Experimenting with load/store translation caches + (virtual -> physical -> host). +20050629 More ARM stuff (memory access translation cache, mostly). This + might break a lot of stuff elsewhere, probably some MIPS- + related translation things. +20050630 Many load/stores are now automatically generated and included + into cpu_arm_instr.c; 1024 functions in total (!). + Fixes based on feedback from Alec Voropay: only print 8 hex + digits instead of 16 in some cases when emulating 32-bit + machines; similar 8 vs 16 digit fix for breakpoint addresses; + 4Kc has 16 TLB entries, not 48; the MIPS config select1 + register is now printed with "reg ,0". + Also changing many other occurances of 16 vs 8 digit output. + Adding cache associativity fields to mips_cpu_types.h; updating + some other cache fields; making the output of + mips_cpu_dumpinfo() look nicer. + Generalizing the bintrans stuff for device accesses to also + work with the new translation system. (This might also break + some MIPS things.) + Adding multi-load/store instructions to the ARM disassembler + and the translator, and some optimizations of various kinds. +20050701 Adding a simple dev_disk (it can read/write sectors from + disk images). +20050712 Adding dev_ether (a simple ethernet send/receive device). + Debugger command "ninstrs" for toggling show_nr_of_instructions + during runtime. + Removing the framebuffer logo. +20050713 Continuing on dev_ether. + Adding a dummy cpu_alpha (again). +20050714 More work on cpu_alpha. +20050715 More work on cpu_alpha. Many instructions work, enough to run + a simple framebuffer fill test (similar to the ARM test). +20050716 More Alpha stuff. +20050717 Minor updates (Alpha stuff). +20050718 Minor updates (Alpha stuff). +20050719 Generalizing some Alpha instructions. +20050720 More Alpha-related updates. +20050721 Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha. +20050722 Alpha-related updates: userland stuff (Hello World using + write() compiled statically for FreeBSD/Alpha runs fine), and + more instructions are now implemented. +20050723 Fixing ldq_u and stq_u. + Adding more instructions (conditional moves, masks, extracts, + shifts). +20050724 More FreeBSD/Alpha userland stuff, and adding some more + instructions (inserts). +20050725 Continuing on the Alpha stuff. (Adding dummy ldt/stt.) + Adding a -A command line option to turn off alignment checks + in some cases (for translated code). + Trying to remove the old bintrans code which updated the pc + and nr_of_executed_instructions for every instruction. +20050726 Making another attempt att removing the pc/nr of instructions + code. This time it worked, huge performance increase for + artificial test code, but performance loss for real-world + code :-( so I'm scrapping that code for now. + Tiny performance increase on Alpha (by using ret instead of + jmp, to play nice with the Alpha's branch prediction) for the + old MIPS bintrans backend. +20050727 Various minor fixes and cleanups. +20050728 Switching from a 2-level virtual to host/physical translation + system for ARM emulation, to a 1-level translation. + Trying to switch from 2-level to 1-level for the MIPS bintrans + system as well (Alpha only, so far), but there is at least one + problem: caches and/or how they work with device mappings. +20050730 Doing the 2-level to 1-level conversion for the i386 backend. + The cache/device bug is still there for R2K/3K :( + Various other minor updates (Malta etc). + The mc146818 clock now updates the UIP bit in a way which works + better with Linux for at least sgimips and Malta emulation. + Beginning the work on refactoring the dyntrans system. +20050731 Continuing the dyntrans refactoring. + Fixing a small but serious host alignment bug in memory_rw. + Adding support for big-endian load/stores to the i386 bintrans + backend. + Another minor i386 bintrans backend update: stores from the + zero register are now one (or two) loads shorter. + The slt and sltu instructions were incorrectly implemented for + the i386 backend; only using them for 32-bit mode for now. +20050801 Continuing the dyntrans refactoring. + Cleanup of the ns16550 serial controller (removing unnecessary + code). + Bugfix (memory corruption bug) in dev_gt, and a patch/hack from + Alec Voropay for Linux/Malta. +20050802 More cleanup/refactoring of the dyntrans subsystem: adding + phys_page pointers to the lookup tables, for quick jumps + between translated pages. + Better fix for the ns16550 device (but still no real FIFO + functionality). + Converting cpu_ppc to the new dyntrans system. This means that + I will have to start from scratch with implementing each + instruction, and figure out how to implement dual 64/32-bit + modes etc. + Removing the URISC CPU family, because it was useless. +20050803 When selecting a machine type, the main type can now be omitted + if the subtype name is unique. (I.e. -E can be omitted.) + Fixing a dyntrans/device update bug. (Writes to offset 0 of + a device could sometimes go unnoticed.) + Adding an experimental "instruction combination" hack for + ARM for memset-like byte fill loops. +20050804 Minor progress on cpu_alpha and related things. + Finally fixing the MIPS dmult/dmultu bugs. + Fixing some minor TODOs. +20050805 Generalizing the 8259 PIC. It now also works with Cobalt + and evbmips emulation, in addition to the x86 hack. + Finally converting the ns16550 device to use devinit. + Continuing the work on the dyntrans system. Thinking about + how to add breakpoints. +20050806 More dyntrans updates. Breakpoints seem to work now. +20050807 Minor updates: cpu_alpha and related things; removing + dev_malta (as it isn't used any more). + Dyntrans: working on general "show trace tree" support. + The trace tree stuff now works with both the old MIPS code and + with newer dyntrans modes. :) + Continuing on Alpha-related stuff (trying to get *BSD to boot + a bit further, adding more instructions, etc). +20050808 Adding a dummy IA64 cpu family, and continuing the refactoring + of the dyntrans system. + Removing the regression test stuff, because it was more or + less useless. + Adding loadlinked/storeconditional type instructions to the + Alpha emulation. (Needed for Linux/alpha. Not very well tested + yet.) +20050809 The function call trace tree now prints a per-function nr of + arguments. (Semi-meaningless, since that data isn't read yet + from the ELFs; some hardcoded symbols such as memcpy() and + strlen() work fine, though.) + More dyntrans refactoring; taking out more of the things that + are common to all cpu families. +20050810 Working on adding support for "dual mode" for PPC dyntrans + (i.e. both 64-bit and 32-bit modes). + (Re)adding some simple PPC instructions. +20050811 Adding a dummy M68K cpu family. The dyntrans system isn't ready + for variable-length ISAs yet, so it's completely bogus so far. + Re-adding more PPC instructions. + Adding a hack to src/file.c which allows OpenBSD/mac68k a.out + kernels to be loaded. + Beginning to add PPC loads/stores. So far they only work in + 32-bit mode. +20050812 The configure file option "add_remote" now accepts symbolic + host names, in addition to numeric IPv4 addresses. + Re-adding more PPC instructions. +20050814 Continuing to port back more PPC instructions. + Found and fixed the cache/device write-update bug for 32-bit + MIPS bintrans. :-) + Triggered a really weird and annoying bug in Compaq's C + compiler; ccc sometimes outputs code which loads from an + address _before_ checking whether the pointer was NULL or not. + (I'm not sure how to handle this problem.) +20050815 Removing all of the old x86 instruction execution code; adding + a new (dummy) dyntrans module for x86. + Taking the first steps to extend the dyntrans system to support + variable-length instructions. + Slowly preparing for the next release. +20050816 Adding a dummy SPARC cpu module. + Minor updates (documentation etc) for the release. + +============== RELEASE 0.3.5 ============== + +20050816 Some success in decoding the way the SGI O2 PROM draws graphics + during bootup; lines/rectangles and bitmaps work, enough to + show the bootlogo etc. :-) + Adding more PPC instructions, and (dummy) BAT registers. +20050817 Updating the pckbc to support scancode type 3 keyboards + (required in order to interact with the SGI O2 PROM). + Adding more PPC instructions. +20050818 Adding more ARM instructions; general register forms. + Importing armreg.h from NetBSD (ARM cpu ids). Adding a (dummy) + CATS machine mode (using SA110 as the default CPU). + Continuing on general dyntrans related stuff. +20050819 Register forms for ARM load/stores. Gaah! The Compaq C Compiler + bug is triggered for ARM loads as well, not just PPC :-( + Adding full support for ARM PC-relative load/stores, and load/ + stores where the PC register is the destination register. + Adding support for ARM a.out binaries. +20050820 Continuing to add more ARM instructions, and correcting some + bugs. Continuing on CATS emulation. + More work on the PPC stuff. +20050821 Minor PPC and ARM updates. Adding more machine types. +20050822 All ARM "data processing instructions" are now generated + automatically. +20050824 Beginning the work on the ARM system control coprocessor. + Adding support for ARM halfword load/stores, and signed loads. +20050825 Fixing an important bug related to the ARM condition codes. + OpenBSD/zaurus and NetBSD/netwinder now print some boot + messages. :) + Adding a dummy SH (Hitachi SuperH) cpu family. + Beginning to add some ARM virtual address translation. + MIPS bugfixes: unaligned PC now cause an ADEL exception (at + least for non-bintrans execution), and ADEL/ADES (not + TLBL/TLBS) are used if userland tries to access kernel space. + (Thanks to Joshua Wise for making me aware of these bugs.) +20050827 More work on the ARM emulation, and various other updates. +20050828 More ARM updates. + Finally taking the time to work on translation invalidation + (i.e. invalidating translated code mappings when memory is + written to). Hopefully this doesn't break anything. +20050829 Moving CPU related files from src/ to a new subdir, src/cpus/. + Moving PROM emulation stuff from src/ to src/promemul/. + Better debug instruction trace for ARM loads and stores. +20050830 Various ARM updates (correcting CMP flag calculation, etc). +20050831 PPC instruction updates. (Flag fixes, etc.) +20050901 Various minor PPC and ARM instruction emulation updates. + Minor OpenFirmware emulation updates. +20050903 Adding support for adding arbitrary ARM coprocessors (with + the i80321 I/O coprocessor as a first test). + Various other ARM and PPC updates. +20050904 Adding some SHcompact disassembly routines. +20050907 (Re)adding a dummy HPPA CPU module, and a dummy i960 module. +20050908 Began hacking on some Apple Partition Table support. +20050909 Adding support for loading Mach-O (Darwin PPC) binaries. +20050910 Fixing an ARM bug (Carry flag was incorrectly updated for some + data processing instructions); OpenBSD/cats and NetBSD/ + netwinder get quite a bit further now. + Applying a patch to dev_wdc, and a one-liner to dev_pcic, to + make them work better when emulating new versions of OpenBSD. + (Thanks to Alexander Yurchenko for the patches.) + Also doing some other minor updates to dev_wdc. (Some cleanup, + and finally converting to devinit, etc.) +20050912 IRIX doesn't have u_int64_t by default (noticed by Andreas + ); configure updated to reflect this. + Working on ARM register bank switching, CPSR vs SPSR issues, + and beginning the work on interrupt/exception support. +20050913 Various minor ARM updates (speeding up load/store multiple, + and fixing a ROR bug in R(); NetBSD/cats now boots as far as + OpenBSD/cats). +20050917 Adding a dummy Atmel AVR (8-bit) cpu family skeleton. +20050918 Various minor updates. +20050919 Symbols are now loaded from Mach-O executables. + Continuing the work on adding ARM exception support. +20050920 More work on ARM stuff: OpenBSD/cats and NetBSD/cats reach + userland! :-) +20050921 Some more progress on ARM interrupt specifics. +20050923 Fixing linesize for VR4121 (patch by Yurchenko). Also fixing + linesizes/cachesizes for some other VR4xxx. + Adding a dummy Acer Labs M1543 PCI-ISA bridge (for CATS) and a + dummy Symphony Labs 83C553 bridge (for Netwinder), usable by + dev_footbridge. +20050924 Some PPC progress. +20050925 More PPC progress. +20050926 PPC progress (fixing some bugs etc); Darwin's kernel gets + slightly further than before. +20050928 Various updates: footbridge/ISA/pciide stuff, and finally + fixing the VGA text scroll-by-changing-the-base-offset bug. +20050930 Adding a dummy S3 ViRGE pci card for CATS emulation, which + both NetBSD and OpenBSD detects as VGA. + Continuing on Footbridge (timers, ISA interrupt stuff). +20051001 Continuing... there are still bugs, probably interrupt- + related. +20051002 More work on the Footbridge (interrupt stuff). +20051003 Various minor updates. (Trying to find the bug(s).) +20051004 Continuing on the ARM stuff. +20051005 More ARM-related fixes. +20051007 FINALLY! Found and fixed 2 ARM bugs: 1 memory related, and the + other was because of an error in the ARM manual (load multiple + with the S-bit set should _NOT_ load usermode registers, as the + manual says, but it should load saved registers, which may or + may not happen to be usermode registers). + NetBSD/cats and OpenBSD/cats seem to install fine now :-) + except for a minor bug at the end of the OpenBSD/cats install. + Updating the documentation, preparing for the next release. +20051008 Continuing with release testing and cleanup. + +============== RELEASE 0.3.6 ============== + +20051008 The bug was not because of faulty ARM documentation after all, + but it was related to those parts of the code. + Fixing the RTC (dev_mc146818) to work with CATS. +20051009 Rewriting the R() function; now there are 8192 automatically + generated smaller functions doing the same thing, but hopefully + faster. This also fixes some bugs which were triggered when + trying to compile GXemul inside itself. :-) + Adding a dummy dev_lpt. +20051010 Small hack to not update virtual translation tables if memory + accesses are done with the NO_EXCEPTION flag; a time reduction + of almost a factor 2 for a full NetBSD/cats install. :-) +20051011 Passing -A as the default boot arg for CATS (works fine with + OpenBSD/cats). + +============== RELEASE 0.3.6.1 ============== + +20051012 Fixing the VGA cursor offset bug, and speeding up framebuffer + redraws if character cells contain the same thing as during + the last redraw. +20051013 Adding a slow strd ARM instruction hack. +20051017 Minor updates: Adding a dummy i80321 Verde controller (for + XScale emulation), fixing the disassembly of the ARM "ldrd" + instruction, adding "support" for less-than-4KB pages for ARM + (by not adding them to translation tables). +20051020 Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints + some boot messages on an emulated Jornada 720. + Making dev_ram work better with dyntrans (speeds up some things + quite a bit). +20051021 Automatically generating some of the most common ARM load/store + multiple instructions. +20051022 Better statistics gathering for the ARM load/store multiple. + Various other dyntrans and device updates. +20051023 Various minor updates. +20051024 Continuing; minor device and dyntrans fine-tuning. Adding the + first "reasonable" instruction combination hacks for ARM (the + cores of NetBSD/cats' memset and memcpy). +20051025 Fixing a dyntrans-related bug in dev_vga. Also changing the + dyntrans low/high access notification to only be updated on + writes, not reads. Hopefully it will be enough. (dev_vga in + charcell mode now seems to work correctly with both reads and + writes.) + Experimenting with gathering dyntrans statistics (which parts + of emulated RAM that are actually executed), and adding + instruction combination hacks for cache cleaning and a part of + NetBSD's scanc() function. +20051026 Adding a bitmap for ARM emulation which indicates if a page is + (specifically) user accessible; loads and stores with the t- + flag set can now use the translation arrays, which results in + a measurable speedup. +20051027 Dyntrans updates; adding an extra bitmap array for 32-bit + emulation modes, speeding up the check whether a physical page + has any code translations or not (O(n) -> O(1)). Doing a + similar reduction of O(n) to O(1) by avoiding the scan through + the translation entries on a translation update (32-bit mode + only). + Various other minor hacks. +20051029 Quick release, without any testing at all. + +============== RELEASE 0.3.6.2 ============== + +20051031 Adding disassembly support for more ARM instructions (clz, + smul* etc), and adding a hack to support "new tiny" pages + for StrongARM. +20051101 Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD + 3.7 -> 3.8, and lots of testing). + Changing from 1-sector PIO mode 0 transfers to 128-sector PIO + mode 3 (in dev_wdc). + Various minor ARM dyntrans updates (pc-relative loads from + within the same page as the instruction are now treated as + constant "mov"). +20051102 Re-enabling instruction combinations (they were accidentally + disabled). + Dyntrans TLB entries are now overwritten using a round-robin + scheme instead of randomly. This increases performance. + Fixing a typo in file.c (thanks to Chuan-Hua Chang for + noticing it). + Experimenting with adding ATAPI support to dev_wdc (to make + emulated *BSD detect cdroms as cdroms, not harddisks). +20051104 Various minor updates. +20051105 Continuing on the ATAPI emulation. Seems to work well enough + for a NetBSD/cats installation, but not OpenBSD/cats. + Various other updates. +20051106 Modifying the -Y command line option to allow scaleup with + certain graphic controllers (only dev_vga so far), not just + scaledown. + Some minor dyntrans cleanups. +20051107 Beginning a cleanup up the PCI subsystem (removing the + read_register hack, etc). +20051108 Continuing the cleanup; splitting up some pci devices into a + normal autodev device and some separate pci glue code. +20051109 Continuing on the PCI bus stuff; all old pci_*.c have been + incorporated into normal devices and/or rewritten as glue code + only, adding a dummy Intel 82371AB PIIX4 for Malta (not really + tested yet). + Minor pckbc fix so that Linux doesn't complain. + Working on the DEC 21143 NIC (ethernet mac rom stuff mostly). + Various other minor fixes. +20051110 Some more ARM dyntrans fine-tuning (e.g. some instruction + combinations (cmps followed by conditional branch within the + same page) and special cases for DPIs with regform when the + shifter isn't used). +20051111 ARM dyntrans updates: O(n)->O(1) for just-mark-as-non- + writable in the generic pc_to_pointers function, and some other + minor hacks. + Merging Cobalt and evbmips (Malta) ISA interrupt handling, + and some minor fixes to allow Linux to accept harddisk irqs. +20051112 Minor device updates (pckbc, dec21143, lpt, ...), most + importantly fixing the ALI M1543/M5229 so that harddisk irqs + work with Linux/CATS. +20051113 Some more generalizations of the PCI subsystem. + Finally took the time to add a hack for SCSI CDROM TOCs; this + enables OpenBSD to use partition 'a' (as needed by the OpenBSD + installer), and Windows NT's installer to get a bit further. + Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs. + Continuing on the DEC 21143. +20051114 Minor ARM dyntrans tweaks; ARM cmps+branch optimization when + comparing with 0, and generalizing the xchg instr. comb. + Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}. +20051115 Continuing on various PPC things (BATs, other address trans- + lation things, various loads/stores, BeBox emulation, etc.). + Beginning to work on PPC interrupt/exception support. +20051116 Factoring out some code which initializes legacy ISA devices + from those machines that use them (bus_isa). + Continuing on PPC interrupt/exception support. +20051117 Minor Malta fixes: RTC year offset = 80, disabling a speed hack + which caused NetBSD to detect a too fast cpu, and adding a new + hack to make Linux detect a faster cpu. + Continuing on the Artesyn PM/PPC emulation mode. + Adding an Algor emulation skeleton (P4032 and P5064); + implementing some of the basics. + Continuing on PPC emulation in general; usage of unimplemented + SPRs is now easier to track, continuing on memory/exception + related issues, etc. +20051118 More work on PPC emulation (tgpr0..3, exception handling, + memory stuff, syscalls, etc.). +20051119 Changing the ARM dyntrans code to mostly use cpu->pc, and not + necessarily use arm reg 15. Seems to work. + Various PPC updates; continuing on the PReP emulation mode. +20051120 Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep + to detect the clock. +20051121 More cleanup of the PCI bus (memory and I/O bases, etc). + Continuing on various PPC things (decrementer and timebase, + WDCs on obio (on PReP) use irq 13, not 14/15). +20051122 Continuing on the CPC700 controller (interrupts etc) for PMPPC, + and on PPC stuff in general. + Finally! After some bug fixes to the virtual to physical addr + translation, NetBSD/{prep,pmppc} 2.1 reach userland and are + stable enough to be interacted with. + More PCI updates; reverse-endian device access for PowerPC etc. +20051123 Generalizing the IEEE floating point subsystem (moving it out + from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c). + Input via slave xterms was sometimes not really working; fixing + this for ns16550, and a warning message is now displayed if + multiple non-xterm consoles are active. + Adding some PPC floating point support, etc. + Various interrupt related updates (dev_wdc, _ns16550, _8259, + and the isa32 common code in machine.c). + NetBSD/prep can now be installed! :-) (Well, with some manual + commands necessary before running sysinst.) Updating the + documentation and various other things to reflect this. +20051124 Various minor documentation updates. + Continuing the work on the DEC 21143 NIC. +20051125 LOTS of work on the 21143. Both OpenBSD and NetBSD work fine + with it now, except that OpenBSD sometimes gives a time-out + warning. + Minor documentation updates. + +============== RELEASE 0.3.7 ============== + +20051126 Cobalt and PReP now work with the 21143 NIC. + Continuing on Alpha dyntrans things. + Fixing some more left-shift-by-24 to unsigned. +20051127 Working on OpenFirmware emulation; major cleanup/redesign. + Progress on MacPPC emulation: NetBSD detects two CPUs (when + running with -n 2), framebuffer output (for text) works. + Adding quick-hack Bandit PCI controller and "gc" interrupt + controller for MacPPC. +20051128 Changing from a Bandit to a Uni-North controller for macppc. + Continuing on OpenFirmware and MacPPC emulation in general + (obio controller, and wdc attached to the obio seems to work). +20051129 More work on MacPPC emulation (adding a dummy ADB controller). + Continuing the PCI bus cleanup (endianness and tag composition) + and rewriting all PCI controllers' access functions. +20051130 Various minor PPC dyntrans optimizations. + Manually inlining some parts of the framebuffer redraw routine. + Slowly beginning the conversion of the old MIPS emulation into + dyntrans (but this will take quite some time to get right). + Generalizing quick_pc_to_pointers. +20051201 Documentation update (David Muse has made available a kernel + which simplifies Debian/DECstation installation). + Continuing on the ADB bus controller. +20051202 Beginning a rewrite of the Zilog serial controller (dev_zs). +20051203 Continuing on the zs rewrite (now called dev_z8530); conversion + to devinit style. + Reworking some of the input-only vs output-only vs input-output + details of src/console.c, better warning messages, and adding + a debug dump. + Removing the concept of "device state"; it wasn't really used. + Changing some debug output (-vv should now be used to show all + details about devices and busses; not shown during normal + startup anymore). + Beginning on some SPARC instruction disassembly support. +20051204 Minor PPC updates (WALNUT skeleton stuff). + Continuing on the MIPS dyntrans rewrite. + More progress on the ADB controller (a keyboard is "detected" + by NetBSD and OpenBSD). + Downgrading OpenBSD/arc as a guest OS from "working" to + "almost working" in the documentation. + Progress on Algor emulation ("v3" PCI controller). +20051205 Minor updates. +20051207 Sorting devices according to address; this reduces complexity + of device lookups from O(n) to O(log n) in memory_rw (but no + real performance increase (yet) in experiments). +20051210 Beginning the work on native dyntrans backends (by making a + simple skeleton; so far only for Alpha hosts). +20051211 Some very minor SPARC updates. +20051215 Fixing a bug in the MIPS mul (note: not mult) instruction, + so it also works with non-64-bit emulation. (Thanks to Alec + Voropay for noticing the problem.) +20051216 More work on the fake/empty/simple/skeleton/whatever backend; + performance doesn't increase, so this isn't really worth it, + but it was probably worth it to prepare for a real backend + later. +20051219 More instr call statistics gathering and analysis stuff. +20051220 Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z} + to dyntrans. + memory_ppc.c syntax error fix (noticed by Peter Valchev). + Beginning to move out machines from src/machine.c into + individual files in src/machines (in a way similar to the + autodev system for devices). +20051222 Updating the documentation regarding NetBSD/pmax 3.0. +20051223 - " - NetBSD/cats 3.0. +20051225 - " - NetBSD/hpcmips 3.0. +20051226 Continuing on the machine registry redesign. + Adding support for ARM rrx (33-bit rotate). + Fixing some signed/unsigned issues (exposed by gcc -W). +20051227 Fixing the bug which prevented a NetBSD/prep 3.0 install kernel + from starting (triggered when an mtmsr was the last instruction + on a page). Unfortunately not enough to get the kernel to run + as well as the 2.1 kernels did. +20051230 Some dyntrans refactoring. +20051231 Continuing on the machine registry redesign. +20060101-10 Continuing... moving more machines. Moving MD interrupt stuff + from machine.c into a new src/machines/interrupts.c. +20060114 Adding various mvmeppc machine skeletons. +20060115 Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages + (for MVME1600) and reaches the root device prompt, but no + specific hardware devices are emulated yet. +20060116 Minor updates to the mvme1600 emulation mode; the Eagle PCI bus + seems to work without much modification, and a 21143 can be + detected, interrupts might work (but untested so far). + Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc. +20060121 Adding an aux control register for ARM. (A BIG thank you to + Olivier Houchard for tracking down this bug.) +20060122 Adding more ARM instructions (smulXY), and dev_iq80321_7seg. +20060124 Adding disassembly of more ARM instructions (mia*, mra/mar), + and some semi-bogus XScale and i80321 registers. +20060201-02 Various minor updates. Moving the last machines out of + machine.c. +20060204 Adding a -c command line option, for running debugger commands + before the simulation starts, but after all files have been + loaded. + Minor iq80321-related updates. +20060209 Minor hacks (DEVINIT macro, etc). + Preparing for the generalization of the 64-bit dyntrans address + translation subsystem. +20060216 Adding ARM ldrd (double-register load). +20060217 Continuing on various ARM-related stuff. +20060218 More progress on the ATA/wdc emulation for NetBSD/iq80321. + NetBSD/evbarm can now be installed :-) Updating the docs, etc. + Continuing on Algor emulation. + +============== RELEASE 0.3.8 ============== + +20060219 Various minor updates. Removing the old MIPS16 skeleton code, + because it will need to be rewritten for dyntrans anyway. +20060220-22 Removing the non-working dyntrans backend support. + Continuing on the 64-bit dyntrans virtual memory generalization. +20060223 More work on the 64-bit vm generalization. +20060225 Beginning on MIPS dyntrans load/store instructions. + Minor PPC updates (64-bit load/store, etc). + Fixes for the variable-instruction-length framework, some + minor AVR updates (a simple Hello World program works!). + Beginning on a skeleton for automatically generating documen- + tation (for devices etc.). +20060226 PPC updates (adding some more 64-bit instructions, etc). + AVR updates (more instructions). + FINALLY found and fixed the zs bug, making NetBSD/macppc + accept the serial console. +20060301 Adding more AVR instructions. +20060304 Continuing on AVR-related stuff. Beginning on a framework for + cycle-accurate device emulation. Adding an experimental "PAL + TV" device (just a dummy so far). +20060305 Adding more AVR instructions. + Adding a dummy epcom serial controller (for TS7200 emulation). +20060310 Removing the emul() command from configuration files, so only + net() and machine() are supported. + Minor progress on the MIPS dyntrans rewrite. +20060311 Continuing on the MIPS dyntrans rewrite (adding more + instructions, etc). +20060315 Adding more instructions (sllv, srav, srlv, bgtz[l], blez[l], + beql, bnel, slti[u], various loads and stores). +20060316 Removing the ALWAYS_SIGNEXTEND_32 option, since it was rarely + used. + Adding more MIPS dyntrans instructions, and fixing bugs. +20060318 Implementing fast loads/stores for MIPS dyntrans (big/little + endian, 32-bit and 64-bit modes). +20060320 Making MIPS dyntrans the default configure option; use + "--enable-oldmips" to use the old bintrans system. + Adding MIPS dyntrans dmult[u]; minor updates. +20060322 Continuing... adding some more instructions. + Adding a simple skeleton for demangling C++ "_ZN" symbols. +20060323 Moving src/debugger.c into a new directory (src/debugger/). +20060324 Fixing the hack used to load PPC ELFs (useful for relocated + Linux/ppc kernels), and adding a dummy G3 machine mode. +20060325-26 Beginning to experiment with GDB remote serial protocol + connections; adding a -G command line option for selecting + which TCP port to listen to. +20060330 Beginning a major cleanup to replace things like "0x%016llx" + with more correct "0x%016"PRIx64, etc. + Continuing on the GDB remote serial protocol support. +20060331 More cleanup, and some minor GDB remote progress. +20060402 Adding a hack to the configure script, to allow compilation + on systems that lack PRIx64 etc. +20060406 Removing the temporary FreeBSD/arm hack in dev_ns16550.c and + replacing it with a better fix from Olivier Houchard. +20060407 A remote debugger (gdb or ddd) can now start and stop the + emulator using the GDB remote serial protocol, and registers + and memory can be read. MIPS only for now. +20060408 More GDB progress: single-stepping also works, and also adding + support for ARM, PowerPC, and Alpha targets. + Continuing on the delay-slot-across-page-boundary issue. +20060412 Minor update: beginning to add support for the SPARC target + to the remote GDB functionality. +20060414 Various MIPS updates: adding more instructions for dyntrans + (eret, add), and making some exceptions work. Fixing a bug + in dmult[u]. + Implementing the first SPARC instructions (sethi, or). +20060415 Adding "magic trap" instructions so that PROM calls can be + software emulated in MIPS dyntrans. + Adding more MIPS dyntrans instructions (ddiv, dadd) and + fixing another bug in dmult. +20060416 More MIPS dyntrans progress: adding [d]addi, movn, movz, dsllv, + rfi, an ugly hack for supporting R2000/R3000 style faked caches, + preliminary interrupt support, and various other updates and + bugfixes. +20060417 Adding more SPARC instructions (add, sub, sll[x], sra[x], + srl[x]), and useful SPARC header definitions. + Adding the first (trivial) x86/AMD64 dyntrans instructions (nop, + cli/sti, stc/clc, std/cld, simple mov, inc ax). Various other + x86 updates related to variable instruction length stuff. + Adding unaligned loads/stores to the MIPS dyntrans mode (but + still using the pre-dyntrans (slow) imlementation). +20060419 Fixing a MIPS dyntrans exception-in-delay-slot bug. + Removing the old "show opcode statistics" functionality, since + it wasn't really useful and isn't implemented for dyntrans. + Single-stepping (or running with instruction trace) now looks + ok with dyntrans with delay-slot architectures. +20060420 Minor hacks (removing the -B command line option when compiled + for non-bintrans, and some other very minor updates). + Adding (slow) MIPS dyntrans load-linked/store-conditional. +20060422 Applying fixes for bugs discovered by Nils Weller's nwcc + (static DEC memmap => now per machine, and adding an extern + keyword in cpu_arm_instr.c). + Finally found one of the MIPS dyntrans bugs that I've been + looking for (copy/paste spelling error BIG vs LITTLE endian in + cpu_mips_instr_loadstore.c for 16-bit fast stores). + FINALLY found the major MIPS dyntrans bug: slti vs sltiu + signed/unsigned code in cpu_mips_instr.c. :-) + Adding more MIPS dyntrans instructions (lwc1, swc1, bgezal[l], + ctc1, tlt[u], tge[u], tne, beginning on rdhwr). + NetBSD/hpcmips can now reach userland when using dyntrans :-) + Adding some more x86 dyntrans instructions. + Finally removed the old Alpha-specific virtual memory code, + and replaced it with the generic 64-bit version. + Beginning to add disassembly support for SPECIAL3 MIPS opcodes. +20060423 Continuing on the delay-slot-across-page-boundary issue; + adding an end_of_page2 ic slot (like I had planned before, but + had removed for some reason). + Adding a quick-and-dirty fallback to legacy coprocessor 1 + code (i.e. skipping dyntrans implementation for now). + NetBSD/hpcmips and NetBSD/pmax (when running on an emulated + R4400) can now be installed and run. :-) (Many bugs left + to fix, though.) + Adding more MIPS dyntrans instructions: madd[u], msub[u]. + Cleaning up the SPECIAL2 vs R5900/TX79/C790 "MMI" opcode + maps somewhat (disassembly and dyntrans instruction decoding). +20060424 Adding an isa_revision field to mips_cpu_types.h, and making + sure that SPECIAL3 opcodes cause Reserved Instruction + exceptions on MIPS32/64 revisions lower than 2. + Adding the SPARC 'ba', 'call', 'jmpl/retl', 'and', and 'xor' + instructions. +20060425 Removing the -m command line option ("run at most x + instructions") and -T ("single_step_on_bad_addr"), because + they never worked correctly with dyntrans anyway. + Freshening up the man page. +20060428 Adding more MIPS dyntrans instructions: bltzal[l], idle. + Enabling MIPS dyntrans compare interrupts. +20060429 FINALLY found the weird dyntrans bug, causing NetBSD etc. to + behave strangely: some floating point code (conditional + coprocessor branches) could not be reused from the old + non-dyntrans code. The "quick-and-dirty fallback" only appeared + to work. Fixing by implementing bc1* for MIPS dyntrans. + More MIPS instructions: [d]sub, sdc1, ldc1, dmtc1, dmfc1, cfc0. + Freshening up MIPS floating point disassembly appearance. +20060430 Continuing on C790/R5900/TX79 disassembly; implementing 128-bit + "por" and "pextlw". +20060504 Disabling -u (userland emulation) unless compiled as unstable + development version. + Beginning on freshening up the testmachine include files, + to make it easier to reuse those files (placing them in + src/include/testmachine/), and beginning on a set of "demos" + or "tutorials" for the testmachine functionality. + Minor updates to the MIPS GDB remote protocol stub. + Refreshing doc/experiments.html and gdb_remote.html. + Enabling Alpha emulation in the stable release configuration, + even though no guest OSes for Alpha can run yet. +20060505 Adding a generic 'settings' object, which will contain + references to settable variables (which will later be possible + to access using the debugger). +20060506 Updating dev_disk and corresponding demo/documentation (and + switching from SCSI to IDE disk types, so it actually works + with current test machines :-). +20060510 Adding a -D_LARGEFILE_SOURCE hack for 64-bit Linux hosts, + so that fseeko() doesn't give a warning. + Updating the section about how dyntrans works (the "runnable + IR") in doc/intro.html. + Instruction updates (some x64=1 checks, some more R5900 + dyntrans stuff: better mul/mult separation from MIPS32/64, + adding ei and di). + Updating MIPS cpuregs.h to a newer one (from NetBSD). + Adding more MIPS dyntrans instructions: deret, ehb. +20060514 Adding disassembly and beginning implementation of SPARC wr + and wrpr instructions. +20060515 Adding a SUN SPARC machine mode, with dummy SS20 and Ultra1 + machines. Adding the 32-bit "rd psr" instruction. +20060517 Disassembly support for the general SPARC rd instruction. + Partial implementation of the cmp (subcc) instruction. + Some other minor updates (making sure that R5900 processors + start up with the EIE bit enabled, otherwise Linux/playstation2 + receives no interrupts). +20060519 Minor MIPS updates/cleanups. +20060521 Moving the MeshCube machine into evbmips; this seems to work + reasonably well with a snapshot of a NetBSD MeshCube kernel. + Cleanup/fix of MIPS config0 register initialization. +20060529 Minor MIPS fixes, including a sign-extension fix to the + unaligned load/store code, which makes NetBSD/pmax on R3000 + work better with dyntrans. (Ultrix and Linux/DECstation still + don't work, though.) +20060530 Minor updates to the Alpha machine mode: adding an AlphaBook + mode, an LCA bus (forwarding accesses to an ISA bus), etc. +20060531 Applying a bugfix for the MIPS dyntrans sc[d] instruction from + Ondrej Palkovsky. (Many thanks.) +20060601 Minifix to allow ARM immediate msr instruction to not give + an error for some valid values. + More Alpha updates. +20060602 Some minor Alpha updates. +20060603 Adding the Alpha cmpbge instruction. NetBSD/alpha prints its + first boot messages :-) on an emulated Alphabook 1. +20060612 Minor updates; adding a dev_ether.h include file for the + testmachine ether device. Continuing the hunt for the dyntrans + bug which makes Linux and Ultrix on DECstation behave + strangely... FINALLY found it! It seems to be related to + invalidation of the translation cache, on tlbw{r,i}. There + also seems to be some remaining interrupt-related problems. +20060614 Correcting the implementation of ldc1/sdc1 for MIPS dyntrans + (so that it uses 16 32-bit registers if the FR bit in the + status register is not set). +20060616 REMOVING BINTRANS COMPLETELY! + Removing the old MIPS interpretation mode. + Removing the MFHILO_DELAY and instruction delay stuff, because + they wouldn't work with dyntrans anyway. +20060617 Some documentation updates (adding "NetBSD-archive" to some + URLs, and new Debian/DECstation installation screenshots). + Removing the "tracenull" and "enable-caches" configure options. + Improving MIPS dyntrans performance somewhat (only invalidate + translations if necessary, on writes to the entryhi register, + instead of doing it for all cop0 writes). +20060618 More cleanup after the removal of the old MIPS emulation. + Trying to fix the MIPS dyntrans performance bugs/bottlenecks; + only semi-successful so far (for R3000). +20060620 Minor update to allow clean compilation again on Tru64/Alpha. +20060622 MIPS cleanup and fixes (removing the pc_last stuff, which + doesn't make sense with dyntrans anyway, and fixing a cross- + page-delay-slot-with-exception case in end_of_page). + Removing the old max_random_cycles_per_chunk stuff, and the + concept of cycles vs instructions for MIPS emulation. + FINALLY found and fixed the bug which caused NetBSD/pmax + clocks to behave strangely (it was a load to the zero register, + which was treated as a NOP; now it is treated as a load to a + dummy scratch register). +20060623 Increasing the dyntrans chunk size back to + N_SAFE_DYNTRANS_LIMIT, instead of N_SAFE_DYNTRANS_LIMIT/2. + Preparing for a quick release, even though there are known + bugs, and performance for non-R3000 MIPS emulation is very + poor. :-/ + Reverting to half the dyntrans chunk size again, because + NetBSD/cats seemed less stable with full size chunks. :( + NetBSD/sgimips 3.0 can now run :-) (With release 0.3.8, only + NetBSD/sgimips 2.1 worked, not 3.0.) + +============== RELEASE 0.4.0 ============== + +20060624 Replacing the error-prone machine type initialization stuff + with something more reasonable. + Finally removing the old "cpu_run" kludge; moving around stuff + in machine.c and emul.c to better suit the dyntrans system. + Various minor dyntrans cleanups (renaming translate_address to + translate_v2p, and experimenting with template physpages). +20060625 Removing the speed hack which separated the vph entries into + two halves (code vs data); things seem a lot more stable now. + Minor performance hack: R2000/R3000 cache isolation now only + clears address translations when going into isolation, not + when going out of it. + Fixing the MIPS interrupt problems by letting mtc0 immediately + cause interrupts. + +============== RELEASE 0.4.0.1 ============== + +20060626 Continuing on SPARC emulation (beginning on the 'save' + instruction, register windows, etc). +20060629 Planning statistics gathering (new -s command line option), + and renaming speed_tricks to allow_instruction_combinations. +20060630 Some minor manual page updates. + Various cleanups. + Implementing the -s command line option. +20060701 FINALLY found the bug which prevented Linux and Ultrix from + running without the ugly hack in the R2000/R3000 cache isol + code; it was the phystranslation hint array which was buggy. + Removing the phystranslation hint code completely, for now. +20060702 Minor dyntrans cleanups; invalidation of physpages now only + invalidate those parts of a page that have actually been + translated. (32 parts per page.) + Some MIPS non-R3000 speed fixes. + Experimenting with MIPS instruction combination for some + addiu+bne+sw loops, and sw+sw+sw. + Adding support (again) for larger-than-4KB pages in MIPS tlbw*. + Continuing on SPARC emulation: adding load/store instructions. +20060704 Fixing a virtual vs physical page shift bug in the new tlbw* + implementation. Problem noticed by Jakub Jermar. (Many thanks.) + Moving rfe and eret to cpu_mips_instr.c, since that is the + only place that uses them nowadays. +20060705 Removing the BSD license from the "testmachine" include files, + placing them in the public domain instead; this enables the + testmachine stuff to be used from projects which are + incompatible with the BSD license for some reason. +20060707 Adding instruction combinations for the R2000/R3000 L1 + I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu, + various branches followed by addiu or nop, and jr ra followed + by addiu. The time it takes to perform a full NetBSD/pmax R3000 + install on the laptop has dropped from 573 seconds to 539. :-) +20060708 Adding a framebuffer controller device (dev_fbctrl), which so + far can be used to change the fb resolution during runtime, but + in the future will also be useful for accelerated block fill/ + copy, and possibly also simplified character output. + Adding an instruction combination for NetBSD/pmax' strlen. +20060709 Minor fixes: reading raw files in src/file.c wasn't memblock + aligned, removing buggy multi_sw MIPS instruction combination, + etc. +20060711 Adding a machine_qemu.c, which contains a "qemu_mips" machine. + (It mimics QEMU's MIPS machine mode, so that a test kernel + made for QEMU_MIPS also can run in GXemul... at least to some + extent.) Adding a short section about how to run this mode to + doc/guestoses.html. +20060714 Misc. minor code cleanups. +20060715 Applying a patch which adds getchar() to promemul/yamon.c + (from Oleksandr Tymoshenko). + Adding yamon.h from NetBSD, and rewriting yamon.c to use it + (instead of ugly hardcoded numbers) + some cleanup. +20060716 Found and fixed the bug which broke single-stepping of 64-bit + programs between 0.4.0 and 0.4.0.1 (caused by too quick + refactoring and no testing). Hopefully this fix will not + break too many other things. +20060718 Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS. + Re-adding the sw+sw+sw instr comb (the problem was that I had + ignored endian issues); however, it doesn't seem to give any + big performance gain. +20060720 Adding a dummy Transputer mode (T414, T800 etc) skeleton (only + the 'j' and 'ldc' instructions are implemented so far). :-} +20060721 Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus + misc. other updates to get Linux 2.6 for evbmips/malta working + (thanks to Alec Voropay for the details). + FINALLY found and fixed the bug which made tlbw* for non-R3000 + buggy; it was a reference count problem in the dyntrans core. +20060722 Testing stuff; things seem stable enough for a new release. + +============== RELEASE 0.4.1 ============== + +20060723 More Transputer instructions (pfix, nfix, opr, mint, ldl, ldlp, + eqc, rev, ajw, stl, stlf, sthf, sub, ldnl, ldnlp, ldpi, move, + wcnt, add, bcnt). + Adding more SPARC instructions (andcc, addcc, bl, rdpr). + Progress on the igsfb framebuffer used by NetBSD/netwinder. + Enabling 8-bit fills in dev_fb. + NetBSD/netwinder 3.0.1 can now run from a disk image :-) +20060724 Cleanup/performance fix for 64-bit virtual translation table + updates (by removing the "timestamp" stuff). A full NetBSD/pmax + 3.0.1 install for R4400 has dropped from 667 seconds to 584 :) + Fixing the igsfb "almost vga" color (it is 24-bit, not 18-bit). + Adding some MIPS instruction combinations (3*lw, and 3*addu). + The 8048 keyboard now turns off interrupt enable between the + KBR_ACK and the KBR_RSTDONE, to work better with Linux 2.6. + Not causing PPC DEC interrupts if PPC_NO_DEC is set for a + specific CPU; NetBSD/bebox gets slightly further than before. + Adding some more SPARC instructions: branches, udiv. +20060725 Refreshing dev_pckbc.c a little. + Cleanups for the SH emulation mode, and adding the first + "compact" (16-bit) instructions: various simple movs, nop, + shll, stc, or, ldc. +20060726 Adding dummy "pcn" (AMD PCnet NIC) PCI glue. +20060727 Various cleanups; removing stuff from cpu.h, such as + running_translated (not really meaningful anymore), and + page flags (breaking into the debugger clears all translations + anyway). + Minor MIPS instruction combination updates. +20060807 Expanding the 3*sw and 3*lw MIPS instruction combinations to + work with 2* and 4* too, resulting in a minor performance gain. + Implementing a usleep hack for the RM52xx/MIPS32/MIPS64 "wait" + instruction (when emulating 1 cpu). +20060808 Experimenting with some more MIPS instruction combinations. + Implementing support for showing a (hardcoded 12x22) text + cursor in igsfb. +20060809 Simplifying the NetBSD/evbmips (Malta) install instructions + somewhat (by using a NetBSD/pmax ramdisk install kernel). +20060812 Experimenting more with the MIPS 'wait' instruction. + PCI configuration register writes can now be handled, which + allow PCI IDE controllers to work with NetBSD/Malta 3.0.1 and + NetBSD/cobalt 3.0.1. (Previously only NetBSD 2.1 worked.) +20060813 Updating dev_gt.c based on numbers from Alec Voropay, to enable + Linux 2.6 to use PCI on Malta. + Continuing on Algor interrupt stuff. +20060814 Adding support for routing ISA interrupts to two different + interrupts, making it possible to run NetBSD/algor :-) +20060814-15 Testing for the release. + +============== RELEASE 0.4.2 ============== + +20060816 Adding a framework for emulated/virtual timers (src/timer.c), + using only setitimer(). + Rewriting the mc146818 to use the new timer framework. +20060817 Adding a call to gettimeofday() every now and then (once every + second, at the moment) to resynch the timer if it drifts. + Beginning to convert the ISA timer interrupt mechanism (8253 + and 8259) to use the new timer framework. + Removing the -I command line option. +20060819 Adding the -I command line option again, with new semantics. + Working on Footbridge timer interrupts; NetBSD/NetWinder and + NetBSD/CATS now run at correct speed, but unfortunately with + HUGE delays during bootup. +20060821 Some minor m68k updates. Adding the first instruction: nop. :) + Minor Alpha emulation updates. +20060822 Adding a FreeBSD development specific YAMON environment + variable ("khz") (as suggested by Bruce M. Simpson). + Moving YAMON environment variable initialization from + machine_evbmips.c into promemul/yamon.c, and adding some more + variables. + Continuing on the LCA PCI bus controller (for Alpha machines). +20060823 Continuing on the timer stuff: experimenting with MIPS count/ + compare interrupts connected to the timer framework. +20060825 Adding bogus SCSI commands 0x51 (SCSICDROM_READ_DISCINFO) and + 0x52 (SCSICDROM_READ_TRACKINFO) to the SCSI emulation layer, + to allow NetBSD/pmax 4.0_BETA to be installed from CDROM. + Minor updates to the LCA PCI controller. +20060827 Implementing a CHIP8 cpu mode, and a corresponding CHIP8 + machine, for fun. Disassembly support for all instructions, + and most of the common instructions have been implemented: mvi, + mov_imm, add_imm, jmp, rand, cls, sprite, skeq_imm, jsr, + skne_imm, bcd, rts, ldr, str, mov, or, and, xor, add, sub, + font, ssound, sdelay, gdelay, bogus skup/skpr, skeq, skne. +20060828 Beginning to convert the CHIP8 cpu in the CHIP8 machine to a + (more correct) RCA 180x cpu. (Disassembly for all 1802 + instructions has been implemented, but no execution yet, and + no 1805 extended instructions.) +20060829 Minor Alpha emulation updates. +20060830 Beginning to experiment a little with PCI IDE for SGI O2. + Fixing the cursor key mappings for MobilePro 770 emulation. + Fixing the LK201 warning caused by recent NetBSD/pmax. + The MIPS R41xx standby, suspend, and hibernate instructions now + behave like the RM52xx/MIPS32/MIPS64 wait instruction. + Fixing dev_wdc so it calculates correct (64-bit) offsets before + giving them to diskimage_access(). +20060831 Continuing on Alpha emulation (OSF1 PALcode). +20060901 Minor Alpha updates; beginning on virtual memory pagetables. + Removed the limit for max nr of devices (in preparation for + allowing devices' base addresses to be changed during runtime). + Adding a hack for MIPS [d]mfc0 select 0 (except the count + register), so that the coproc register is simply copied. + The MIPS suspend instruction now exits the emulator, instead + of being treated as a wait instruction (this causes NetBSD/ + hpcmips to get correct 'halt' behavior). + The VR41xx RTC now returns correct time. + Connecting the VR41xx timer to the timer framework (fixed at + 128 Hz, for now). + Continuing on SPARC emulation, adding more instructions: + restore, ba_xcc, ble. The rectangle drawing demo works :) + Removing the last traces of the old ENABLE_CACHE_EMULATION + MIPS stuff (not usable with dyntrans anyway). +20060902 Splitting up src/net.c into several smaller files in its own + subdirectory (src/net/). +20060903 Cleanup of the files in src/net/, to make them less ugly. +20060904 Continuing on the 'settings' subsystem. + Minor progress on the SPARC emulation mode. +20060905 Cleanup of various things, and connecting the settings + infrastructure to various subsystems (emul, machine, cpu, etc). + Changing the lk201 mouse update routine to not rely on any + emulated hardware framebuffer cursor coordinates, but instead + always do (semi-usable) relative movements. +20060906 Continuing on the lk201 mouse stuff. Mouse behaviour with + multiple framebuffers (which was working in Ultrix) is now + semi-broken (but it still works, in a way). + Moving the documentation about networking into its own file + (networking.html), and refreshing it a bit. Adding an example + of how to use ethernet frame direct-access (udp_snoop). +20060907 Continuing on the settings infrastructure. +20060908 Minor updates to SH emulation: for 32-bit emulation: delay + slots and the 'jsr @Rn' instruction. I'm putting 64-bit SH5 on + ice, for now. +20060909-10 Implementing some more 32-bit SH instructions. Removing the + 64-bit mode completely. Enough has now been implemented to run + the rectangle drawing demo. :-) +20060912 Adding more SH instructions. +20060916 Continuing on SH emulation (some more instructions: div0u, + div1, rotcl/rotcr, more mov instructions, dt, braf, sets, sett, + tst_imm, dmuls.l, subc, ldc_rm_vbr, movt, clrt, clrs, clrmac). + Continuing on the settings subsystem (beginning on reading/ + writing settings, removing bugs, and connecting more cpus to + the framework). +20060919 More work on SH emulation; adding an ldc banked instruction, + and attaching a 640x480 framebuffer to the Dreamcast machine + mode (NetBSD/dreamcast prints the NetBSD copyright banner :-), + and then panics). +20060920 Continuing on the settings subsystem. +20060921 Fixing the Footbridge timer stuff so that NetBSD/cats and + NetBSD/netwinder boot up without the delays. +20060922 Temporarily hardcoding MIPS timer interrupt to 100 Hz. With + 'wait' support disabled, NetBSD/malta and Linux/malta run at + correct speed. +20060923 Connecting dev_gt to the timer framework, so that NetBSD/cobalt + runs at correct speed. + Moving SH4-specific memory mapped registers into its own + device (dev_sh4.c). + Running with -N now prints "idling" instead of bogus nr of + instrs/second (which isn't valid anyway) while idling. +20060924 Algor emulation should now run at correct speed. + Adding disassembly support for some MIPS64 revision 2 + instructions: ext, dext, dextm, dextu. +20060926 The timer framework now works also when the MIPS wait + instruction is used. +20060928 Re-implementing checks for coprocessor availability for MIPS + cop0 instructions. (Thanks to Carl van Schaik for noticing the + lack of cop0 availability checks.) +20060929 Implementing an instruction combination hack which treats + NetBSD/pmax' idle loop as a wait-like instruction. +20060930 The ENTRYHI_R_MASK was missing in (at least) memory_mips_v2p.c, + causing TLB lookups to sometimes succeed when they should have + failed. (A big thank you to Juli Mallett for noticing the + problem.) + Adding disassembly support for more MIPS64 revision 2 opcodes + (seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu, + dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also + implementing seb, seh, dsbh, dshd, and wsbh. + Implementing an instruction combination hack for Linux/pmax' + idle loop, similar to the NetBSD/pmax case. +20061001 Changing the NetBSD/sgimips install instructions to extract + files from an iso image, instead of downloading them via ftp. +20061002 More-than-31-bit userland addresses in memory_mips_v2p.c were + not actually working; applying a fix from Carl van Schaik to + enable them to work + making some other updates (adding kuseg + support). + Fixing hpcmips (vr41xx) timer initialization. + Experimenting with O(n)->O(1) reduction in the MIPS TLB lookup + loop. Seems to work both for R3000 and non-R3000. +20061003 Continuing a little on SH emulation (adding more control + registers; mini-cleanup of memory_sh.c). +20061004 Beginning on a dev_rtc, a clock/timer device for the test + machines; also adding a demo, and some documentation. + Fixing a bug in SH "mov.w @(disp,pc),Rn" (the result wasn't + sign-extended), and adding the addc and ldtlb instructions. +20061005 Contining on SH emulation: virtual to physical address + translation, and a skeleton exception mechanism. +20061006 Adding more SH instructions (various loads and stores, rte, + negc, muls.w, various privileged register-move instructions). +20061007 More SH instructions: various move instructions, trapa, div0s, + float, fdiv, ftrc. + Continuing on dev_rtc; removing the rtc demo. +20061008 Adding a dummy Dreamcast PROM module. (Homebrew Dreamcast + programs using KOS libs need this.) + Adding more SH instructions: "stc vbr,rn", rotl, rotr, fsca, + fmul, fadd, various floating-point moves, etc. A 256-byte + demo for Dreamcast runs :-) +20061012 Adding the SH "lds Rm,pr" and bsr instructions. +20061013 More SH instructions: "sts fpscr,rn", tas.b, and some more + floating point instructions, cmp/str, and more moves. + Adding a dummy dev_pvr (Dreamcast graphics controller). +20061014 Generalizing the expression evaluator (used in the built-in + debugger) to support parentheses and +-*/%^&|. +20061015 Removing the experimental tlb index hint code in + mips_memory_v2p.c, since it didn't really have any effect. +20061017 Minor SH updates; adding the "sts pr,Rn", fcmp/gt, fneg, + frchg, and some other instructions. Fixing missing sign- + extension in an 8-bit load instruction. +20061019 Adding a simple dev_dreamcast_rtc. + Implementing memory-mapped access to the SH ITLB/UTLB arrays. +20061021 Continuing on various SH and Dreamcast things: sh4 timers, + debug messages for dev_pvr, fixing some virtual address + translation bugs, adding the bsrf instruction. + The NetBSD/dreamcast GENERIC_MD kernel now reaches userland :) + Adding a dummy dev_dreamcast_asic.c (not really useful yet). + Implementing simple support for Store Queues. + Beginning on the PVR Tile Accelerator. +20061022 Generalizing the PVR framebuffer to support off-screen drawing, + multiple bit-depths, etc. (A small speed penalty, but most + likely worth it.) + Adding more SH instructions (mulu.w, fcmp/eq, fsub, fmac, + fschg, and some more); correcting bugs in "fsca" and "float". +20061024 Adding the SH ftrv (matrix * vector) instruction. Marcus + Comstedt's "tatest" example runs :) (wireframe only). + Correcting disassembly for SH floating point instructions that + use the xd* registers. + Adding the SH fsts instruction. + In memory_device_dyntrans_access(), only the currently used + range is now invalidated, and not the entire device range. +20061025 Adding a dummy AVR32 cpu mode skeleton. +20061026 Various Dreamcast updates; beginning on a Maple bus controller. +20061027 Continuing on the Maple bus. A bogus Controller, Keyboard, and + Mouse can now be detected by NetBSD and KOS homebrew programs. + Cleaning up the SH4 Timer Management Unit, and beginning on + SH4 interrupts. + Implementing the Dreamcast SYSASIC. +20061028 Continuing on the SYSASIC. + Adding the SH fsqrt instruction. + memory_sh.c now actually scans the ITLB. + Fixing a bug in dev_sh4.c, related to associative writes into + the memory-mapped UTLB array. NetBSD/dreamcast now reaches + userland stably, and prints the "Terminal type?" message :-] + Implementing enough of the Dreamcast keyboard to make NetBSD + accept it for input. + Enabling SuperH for stable (non-development) builds. + Adding NetBSD/dreamcast to the documentation, although it + doesn't support root-on-nfs yet. +20061029 Changing usleep(1) calls in the debugger to usleep(10000) + (according to Brian Foley, this makes GXemul run better on + MacOS X). + Making the Maple "Controller" do something (enough to barely + interact with dcircus.elf). +20061030-31 Some progress on the PVR. More test programs start running (but + with strange output). + Various other SH4-related updates. +20061102 Various Dreamcast and SH4 updates; more KOS demos run now. +20061104 Adding a skeleton dev_mb8696x.c (the Dreamcast's LAN adapter). +20061105 Continuing on the MB8696x; NetBSD/dreamcast detects it as mbe0. + Testing for the release. + +============== RELEASE 0.4.3 ============== + +20061107 Adding a new disk image option (-d o...) which sets the ISO9660 + filesystem base offset; also making some other hacks to allow + NetBSD/dreamcast and homebrew demos/games to boot directly + from a filesystem image. + Moving Dreamcast-specific stuff in the documentation to its + own page (dreamcast.html). + Adding a border to the Dreamcast PVR framebuffer. +20061108 Adding a -T command line option (again?), for halting the + emulator on unimplemented memory accesses. +20061109 Continuing on various SH4 and Dreamcast related things. + The emulator should now halt on more unimplemented device + accesses, instead of just printing a warning, forcing me to + actually implement missing stuff :) +20061111 Continuing on SH4 and Dreamcast stuff. + Adding a bogus Landisk (SH4) machine mode. +20061112 Implementing some parts of the Dreamcast GDROM device. With + some ugly hacks, NetBSD can (barely) mount an ISO image. +20061113 NetBSD/dreamcast now starts booting from the Live CD image, + but crashes randomly quite early on in the boot process. +20061122 Beginning on a skeleton interrupt.h and interrupt.c for the + new interrupt subsystem. +20061124 Continuing on the new interrupt system; taking the first steps + to attempt to connect CPUs (SuperH and MIPS) and devices + (dev_cons and SH4 timer interrupts) to it. Many things will + probably break from now on. +20061125 Converting dev_ns16550, dev_8253 to the new interrupt system. + Attempting to begin to convert the ISA bus. +20061130 Incorporating a patch from Brian Foley for the configure + script, which checks for X11 libs in /usr/X11R6/lib64 (which + is used on some Linux systems). +20061227 Adding a note in the man page about booting from Dreamcast + CDROM images (i.e. that no external kernel is needed). +20061229 Continuing on the interrupt system rewrite: beginning to + convert more devices, adding abort() calls for legacy interrupt + system calls so that everything now _has_ to be rewritten! + Almost all machine modes are now completely broken. +20061230 More progress on removing old interrupt code, mostly related + to the ISA bus + devices, the LCA bus (on AlphaBook1), and + the Footbridge bus (for CATS). And some minor PCI stuff. + Connecting the ARM cpu to the new interrupt system. + The CATS, NetWinder, and QEMU_MIPS machine modes now work with + the new interrupt system :) +20061231 Connecting PowerPC CPUs to the new interrupt system. + Making PReP machines (IBM 6050) work again. + Beginning to convert the GT PCI controller (for e.g. Malta + and Cobalt emulation). Some things work, but not everything. + Updating Copyright notices for 2007. +20070101 Converting dev_kn02 from legacy style to devinit; the 3max + machine mode now works with the new interrupt system :-] +20070105 Beginning to convert the SGI O2 machine to the new interrupt + system; finally converting O2 (IP32) devices to devinit, etc. +20070106 Continuing on the interrupt system redesign/rewrite; KN01 + (PMAX), KN230, and Dreamcast ASIC interrupts should work again, + moving out stuff from machine.h and devices.h into the + corresponding devices, beginning the rewrite of i80321 + interrupts, etc. +20070107 Beginning on the rewrite of Eagle interrupt stuff (PReP, etc). +20070117 Beginning the rewrite of Algor (V3) interrupts (finally + changing dev_v3 into devinit style). +20070118 Removing the "bus" registry concept from machine.h, because + it was practically meaningless. + Continuing on the rewrite of Algor V3 ISA interrupts. +20070121 More work on Algor interrupts; they are now working again, + well enough to run NetBSD/algor. :-) +20070122 Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips + can be installed using the new interrupt system :-) +20070123 Making the testmips mode work with the new interrupt system. +20070127 Beginning to convert DEC5800 devices to devinit, and to the + new interrupt system. + Converting Playstation 2 devices to devinit, and converting + the interrupt system. Also fixing a severe bug: the interrupt + mask register on Playstation 2 is bitwise _toggled_ on writes. +20070128 Removing the dummy NetGear machine mode and the 8250 device + (which was only used by the NetGear machine). + Beginning to convert the MacPPC GC (Grand Central) interrupt + controller to the new interrupt system. + Converting Jazz interrupts (PICA61 etc.) to the new interrupt + system. NetBSD/arc can be installed again :-) + Fixing the JAZZ timer (hardcoding it at 100 Hz, works with + NetBSD and it is better than a completely dummy timer as it + was before). + Converting dev_mp to the new interrupt system, although I + haven't had time to actually test it yet. + Completely removing src/machines/interrupts.c, cpu_interrupt + and cpu_interrupt_ack in src/cpu.c, and + src/include/machine_interrupts.h! Adding fatal error messages + + abort() in the few places that are left to fix. + Converting dev_z8530 to the new interrupt system. + FINALLY removing the md_int struct completely from the + machine struct. + SH4 fixes (adding a PADDR invalidation in the ITLB replacement + code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs + all the way to the login prompt, and can be interacted with :-) + Converting the CPC700 controller (PCI and interrupt controller + for PM/PPC) to the new interrupt system. +20070129 Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/ + sgimips' and OpenBSD/sgi's ramdisk kernels can now be + interacted with again. +20070130 Moving out the MIPS multi_lw and _sw instruction combinations + so that they are auto-generated at compile time instead. +20070131 Adding detection of amd64/x86_64 hosts in the configure script, + for doing initial experiments (again :-) with native code + generation. + Adding a -k command line option to set the size of the dyntrans + cache, and a -B command line option to disable native code + generation, even if GXemul was compiled with support for + native code generation for the specific host CPU architecture. +20070201 Experimenting with a skeleton for native code generation. + Changing the default behaviour, so that native code generation + is now disabled by default, and has to be enabled by using + -b on the command line. +20070202 Continuing the native code generation experiments. + Making PCI interrupts work for Footbridge again. +20070203 More native code generation experiments. + Removing most of the native code generation experimental code, + it does not make sense to include any quick hacks like this. + Minor cleanup/removal of some more legacy MIPS interrupt code. +20070204 Making i80321 interrupts work again (for NetBSD/evbarm etc.), + and fixing the timer at 100 Hz. +20070206 Experimenting with removing the wdc interrupt slowness hack. +20070207 Lowering the number of dyntrans TLB entries for MIPS from + 192 to 128, resulting in a minor speed improvement. + Minor optimization to the code invalidation routine in + cpu_dyntrans.c. +20070208 Increasing (experimentally) the nr of dyntrans instructions per + loop from 60 to 120. +20070210 Commenting out (experimentally) the dyntrans_device_danger + detection in memory_rw.c. + Changing the testmips and baremips machines to use a revision 2 + MIPS64 CPU by default, instead of revision 1. + Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC + files, the PC bios emulation, and the Olivetti M700 (ARC) and + db64360 emulation modes. +20070211 Adding an "mp" demo to the demos directory, which tests the + SMP functionality of the testmips machine. + Fixing PReP interrupts some more. NetBSD/prep now boots again. +20070216 Adding a "nop workaround" for booting Mach/PMAX to the + documentation; thanks to Artur Bujdoso for the values. + Converting more of the MacPPC interrupt stuff to the new + system. + Beginning to convert BeBox interrupts to the new system. + PPC603e should NOT have the PPC_NO_DEC flag! Removing it. + Correcting BeBox clock speed (it was set to 100 in the NetBSD + bootinfo block, but should be 33000000/4), allowing NetBSD + to start without using the (incorrect) PPC_NO_DEC hack. +20070217 Implementing (slow) AltiVec vector loads and stores, allowing + NetBSD/macppc to finally boot using the GENERIC kernel :-) + Updating the documentation with install instructions for + NetBSD/macppc. +20070218-19 Regression testing for the release. + +============== RELEASE 0.4.4 ============== + +20070224 Minor update to the initialization of the ns16550 in + machine_walnut.c, to allow that machine type to boot with the + new interrupt system (although it is still a dummy machine). + Adding a wdc at 0x14000000 to machine_landisk.c, and fixing + the SCIF serial interrupts of the SH4 cpu enough to get + NetBSD/landisk booting from a disk image :-) Adding a + preliminary install instruction skeleton to guestoses.html. +20070306 Adding SH-IPL+G PROM emulation, and also passing the "end" + symbol in r5 on bootup, for Landisk emulation. This is enough + to get OpenBSD/landisk to install :) Adding a preliminary + install instruction skeleton to the documentation. SuperH + emulation is still shaky, though :-/ +20070307 Fixed a strangeness in memory_sh.c (read/write was never + returned for any page). (Unknown whether this fixes any actual + problems, though.) +20070308 dev_ram.c fix: invalidate code translations on writes to + RAM, emulated as separate devices. Linux/dreamcast gets + further in the boot process than before, but still bugs out + in userland. + Fixing bugs in the "stc.l gbr,@-rN" and "ldc.l @rN+,gbr" SuperH + instructions (they should NOT check the MD bit), allowing the + Linux/dreamcast Live CD to reach userland correctly :-) +20070310 Changing the cpu name "Alpha" in src/useremul.c to "21364" to + unbreak userland syscall emulation of FreeBSD/Alpha binaries. +20070314 Applying a patch from Michael Yaroslavtsev which fixes the + previous Linux lib64 patch to the configure script. +20070315 Adding a (dummy) sun4v machine type, and SPARC T1 cpu type. +20070316 Creating a new directory, src/disk, and moving diskimage.c + to it. Separating out bootblock loading stuff from emul.c into + new files in src/disk. + Adding some more SPARC registers. +20070318 Preparing/testing for a minirelease, 0.4.4.1. + +============== RELEASE 0.4.4.1 ============== + +20070324 Adding a "--debug" option to the configure script, to disable + optimizations in unstable development builds. + Moving out SCSI-specific stuff from diskimage.c into a new + diskimage_scsicmd.c. + Applying Håvard Eidnes' patch for SCSICDROM_READ_DISKINFO and + SCSICDROM_READ_TRACKINFO. (Not really tested yet.) + Implementing disk image "overlays" (to allow simple roll-back + to previous disk state). Adding a 'V' disk flag for this, and + updating the man page and misc.html. +20070325 Stability fix to cpu_dyntrans.c, when multiple physical pages + share the same initial table entry. (The ppp == NULL check + should be physpage_ofs == 0.) Bug found by analysing GXemul + against a version patched for Godson. + Fixing a second occurance of the same problem (also in + cpu_dyntrans.c). + Fixing a MAJOR physical page leak in cpu_dyntrans.c; pages + weren't _added_ to the set of translated pages, they _replaced_ + all previous pages. It's amazing that this bug has been able + to live for this long. (Triggered when emulating >128MB RAM.) +20070326 Removing the GDB debugging stub support; it was too hackish + and ugly. +20070328 Moving around some native code generation skeleton code. +20070329 The -lm check in the configure script now also checks for sin() + in addition to sqrt(). (Thanks to Nigel Horne for noticing that + sqrt was not enough on Fedora Core 6.) (Not verified yet.) +20070330 Fixing an indexing bug in dev_sh4.c, found by using gcc version + 4.3.0 20070323. +20070331 Some more experimentation with native code generation. +20070404 Attempting to fix some more SH4 SCIF interrupt bugs; rewriting + the SH interrupt assertion/deassertion code somewhat. +20070410 Splitting src/file.c into separate files in src/file/. + Cleanup: Removing the dummy TS7200, Walnut, PB1000, and + Meshcube emulation modes, and dev_epcom and dev_au1x00. + Removing the experimental CHIP8/RCA180x code; it wasn't really + working much lately, anyway. It was fun while it lasted. + Also removing the experimental Transputer CPU support. +20070412 Moving the section about how the dynamic translation system + works from intro.html to a separate translation.html file. + Minor SH fixes; attempting to get OpenBSD/landisk to run + without randomly bugging out, but no success yet. +20070413 SH SCI (serial bit interface) should now work together with a + (new) RS5C313 clock device (for Landisk emulation). +20070414 Moving Redhat/MIPS down from supported to experimental, in + guestoses.html. + Preparing for a new release; doing some regression testing etc. + +============== RELEASE 0.4.5 ============== +