/[gxemul]/trunk/HISTORY
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 10 by dpavlin, Mon Oct 8 16:18:27 2007 UTC revision 14 by dpavlin, Mon Oct 8 16:18:51 2007 UTC
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1  $Id: HISTORY,v 1.815 2005/06/27 23:04:35 debug Exp $  $Id: HISTORY,v 1.982 2005/10/07 22:45:32 debug Exp $
2    
3  Changelog for GXemul:  Changelog for GXemul:
4  ---------------------  ---------------------
# Line 2035  Changelog for GXemul: Line 2035  Changelog for GXemul:
2035    
2036  ==============  RELEASE 0.3.4  ==============  ==============  RELEASE 0.3.4  ==============
2037    
2038    20050628        Continuing the work on the ARM translation engine. end_of_page
2039                    works. Experimenting with load/store translation caches
2040                    (virtual -> physical -> host).
2041    20050629        More ARM stuff (memory access translation cache, mostly). This
2042                    might break a lot of stuff elsewhere, probably some MIPS-
2043                    related translation things.
2044    20050630        Many load/stores are now automatically generated and included
2045                    into cpu_arm_instr.c; 1024 functions in total (!).
2046                    Fixes based on feedback from Alec Voropay: only print 8 hex
2047                    digits instead of 16 in some cases when emulating 32-bit
2048                    machines; similar 8 vs 16 digit fix for breakpoint addresses;
2049                    4Kc has 16 TLB entries, not 48; the MIPS config select1
2050                    register is now printed with "reg ,0".
2051                    Also changing many other occurances of 16 vs 8 digit output.
2052                    Adding cache associativity fields to mips_cpu_types.h; updating
2053                    some other cache fields; making the output of
2054                    mips_cpu_dumpinfo() look nicer.
2055                    Generalizing the bintrans stuff for device accesses to also
2056                    work with the new translation system. (This might also break
2057                    some MIPS things.)
2058                    Adding multi-load/store instructions to the ARM disassembler
2059                    and the translator, and some optimizations of various kinds.
2060    20050701        Adding a simple dev_disk (it can read/write sectors from
2061                    disk images).
2062    20050712        Adding dev_ether (a simple ethernet send/receive device).
2063                    Debugger command "ninstrs" for toggling show_nr_of_instructions
2064                    during runtime.
2065                    Removing the framebuffer logo.
2066    20050713        Continuing on dev_ether.
2067                    Adding a dummy cpu_alpha (again).
2068    20050714        More work on cpu_alpha.
2069    20050715        More work on cpu_alpha. Many instructions work, enough to run
2070                    a simple framebuffer fill test (similar to the ARM test).
2071    20050716        More Alpha stuff.
2072    20050717        Minor updates (Alpha stuff).
2073    20050718        Minor updates (Alpha stuff).
2074    20050719        Generalizing some Alpha instructions.
2075    20050720        More Alpha-related updates.
2076    20050721        Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha.
2077    20050722        Alpha-related updates: userland stuff (Hello World using
2078                    write() compiled statically for FreeBSD/Alpha runs fine), and
2079                    more instructions are now implemented.
2080    20050723        Fixing ldq_u and stq_u.
2081                    Adding more instructions (conditional moves, masks, extracts,
2082                    shifts).
2083    20050724        More FreeBSD/Alpha userland stuff, and adding some more
2084                    instructions (inserts).
2085    20050725        Continuing on the Alpha stuff. (Adding dummy ldt/stt.)
2086                    Adding a -A command line option to turn off alignment checks
2087                    in some cases (for translated code).
2088                    Trying to remove the old bintrans code which updated the pc
2089                    and nr_of_executed_instructions for every instruction.
2090    20050726        Making another attempt att removing the pc/nr of instructions
2091                    code. This time it worked, huge performance increase for
2092                    artificial test code, but performance loss for real-world
2093                    code :-( so I'm scrapping that code for now.
2094                    Tiny performance increase on Alpha (by using ret instead of
2095                    jmp, to play nice with the Alpha's branch prediction) for the
2096                    old MIPS bintrans backend.
2097    20050727        Various minor fixes and cleanups.
2098    20050728        Switching from a 2-level virtual to host/physical translation
2099                    system for ARM emulation, to a 1-level translation.
2100                    Trying to switch from 2-level to 1-level for the MIPS bintrans
2101                    system as well (Alpha only, so far), but there is at least one
2102                    problem: caches and/or how they work with device mappings.
2103    20050730        Doing the 2-level to 1-level conversion for the i386 backend.
2104                    The cache/device bug is still there for R2K/3K :(
2105                    Various other minor updates (Malta etc).
2106                    The mc146818 clock now updates the UIP bit in a way which works
2107                    better with Linux for at least sgimips and Malta emulation.
2108                    Beginning the work on refactoring the dyntrans system.
2109    20050731        Continuing the dyntrans refactoring.
2110                    Fixing a small but serious host alignment bug in memory_rw.
2111                    Adding support for big-endian load/stores to the i386 bintrans
2112                    backend.
2113                    Another minor i386 bintrans backend update: stores from the
2114                    zero register are now one (or two) loads shorter.
2115                    The slt and sltu instructions were incorrectly implemented for
2116                    the i386 backend; only using them for 32-bit mode for now.
2117    20050801        Continuing the dyntrans refactoring.
2118                    Cleanup of the ns16550 serial controller (removing unnecessary
2119                    code).
2120                    Bugfix (memory corruption bug) in dev_gt, and a patch/hack from
2121                    Alec Voropay for Linux/Malta.
2122    20050802        More cleanup/refactoring of the dyntrans subsystem: adding
2123                    phys_page pointers to the lookup tables, for quick jumps
2124                    between translated pages.
2125                    Better fix for the ns16550 device (but still no real FIFO
2126                    functionality).
2127                    Converting cpu_ppc to the new dyntrans system. This means that
2128                    I will have to start from scratch with implementing each
2129                    instruction, and figure out how to implement dual 64/32-bit
2130                    modes etc.
2131                    Removing the URISC CPU family, because it was useless.
2132    20050803        When selecting a machine type, the main type can now be omitted
2133                    if the subtype name is unique. (I.e. -E can be omitted.)
2134                    Fixing a dyntrans/device update bug. (Writes to offset 0 of
2135                    a device could sometimes go unnoticed.)
2136                    Adding an experimental "instruction combination" hack for
2137                    ARM for memset-like byte fill loops.
2138    20050804        Minor progress on cpu_alpha and related things.
2139                    Finally fixing the MIPS dmult/dmultu bugs.
2140                    Fixing some minor TODOs.
2141    20050805        Generalizing the 8259 PIC. It now also works with Cobalt
2142                    and evbmips emulation, in addition to the x86 hack.
2143                    Finally converting the ns16550 device to use devinit.
2144                    Continuing the work on the dyntrans system. Thinking about
2145                    how to add breakpoints.
2146    20050806        More dyntrans updates. Breakpoints seem to work now.
2147    20050807        Minor updates: cpu_alpha and related things; removing
2148                    dev_malta (as it isn't used any more).
2149                    Dyntrans: working on general "show trace tree" support.
2150                    The trace tree stuff now works with both the old MIPS code and
2151                    with newer dyntrans modes. :)
2152                    Continuing on Alpha-related stuff (trying to get *BSD to boot
2153                    a bit further, adding more instructions, etc).
2154    20050808        Adding a dummy IA64 cpu family, and continuing the refactoring
2155                    of the dyntrans system.
2156                    Removing the regression test stuff, because it was more or
2157                    less useless.
2158                    Adding loadlinked/storeconditional type instructions to the
2159                    Alpha emulation. (Needed for Linux/alpha. Not very well tested
2160                    yet.)
2161    20050809        The function call trace tree now prints a per-function nr of
2162                    arguments. (Semi-meaningless, since that data isn't read yet
2163                    from the ELFs; some hardcoded symbols such as memcpy() and
2164                    strlen() work fine, though.)
2165                    More dyntrans refactoring; taking out more of the things that
2166                    are common to all cpu families.
2167    20050810        Working on adding support for "dual mode" for PPC dyntrans
2168                    (i.e. both 64-bit and 32-bit modes).
2169                    (Re)adding some simple PPC instructions.
2170    20050811        Adding a dummy M68K cpu family. The dyntrans system isn't ready
2171                    for variable-length ISAs yet, so it's completely bogus so far.
2172                    Re-adding more PPC instructions.
2173                    Adding a hack to src/file.c which allows OpenBSD/mac68k a.out
2174                    kernels to be loaded.
2175                    Beginning to add PPC loads/stores. So far they only work in
2176                    32-bit mode.
2177    20050812        The configure file option "add_remote" now accepts symbolic
2178                    host names, in addition to numeric IPv4 addresses.
2179                    Re-adding more PPC instructions.
2180    20050814        Continuing to port back more PPC instructions.
2181                    Found and fixed the cache/device write-update bug for 32-bit
2182                    MIPS bintrans. :-)
2183                    Triggered a really weird and annoying bug in Compaq's C
2184                    compiler; ccc sometimes outputs code which loads from an
2185                    address _before_ checking whether the pointer was NULL or not.
2186                    (I'm not sure how to handle this problem.)
2187    20050815        Removing all of the old x86 instruction execution code; adding
2188                    a new (dummy) dyntrans module for x86.
2189                    Taking the first steps to extend the dyntrans system to support
2190                    variable-length instructions.
2191                    Slowly preparing for the next release.
2192    20050816        Adding a dummy SPARC cpu module.
2193                    Minor updates (documentation etc) for the release.
2194    
2195    ==============  RELEASE 0.3.5  ==============
2196    
2197    20050816        Some success in decoding the way the SGI O2 PROM draws graphics
2198                    during bootup; lines/rectangles and bitmaps work, enough to
2199                    show the bootlogo etc. :-)
2200                    Adding more PPC instructions, and (dummy) BAT registers.
2201    20050817        Updating the pckbc to support scancode type 3 keyboards
2202                    (required in order to interact with the SGI O2 PROM).
2203                    Adding more PPC instructions.
2204    20050818        Adding more ARM instructions; general register forms.
2205                    Importing armreg.h from NetBSD (ARM cpu ids). Adding a (dummy)
2206                    CATS machine mode (using SA110 as the default CPU).
2207                    Continuing on general dyntrans related stuff.
2208    20050819        Register forms for ARM load/stores. Gaah! The Compaq C Compiler
2209                    bug is triggered for ARM loads as well, not just PPC :-(
2210                    Adding full support for ARM PC-relative load/stores, and load/
2211                    stores where the PC register is the destination register.
2212                    Adding support for ARM a.out binaries.
2213    20050820        Continuing to add more ARM instructions, and correcting some
2214                    bugs. Continuing on CATS emulation.
2215                    More work on the PPC stuff.
2216    20050821        Minor PPC and ARM updates. Adding more machine types.
2217    20050822        All ARM "data processing instructions" are now generated
2218                    automatically.
2219    20050824        Beginning the work on the ARM system control coprocessor.
2220                    Adding support for ARM halfword load/stores, and signed loads.
2221    20050825        Fixing an important bug related to the ARM condition codes.
2222                    OpenBSD/zaurus and NetBSD/netwinder now print some boot
2223                    messages. :)
2224                    Adding a dummy SH (Hitachi SuperH) cpu family.
2225                    Beginning to add some ARM virtual address translation.
2226                    MIPS bugfixes: unaligned PC now cause an ADEL exception (at
2227                    least for non-bintrans execution), and ADEL/ADES (not
2228                    TLBL/TLBS) are used if userland tries to access kernel space.
2229                    (Thanks to Joshua Wise for making me aware of these bugs.)
2230    20050827        More work on the ARM emulation, and various other updates.
2231    20050828        More ARM updates.
2232                    Finally taking the time to work on translation invalidation
2233                    (i.e. invalidating translated code mappings when memory is
2234                    written to). Hopefully this doesn't break anything.
2235    20050829        Moving CPU related files from src/ to a new subdir, src/cpus/.
2236                    Moving PROM emulation stuff from src/ to src/promemul/.
2237                    Better debug instruction trace for ARM loads and stores.
2238    20050830        Various ARM updates (correcting CMP flag calculation, etc).
2239    20050831        PPC instruction updates. (Flag fixes, etc.)
2240    20050901        Various minor PPC and ARM instruction emulation updates.
2241                    Minor OpenFirmware emulation updates.
2242    20050903        Adding support for adding arbitrary ARM coprocessors (with
2243                    the i80321 I/O coprocessor as a first test).
2244                    Various other ARM and PPC updates.
2245    20050904        Adding some SHcompact disassembly routines.
2246    20050907        (Re)adding a dummy HPPA CPU module, and a dummy i960 module.
2247    20050908        Began hacking on some Apple Partition Table support.
2248    20050909        Adding support for loading Mach-O (Darwin PPC) binaries.
2249    20050910        Fixing an ARM bug (Carry flag was incorrectly updated for some
2250                    data processing instructions); OpenBSD/cats and NetBSD/
2251                    netwinder get quite a bit further now.
2252                    Applying a patch to dev_wdc, and a one-liner to dev_pcic, to
2253                    make them work better when emulating new versions of OpenBSD.
2254                    (Thanks to Alexander Yurchenko for the patches.)
2255                    Also doing some other minor updates to dev_wdc. (Some cleanup,
2256                    and finally converting to devinit, etc.)
2257    20050912        IRIX doesn't have u_int64_t by default (noticed by Andreas
2258                    <avr@gnulinux.nl>); configure updated to reflect this.
2259                    Working on ARM register bank switching, CPSR vs SPSR issues,
2260                    and beginning the work on interrupt/exception support.
2261    20050913        Various minor ARM updates (speeding up load/store multiple,
2262                    and fixing a ROR bug in R(); NetBSD/cats now boots as far as
2263                    OpenBSD/cats).
2264    20050917        Adding a dummy Atmel AVR (8-bit) cpu family skeleton.
2265    20050918        Various minor updates.
2266    20050919        Symbols are now loaded from Mach-O executables.
2267                    Continuing the work on adding ARM exception support.
2268    20050920        More work on ARM stuff: OpenBSD/cats and NetBSD/cats reach
2269                    userland! :-)
2270    20050921        Some more progress on ARM interrupt specifics.
2271    20050923        Fixing linesize for VR4121 (patch by Yurchenko). Also fixing
2272                    linesizes/cachesizes for some other VR4xxx.
2273                    Adding a dummy Acer Labs M1543 PCI-ISA bridge (for CATS) and a
2274                    dummy Symphony Labs 83C553 bridge (for Netwinder), usable by
2275                    dev_footbridge.
2276    20050924        Some PPC progress.
2277    20050925        More PPC progress.
2278    20050926        PPC progress (fixing some bugs etc); Darwin's kernel gets
2279                    slightly further than before.
2280    20050928        Various updates: footbridge/ISA/pciide stuff, and finally
2281                    fixing the VGA text scroll-by-changing-the-base-offset bug.
2282    20050930        Adding a dummy S3 ViRGE pci card for CATS emulation, which
2283                    both NetBSD and OpenBSD detects as VGA.
2284                    Continuing on Footbridge (timers, ISA interrupt stuff).
2285    20051001        Continuing... there are still bugs, probably interrupt-
2286                    related.
2287    20051002        More work on the Footbridge (interrupt stuff).
2288    20051003        Various minor updates. (Trying to find the bug(s).)
2289    20051004        Continuing on the ARM stuff.
2290    20051005        More ARM-related fixes.
2291    20051007        FINALLY! Found and fixed 2 ARM bugs: 1 memory related, and the
2292                    other was because of an error in the ARM manual (load multiple
2293                    with the S-bit set should _NOT_ load usermode registers, as the
2294                    manual says, but it should load saved registers, which may or
2295                    may not happen to be usermode registers).
2296                    NetBSD/cats and OpenBSD/cats seem to install fine now :-)
2297                    except for a minor bug at the end of the OpenBSD/cats install.
2298                    Updating the documentation, preparing for the next release.
2299    20051008        Continuing with release testing and cleanup.

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