/[dynamips]/upstream/dynamips-0.2.7-RC3/ppc32_x86_trans.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /upstream/dynamips-0.2.7-RC3/ppc32_x86_trans.h

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Revision 9 - (hide annotations)
Sat Oct 6 16:26:06 2007 UTC (13 years, 3 months ago) by dpavlin
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dynamips-0.2.7-RC3

1 dpavlin 7 /*
2     * Cisco router simulation platform.
3     * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4     */
5    
6     #ifndef __PPC32_X86_TRANS_H__
7     #define __PPC32_X86_TRANS_H__
8    
9     #include "utils.h"
10     #include "x86-codegen.h"
11     #include "cpu.h"
12     #include "ppc32_exec.h"
13     #include "dynamips.h"
14    
15     #define JIT_SUPPORT 1
16    
17     /* Manipulate bitmasks atomically */
18     static forced_inline void atomic_or(m_uint32_t *v,m_uint32_t m)
19     {
20     __asm__ __volatile__("lock; orl %1,%0":"=m"(*v):"ir"(m),"m"(*v));
21     }
22    
23     static forced_inline void atomic_and(m_uint32_t *v,m_uint32_t m)
24     {
25     __asm__ __volatile__("lock; andl %1,%0":"=m"(*v):"ir"(m),"m"(*v));
26     }
27    
28     /* Wrappers to x86-codegen functions */
29     #define ppc32_jit_tcb_set_patch x86_patch
30     #define ppc32_jit_tcb_set_jump x86_jump_code
31    
32     /* PPC instruction array */
33     extern struct ppc32_insn_tag ppc32_insn_tags[];
34    
35     /* Push epilog for an x86 instruction block */
36 dpavlin 9 static forced_inline void ppc32_jit_tcb_push_epilog(u_char **ptr)
37 dpavlin 7 {
38 dpavlin 9 x86_ret(*ptr);
39 dpavlin 7 }
40    
41     /* Execute JIT code */
42     static forced_inline
43     void ppc32_jit_tcb_exec(cpu_ppc_t *cpu,ppc32_jit_tcb_t *block)
44     {
45     insn_tblock_fptr jit_code;
46     m_uint32_t offset;
47    
48     offset = (cpu->ia & PPC32_MIN_PAGE_IMASK) >> 2;
49     jit_code = (insn_tblock_fptr)block->jit_insn_ptr[offset];
50    
51     if (unlikely(!jit_code)) {
52 dpavlin 9 ppc32_jit_tcb_set_target_bit(block,cpu->ia);
53    
54     if (++block->target_undef_cnt == 16) {
55     ppc32_jit_tcb_recompile(cpu,block);
56     jit_code = (insn_tblock_fptr)block->jit_insn_ptr[offset];
57     } else {
58     ppc32_exec_page(cpu);
59     return;
60     }
61 dpavlin 7 }
62    
63     asm volatile ("movl %0,%%edi"::"r"(cpu):
64     "esi","edi","eax","ebx","ecx","edx");
65     jit_code();
66     }
67    
68     #endif

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