32 |
|
|
33 |
/* Debugging flags */ |
/* Debugging flags */ |
34 |
#define DEBUG_ACCESS 0 |
#define DEBUG_ACCESS 0 |
35 |
#define DEBUG_UNKNOWN 1 |
#define DEBUG_UNKNOWN 0 |
36 |
#define DEBUG_TRANSMIT 0 |
#define DEBUG_TRANSMIT 1 |
37 |
#define DEBUG_RECEIVE 0 |
#define DEBUG_RECEIVE 1 |
38 |
|
|
39 |
/* PCI vendor/product codes */ |
/* PCI vendor/product codes */ |
40 |
#define POS_OC3_PCI_VENDOR_ID 0x10b5 |
#define POS_OC3_PCI_VENDOR_ID 0x10b5 |
288 |
case 0x300000: |
case 0x300000: |
289 |
case 0x300004: |
case 0x300004: |
290 |
case 0x30001c: |
case 0x30001c: |
291 |
if (op_type == MTS_READ) |
if (op_type == MTS_READ) { |
292 |
*data = 0x00000FFF; |
*data = 0x00000FFF; |
293 |
|
pci_dev_clear_irq(d->vm,d->pci_dev); |
294 |
|
} |
295 |
break; |
break; |
296 |
|
|
297 |
case 0x300008: |
case 0x300008: |
419 |
|
|
420 |
/* We have finished if the complete packet has been stored */ |
/* We have finished if the complete packet has been stored */ |
421 |
if (tot_len == 0) { |
if (tot_len == 0) { |
422 |
rxdc->rdes[0] = cp_len + 4; |
rxdc->rdes[0] = (cp_len + 4); |
423 |
|
|
424 |
if (i != 0) |
if (i != 0) |
425 |
physmem_copy_u32_to_vm(d->vm,d->rx_current,rxdc->rdes[0]); |
physmem_copy_u32_to_vm(d->vm,d->rx_current,rxdc->rdes[0]); |
546 |
addr = ptxd->tdes[1]; |
addr = ptxd->tdes[1]; |
547 |
|
|
548 |
norm_len = normalize_size(clen,4,0); |
norm_len = normalize_size(clen,4,0); |
549 |
physmem_copy_from_vm(d->vm,pkt_ptr,addr,clen); |
physmem_copy_from_vm(d->vm,pkt_ptr,addr,norm_len); |
550 |
mem_bswap32(pkt_ptr,norm_len); |
mem_bswap32(pkt_ptr,norm_len); |
551 |
} |
} |
552 |
|
|
690 |
d->dev.phys_len = 0x10000; |
d->dev.phys_len = 0x10000; |
691 |
d->dev.handler = dev_pos_access; |
d->dev.handler = dev_pos_access; |
692 |
|
|
693 |
d->pci_dev = pci_dev_add(pci_bus,name,0,0,3,0,C7200_NETIO_IRQ, |
d->pci_dev = pci_dev_add(pci_bus,name,0,0,3,0, |
694 |
|
/*C7200_NETIO_IRQ,*/ |
695 |
|
c7200_net_irq_for_slot_port(pa_bay,0), |
696 |
d,NULL,pci_pos_read,pci_pos_write); |
d,NULL,pci_pos_read,pci_pos_write); |
697 |
|
|
698 |
/* Store device info into the router structure */ |
/* Store device info into the router structure */ |