/[dynamips]/upstream/dynamips-0.2.7-RC2/mips64_x86_trans.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Diff of /upstream/dynamips-0.2.7-RC2/mips64_x86_trans.c

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upstream/dynamips-0.2.7-RC1/mips64_x86_trans.c revision 7 by dpavlin, Sat Oct 6 16:23:47 2007 UTC upstream/dynamips-0.2.7-RC2/mips64_x86_trans.c revision 8 by dpavlin, Sat Oct 6 16:24:54 2007 UTC
# Line 82  void mips64_set_ra(mips64_jit_tcb_t *b,m Line 82  void mips64_set_ra(mips64_jit_tcb_t *b,m
82     x86_mov_membase_reg(b->jit_ptr,X86_EDI,REG_OFFSET(MIPS_GPR_RA)+4,X86_EDX,4);     x86_mov_membase_reg(b->jit_ptr,X86_EDI,REG_OFFSET(MIPS_GPR_RA)+4,X86_EDX,4);
83  }  }
84    
85    /*
86     * Try to branch directly to the specified JIT block without returning to
87     * main loop.
88     */
89    static void mips64_try_direct_far_jump(cpu_mips_t *cpu,mips64_jit_tcb_t *b,
90                                           m_uint64_t new_pc)
91    {
92       m_uint64_t new_page;
93       m_uint32_t pc_hash,pc_offset;
94       u_char *test1,*test2,*test3,*test4;
95    
96       new_page = new_pc & MIPS_MIN_PAGE_MASK;
97       pc_offset = (new_pc & MIPS_MIN_PAGE_IMASK) >> 2;
98       pc_hash = mips64_jit_get_pc_hash(new_pc);
99    
100       /* Get JIT block info in %edx */
101       x86_mov_reg_membase(b->jit_ptr,X86_EBX,
102                           X86_EDI,OFFSET(cpu_mips_t,exec_blk_map),4);
103       x86_mov_reg_membase(b->jit_ptr,X86_EDX,X86_EBX,pc_hash*sizeof(void *),4);
104    
105       /* no JIT block found ? */
106       x86_test_reg_reg(b->jit_ptr,X86_EDX,X86_EDX);
107       test1 = b->jit_ptr;
108       x86_branch8(b->jit_ptr, X86_CC_Z, 0, 1);
109    
110       /* Check block PC (lower 32-bits first) */
111       x86_mov_reg_imm(b->jit_ptr,X86_EAX,(m_uint32_t)new_page);
112       x86_alu_reg_membase(b->jit_ptr,X86_CMP,X86_EAX,X86_EDX,
113                           OFFSET(mips64_jit_tcb_t,start_pc));
114       test2 = b->jit_ptr;
115       x86_branch8(b->jit_ptr, X86_CC_NE, 0, 1);
116    
117       /* Check higher bits... */
118       x86_mov_reg_imm(b->jit_ptr,X86_ECX,new_page >> 32);
119       x86_alu_reg_membase(b->jit_ptr,X86_CMP,X86_ECX,X86_EDX,
120                           OFFSET(mips64_jit_tcb_t,start_pc)+4);
121       test3 = b->jit_ptr;
122       x86_branch8(b->jit_ptr, X86_CC_NE, 0, 1);
123    
124       /* Jump to the code */
125       x86_mov_reg_membase(b->jit_ptr,X86_ESI,
126                           X86_EDX,OFFSET(mips64_jit_tcb_t,jit_insn_ptr),4);
127       x86_mov_reg_membase(b->jit_ptr,X86_EBX,
128                           X86_ESI,pc_offset * sizeof(void *),4);
129      
130       x86_test_reg_reg(b->jit_ptr,X86_EBX,X86_EBX);
131       test4 = b->jit_ptr;
132       x86_branch8(b->jit_ptr, X86_CC_Z, 0, 1);
133       x86_jump_reg(b->jit_ptr,X86_EBX);
134    
135       /* Returns to caller... */
136       x86_patch(test1,b->jit_ptr);
137       x86_patch(test2,b->jit_ptr);
138       x86_patch(test3,b->jit_ptr);
139       x86_patch(test4,b->jit_ptr);
140    
141       mips64_set_pc(b,new_pc);
142       mips64_jit_tcb_push_epilog(b);
143    }
144    
145  /* Set Jump */  /* Set Jump */
146  static void mips64_set_jump(cpu_mips_t *cpu,mips64_jit_tcb_t *b,  static void mips64_set_jump(cpu_mips_t *cpu,mips64_jit_tcb_t *b,
147                              m_uint64_t new_pc,int local_jump)                              m_uint64_t new_pc,int local_jump)
# Line 96  static void mips64_set_jump(cpu_mips_t * Line 156  static void mips64_set_jump(cpu_mips_t *
156        if (jump_ptr) {        if (jump_ptr) {
157           x86_jump_code(b->jit_ptr,jump_ptr);           x86_jump_code(b->jit_ptr,jump_ptr);
158        } else {        } else {
159             /* Never jump directly to code in a delay slot */
160             if (mips64_jit_is_delay_slot(b,new_pc)) {
161                mips64_set_pc(b,new_pc);
162                mips64_jit_tcb_push_epilog(b);
163                return;
164             }
165    
166           mips64_jit_tcb_record_patch(b,b->jit_ptr,new_pc);           mips64_jit_tcb_record_patch(b,b->jit_ptr,new_pc);
167           x86_jump32(b->jit_ptr,0);           x86_jump32(b->jit_ptr,0);
168        }        }
169     } else {     } else {
170        /* save PC */        if (cpu->exec_blk_direct_jump) {
171        mips64_set_pc(b,new_pc);           /* Block lookup optimization */
172             mips64_try_direct_far_jump(cpu,b,new_pc);
173        /* address is in another block, for now, returns to caller */        } else {
174        mips64_jit_tcb_push_epilog(b);           mips64_set_pc(b,new_pc);
175             mips64_jit_tcb_push_epilog(b);
176          }
177     }     }
178  }  }
179    
# Line 2994  struct mips64_insn_tag mips64_insn_tags[ Line 3063  struct mips64_insn_tag mips64_insn_tags[
3063     { mips64_emit_XOR     , 0xfc0007ff , 0x00000026, 1 },     { mips64_emit_XOR     , 0xfc0007ff , 0x00000026, 1 },
3064     { mips64_emit_XORI    , 0xfc000000 , 0x38000000, 1 },     { mips64_emit_XORI    , 0xfc000000 , 0x38000000, 1 },
3065     { mips64_emit_unknown , 0x00000000 , 0x00000000, 1 },     { mips64_emit_unknown , 0x00000000 , 0x00000000, 1 },
3066       { NULL                , 0x00000000 , 0x00000000, 0 },
3067  };  };
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