/[dynamips]/upstream/dynamips-0.2.7-RC2/mips64_nojit_trans.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /upstream/dynamips-0.2.7-RC2/mips64_nojit_trans.c

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Revision 8 - (hide annotations)
Sat Oct 6 16:24:54 2007 UTC (16 years, 5 months ago) by dpavlin
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dynamips-0.2.7-RC2

1 dpavlin 7 /*
2     * Cisco router simulation platform.
3     * Copyright (c) 2006 Christophe Fillot (cf@utc.fr)
4     *
5     * Just an empty JIT template file for architectures not supported by the JIT
6     * code.
7     */
8    
9     #include <stdio.h>
10     #include <stdlib.h>
11     #include <unistd.h>
12     #include <string.h>
13     #include <sys/types.h>
14     #include <sys/stat.h>
15     #include <sys/mman.h>
16     #include <fcntl.h>
17    
18     #include "cpu.h"
19     #include "mips64_jit.h"
20     #include "mips64_nojit_trans.h"
21    
22     /* Set an IRQ */
23     void mips64_set_irq(cpu_mips_t *cpu,m_uint8_t irq)
24     {
25     m_uint32_t m;
26     m = (1 << (irq + MIPS_CP0_CAUSE_ISHIFT)) & MIPS_CP0_CAUSE_IMASK;
27     MIPS64_IRQ_LOCK(cpu);
28     cpu->irq_cause |= m;
29     MIPS64_IRQ_UNLOCK(cpu);
30     }
31    
32     /* Clear an IRQ */
33     void mips64_clear_irq(cpu_mips_t *cpu,m_uint8_t irq)
34     {
35     m_uint32_t m;
36    
37     m = (1 << (irq + MIPS_CP0_CAUSE_ISHIFT)) & MIPS_CP0_CAUSE_IMASK;
38     MIPS64_IRQ_LOCK(cpu);
39     cpu->irq_cause &= ~m;
40     MIPS64_IRQ_UNLOCK(cpu);
41    
42     if (!cpu->irq_cause)
43     cpu->irq_pending = 0;
44     }
45    
46     #define EMPTY(func) func { \
47     fprintf(stderr,"This function should not be called: "#func"\n"); \
48     abort(); \
49     }
50    
51     EMPTY(void mips64_jit_tcb_push_epilog(mips64_jit_tcb_t *block));
52     EMPTY(void mips64_jit_tcb_exec(cpu_mips_t *cpu,mips64_jit_tcb_t *block));
53     EMPTY(void mips64_set_pc(mips64_jit_tcb_t *b,m_uint64_t new_pc));
54     EMPTY(void mips64_set_ra(mips64_jit_tcb_t *b,m_uint64_t ret_pc));
55     EMPTY(void mips64_emit_breakpoint(mips64_jit_tcb_t *b));
56 dpavlin 8 EMPTY(void mips64_emit_single_step(mips64_jit_tcb_t *b,mips_insn_t insn));
57     EMPTY(int mips64_emit_invalid_delay_slot(mips64_jit_tcb_t *b));
58 dpavlin 7 EMPTY(void mips64_inc_cp0_count_reg(mips64_jit_tcb_t *b));
59     EMPTY(void mips64_check_pending_irq(mips64_jit_tcb_t *b));
60     EMPTY(void mips64_inc_perf_counter(mips64_jit_tcb_t *b));
61    
62     /* MIPS instruction array */
63     struct mips64_insn_tag mips64_insn_tags[] = {
64     { NULL, 0, 0, 0 },
65     };

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