/[dynamips]/upstream/dynamips-0.2.7-RC2/mips64_exec.c
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upstream/dynamips-0.2.7-RC1/mips64_exec.c revision 7 by dpavlin, Sat Oct 6 16:23:47 2007 UTC upstream/dynamips-0.2.7-RC2/mips64_exec.c revision 8 by dpavlin, Sat Oct 6 16:24:54 2007 UTC
# Line 51  void mips64_exec_create_ilt(void) Line 51  void mips64_exec_create_ilt(void)
51     for(i=0,count=0;mips64_exec_tags[i].exec;i++)     for(i=0,count=0;mips64_exec_tags[i].exec;i++)
52        count++;        count++;
53    
54     ilt = ilt_create(count+1,     ilt = ilt_create("mips64e",count,
55                      (ilt_get_insn_cbk_t)mips64_exec_get_insn,                      (ilt_get_insn_cbk_t)mips64_exec_get_insn,
56                      (ilt_check_cbk_t)mips64_exec_chk_lo,                      (ilt_check_cbk_t)mips64_exec_chk_lo,
57                      (ilt_check_cbk_t)mips64_exec_chk_hi);                      (ilt_check_cbk_t)mips64_exec_chk_hi);
# Line 322  static forced_inline int mips64_exec_fet Line 322  static forced_inline int mips64_exec_fet
322     return(0);     return(0);
323  }  }
324    
325    /* Unknown opcode */
326    static fastcall int mips64_exec_unknown(cpu_mips_t *cpu,mips_insn_t insn)
327    {
328       printf("MIPS64: unknown opcode 0x%8.8x at pc = 0x%llx\n",insn,cpu->pc);
329       mips64_dump_regs(cpu->gen);
330       return(0);
331    }
332    
333  /* Execute a single instruction */  /* Execute a single instruction */
334  static forced_inline int  static forced_inline int
335  mips64_exec_single_instruction(cpu_mips_t *cpu,mips_insn_t instruction)  mips64_exec_single_instruction(cpu_mips_t *cpu,mips_insn_t instruction)
# Line 342  mips64_exec_single_instruction(cpu_mips_ Line 350  mips64_exec_single_instruction(cpu_mips_
350     tag = mips64_exec_get_insn(index);     tag = mips64_exec_get_insn(index);
351     exec = tag->exec;     exec = tag->exec;
352    
    if (likely(exec != NULL)) {  
353  #if NJM_STATS_ENABLE  #if NJM_STATS_ENABLE
354        cpu->insn_exec_count++;     cpu->insn_exec_count++;
355        mips64_exec_tags[index].count++;     mips64_exec_tags[index].count++;
356  #endif  #endif
357  #if 0  #if 0
358     {     {
# Line 356  mips64_exec_single_instruction(cpu_mips_ Line 363  mips64_exec_single_instruction(cpu_mips_
363     }     }
364  #endif  #endif
365    
366        return(exec(cpu,instruction));     return(exec(cpu,instruction));
    }  
   
    printf("MIPS64: unknown opcode 0x%8.8x at pc = 0x%llx\n",  
           instruction,cpu->pc);  
    mips64_dump_regs(cpu->gen);  
    return(0);  
367  }  }
368    
369  /* Single-step execution */  /* Single-step execution */
# Line 2196  static struct mips64_insn_exec_tag mips6 Line 2197  static struct mips64_insn_exec_tag mips6
2197     { "tlbwr"  , mips64_exec_TLBWR   , 0xffffffff , 0x42000006, 1, 1 },     { "tlbwr"  , mips64_exec_TLBWR   , 0xffffffff , 0x42000006, 1, 1 },
2198     { "xor"    , mips64_exec_XOR     , 0xfc0007ff , 0x00000026, 1, 3 },     { "xor"    , mips64_exec_XOR     , 0xfc0007ff , 0x00000026, 1, 3 },
2199     { "xori"   , mips64_exec_XORI    , 0xfc000000 , 0x38000000, 1, 5 },     { "xori"   , mips64_exec_XORI    , 0xfc000000 , 0x38000000, 1, 5 },
2200       { "unknown", mips64_exec_unknown , 0x00000000 , 0x00000000, 1, 0 },
2201     { NULL     , NULL                , 0x00000000 , 0x00000000, 1, 0 },     { NULL     , NULL                , 0x00000000 , 0x00000000, 1, 0 },
2202  };  };
2203    

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