/[dynamips]/upstream/dynamips-0.2.7-RC2/dev_msfc1.h
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Contents of /upstream/dynamips-0.2.7-RC2/dev_msfc1.h

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Revision 8 - (show annotations)
Sat Oct 6 16:24:54 2007 UTC (12 years, 1 month ago) by dpavlin
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dynamips-0.2.7-RC2

1 /*
2 * Cisco router simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 *
5 * Generic Cisco 7200 routines and definitions (EEPROM,...).
6 *
7 * Notes on IRQs (see "show stack"):
8 *
9 * - triggering IRQ 3: we get indefinitely (for each slot):
10 * "Error: Unexpected NM Interrupt received from slot: 6"
11 *
12 * - triggering IRQ 4: GT64010 reg access: probably "DMA/Timer Interrupt"
13 *
14 * - triggering IRQ 6: we get (probably "OIR/Error Interrupt")
15 * %ERR-1-PERR: PCI bus parity error
16 * %ERR-1-SERR: PCI bus system/parity error
17 * %ERR-1-FATAL: Fatal error interrupt, No reloading
18 * err_stat=0x0, err_enable=0x0, mgmt_event=0xFFFFFFFF
19 *
20 */
21
22 #ifndef __DEV_MSFC1_H__
23 #define __DEV_MSFC1_H__
24
25 #include <pthread.h>
26
27 #include "utils.h"
28 #include "net.h"
29 #include "device.h"
30 #include "pci_dev.h"
31 #include "nmc93cX6.h"
32 #include "net_io.h"
33 #include "vm.h"
34
35 /* Default MSFC1 parameters */
36 #define MSFC1_DEFAULT_RAM_SIZE 256
37 #define MSFC1_DEFAULT_ROM_SIZE 4
38 #define MSFC1_DEFAULT_NVRAM_SIZE 128
39 #define MSFC1_DEFAULT_CONF_REG 0x2102
40 #define MSFC1_DEFAULT_CLOCK_DIV 4
41 #define MSFC1_DEFAULT_RAM_MMAP 1
42
43 /* EOBC + IBC */
44 #define MSFC1_MAX_PA_BAYS 2
45
46 /* MSFC1 Timer IRQ (virtual) */
47 #define MSFC1_VTIMER_IRQ 0
48
49 /* MSFC1 DUART Interrupt */
50 #define MSFC1_DUART_IRQ 5
51
52 /* MSFC1 Network I/O Interrupt */
53 #define MSFC1_NETIO_IRQ 2
54
55 /* MSFC1 PA Management Interrupt handler */
56 #define MSFC1_PA_MGMT_IRQ 3
57
58 /* MSFC1 GT64k DMA/Timer Interrupt */
59 #define MSFC1_GT64K_IRQ 4
60
61 /* MSFC1 Error/OIR Interrupt */
62 #define MSFC1_OIR_IRQ 6
63
64 /* MSFC1 base ram limit (256 Mb) */
65 #define MSFC1_BASE_RAM_LIMIT 256
66
67 /* MSFC1 common device addresses */
68 #define MSFC1_GT64K_ADDR 0x14000000ULL
69 #define MSFC1_GT64K_SEC_ADDR 0x15000000ULL
70 #define MSFC1_BOOTFLASH_ADDR 0x1a000000ULL
71 #define MSFC1_NVRAM_ADDR 0x1e000000ULL
72 #define MSFC1_MPFPGA_ADDR 0x1e800000ULL
73 #define MSFC1_IOFPGA_ADDR 0x1e840000ULL
74 #define MSFC1_BITBUCKET_ADDR 0x1f000000ULL
75 #define MSFC1_ROM_ADDR 0x1fc00000ULL
76 #define MSFC1_IOMEM_ADDR 0x20000000ULL
77 #define MSFC1_SRAM_ADDR 0x4b000000ULL
78 #define MSFC1_BSWAP_ADDR 0xc0000000ULL
79 #define MSFC1_PCI_IO_ADDR 0x100000000ULL
80
81 /* SRAM size */
82 #define MSFC1_SRAM_SIZE (4096*1024)
83
84 /* Reserved space for ROM in NVRAM */
85 #define MSFC1_NVRAM_ROM_RES_SIZE 2048
86
87 /* MSFC1 physical address bus mask: keep only the lower 33 bits */
88 #define MSFC1_ADDR_BUS_MASK 0x1ffffffffULL
89
90 /* MSFC1 ELF Platform ID */
91 #define MSFC1_ELF_MACHINE_ID 0x19
92
93 /* MSFC1 router */
94 typedef struct msfc1_router msfc1_t;
95
96 /* Prototype of NPE driver initialization function */
97 typedef int (*msfc1_npe_init_fn)(msfc1_t *router);
98
99 /* Prototype of PA driver initialization function */
100 typedef int (*msfc1_pa_init_fn)(msfc1_t *router,char *name,u_int pa_bay);
101
102 /* Prototype of PA driver shutdown function */
103 typedef int (*msfc1_pa_shutdown_fn)(msfc1_t *router,u_int pa_bay);
104
105 /* Prototype of PA NIO set function */
106 typedef int (*msfc1_pa_set_nio_fn)(msfc1_t *router,u_int pa_bay,u_int port_id,
107 netio_desc_t *nio);
108
109 /* Prototype of PA NIO unset function */
110 typedef int (*msfc1_pa_unset_nio_fn)(msfc1_t *router,u_int pa_bay,
111 u_int port_id);
112
113 /* Prototype of NM NIO show info function */
114 typedef int (*msfc1_pa_show_info_fn)(msfc1_t *router,u_int pa_bay);
115
116 /* MSFC1 Port Adapter Driver */
117 struct msfc1_pa_driver {
118 char *dev_type;
119 int supported;
120 msfc1_pa_init_fn pa_init;
121 msfc1_pa_shutdown_fn pa_shutdown;
122 msfc1_pa_set_nio_fn pa_set_nio;
123 msfc1_pa_unset_nio_fn pa_unset_nio;
124 msfc1_pa_show_info_fn pa_show_info;
125 };
126
127 /* MSFC1 NIO binding to a slot/port */
128 struct msfc1_nio_binding {
129 netio_desc_t *nio;
130 u_int port_id;
131 struct msfc1_nio_binding *prev,*next;
132 };
133
134 /* MSFC1 PA bay */
135 struct msfc1_pa_bay {
136 char *dev_name; /* Device Name */
137 char *dev_type; /* Device Type */
138 struct cisco_eeprom eeprom; /* PA EEPROM */
139 struct pci_bus *pci_map; /* PCI bus */
140 struct msfc1_pa_driver *pa_driver; /* PA driver */
141 void *drv_info; /* Private driver info */
142 struct msfc1_nio_binding *nio_list; /* NIO bindings to ports */
143 };
144
145 /* MSFC1 NPE Driver */
146 struct msfc1_npe_driver {
147 char *npe_type;
148 int npe_family;
149 msfc1_npe_init_fn npe_init;
150 int max_ram_size;
151 int supported;
152 m_uint64_t nvram_addr;
153 int iocard_required;
154 int clpd6729_pci_bus;
155 int clpd6729_pci_dev;
156 int dec21140_pci_bus;
157 int dec21140_pci_dev;
158 };
159
160 /* MSFC1 router */
161 struct msfc1_router {
162 /* Chassis MAC address */
163 n_eth_addr_t mac_addr;
164
165 /* Associated VM instance */
166 vm_instance_t *vm;
167
168 /* NPE and PA information */
169 struct msfc1_pa_bay pa_bay[MSFC1_MAX_PA_BAYS];
170
171 /* Midplane EEPROM can be modified to change the chassis MAC address... */
172 struct cisco_eeprom cpu_eeprom,mp_eeprom,pem_eeprom;
173
174 /* EEPROMs for CPU and Midplane */
175 struct nmc93cX6_group sys_eeprom_g1;
176 };
177
178 /* Initialize EEPROM groups */
179 void msfc1_init_eeprom_groups(msfc1_t *router);
180
181 /* Create a new router instance */
182 msfc1_t *msfc1_create_instance(char *name,int instance_id);
183
184 /* Delete a router instance */
185 int msfc1_delete_instance(char *name);
186
187 /* Delete all router instances */
188 int msfc1_delete_all_instances(void);
189
190 /* Save configuration of a MSFC1 instance */
191 void msfc1_save_config(msfc1_t *router,FILE *fd);
192
193 /* Save configurations of all MSFC1 instances */
194 void msfc1_save_config_all(FILE *fd);
195
196 /* Set PA EEPROM definition */
197 int msfc1_pa_set_eeprom(msfc1_t *router,u_int pa_bay,
198 const struct cisco_eeprom *eeprom);
199
200 /* Unset PA EEPROM definition (empty bay) */
201 int msfc1_pa_unset_eeprom(msfc1_t *router,u_int pa_bay);
202
203 /* Check if a bay has a port adapter */
204 int msfc1_pa_check_eeprom(msfc1_t *router,u_int pa_bay);
205
206 /* Get bay info */
207 struct msfc1_pa_bay *msfc1_pa_get_info(msfc1_t *router,u_int pa_bay);
208
209 /* Get PA type */
210 char *msfc1_pa_get_type(msfc1_t *router,u_int pa_bay);
211
212 /* Get driver info about the specified slot */
213 void *msfc1_pa_get_drvinfo(msfc1_t *router,u_int pa_bay);
214
215 /* Set driver info for the specified slot */
216 int msfc1_pa_set_drvinfo(msfc1_t *router,u_int pa_bay,void *drv_info);
217
218 /* Add a PA binding */
219 int msfc1_pa_add_binding(msfc1_t *router,char *dev_type,u_int pa_bay);
220
221 /* Remove a PA binding */
222 int msfc1_pa_remove_binding(msfc1_t *router,u_int pa_bay);
223
224 /* Find a NIO binding */
225 struct msfc1_nio_binding *
226 msfc1_pa_find_nio_binding(msfc1_t *router,u_int pa_bay,u_int port_id);
227
228 /* Add a network IO binding */
229 int msfc1_pa_add_nio_binding(msfc1_t *router,u_int pa_bay,u_int port_id,
230 char *nio_name);
231
232 /* Remove a NIO binding */
233 int msfc1_pa_remove_nio_binding(msfc1_t *router,u_int pa_bay,u_int port_id);
234
235 /* Remove all NIO bindings for the specified PA */
236 int msfc1_pa_remove_all_nio_bindings(msfc1_t *router,u_int pa_bay);
237
238 /* Enable a Network IO descriptor for a Port Adapter */
239 int msfc1_pa_enable_nio(msfc1_t *router,u_int pa_bay,u_int port_id);
240
241 /* Disable Network IO descriptor of a Port Adapter */
242 int msfc1_pa_disable_nio(msfc1_t *router,u_int pa_bay,u_int port_id);
243
244 /* Enable all NIO of the specified PA */
245 int msfc1_pa_enable_all_nio(msfc1_t *router,u_int pa_bay);
246
247 /* Disable all NIO of the specified PA */
248 int msfc1_pa_disable_all_nio(msfc1_t *router,u_int pa_bay);
249
250 /* Initialize a Port Adapter */
251 int msfc1_pa_init(msfc1_t *router,u_int pa_bay);
252
253 /* Shutdown a Port Adapter */
254 int msfc1_pa_shutdown(msfc1_t *router,u_int pa_bay);
255
256 /* Shutdown all PA of a router */
257 int msfc1_pa_shutdown_all(msfc1_t *router);
258
259 /* Show info about all NMs */
260 int msfc1_pa_show_all_info(msfc1_t *router);
261
262 /* Create a Port Adapter (command line) */
263 int msfc1_cmd_pa_create(msfc1_t *router,char *str);
264
265 /* Add a Network IO descriptor binding (command line) */
266 int msfc1_cmd_add_nio(msfc1_t *router,char *str);
267
268 /* Show the list of available PA drivers */
269 void msfc1_pa_show_drivers(void);
270
271 /* Set chassis MAC address */
272 int msfc1_midplane_set_mac_addr(msfc1_t *router,char *mac_addr);
273
274 /* Show MSFC1 hardware info */
275 void msfc1_show_hardware(msfc1_t *router);
276
277 /* Initialize default parameters for a MSFC1 */
278 void msfc1_init_defaults(msfc1_t *router);
279
280 /* Initialize a Cisco 7200 instance */
281 int msfc1_init_instance(msfc1_t *router);
282
283 /* Stop a Cisco 7200 instance */
284 int msfc1_stop_instance(msfc1_t *router);
285
286 /* dev_msfc1_iofpga_init() */
287 int dev_msfc1_iofpga_init(msfc1_t *router,m_uint64_t paddr,m_uint32_t len);
288
289 /* dev_mpfpga_init() */
290 int dev_msfc1_mpfpga_init(msfc1_t *router,m_uint64_t paddr,m_uint32_t len);
291
292 /* PA drivers */
293 extern struct msfc1_pa_driver dev_msfc1_iocard_fe_driver;
294 extern struct msfc1_pa_driver dev_msfc1_iocard_2fe_driver;
295 extern struct msfc1_pa_driver dev_msfc1_iocard_ge_e_driver;
296 extern struct msfc1_pa_driver dev_msfc1_pa_fe_tx_driver;
297 extern struct msfc1_pa_driver dev_msfc1_pa_2fe_tx_driver;
298 extern struct msfc1_pa_driver dev_msfc1_pa_ge_driver;
299 extern struct msfc1_pa_driver dev_msfc1_pa_4e_driver;
300 extern struct msfc1_pa_driver dev_msfc1_pa_8e_driver;
301 extern struct msfc1_pa_driver dev_msfc1_pa_4t_driver;
302 extern struct msfc1_pa_driver dev_msfc1_pa_8t_driver;
303 extern struct msfc1_pa_driver dev_msfc1_pa_a1_driver;
304 extern struct msfc1_pa_driver dev_msfc1_pa_pos_oc3_driver;
305 extern struct msfc1_pa_driver dev_msfc1_pa_4b_driver;
306 extern struct msfc1_pa_driver dev_msfc1_pa_mc8te1_driver;
307
308 #endif

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