/[dynamips]/upstream/dynamips-0.2.7-RC2/dev_c7200_serial.c
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Contents of /upstream/dynamips-0.2.7-RC2/dev_c7200_serial.c

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Revision 8 - (show annotations)
Sat Oct 6 16:24:54 2007 UTC (12 years, 1 month ago) by dpavlin
File MIME type: text/plain
File size: 5692 byte(s)
dynamips-0.2.7-RC2

1 /*
2 * Cisco router simulation platform.
3 * Copyright (C) 2005,2006 Christophe Fillot. All rights reserved.
4 *
5 * Serial Interfaces (Mueslix).
6 *
7 * EEPROM types:
8 * - 0x0C: PA-4T+
9 * - 0x0D: PA-8T-V35
10 * - 0x0E: PA-8T-X21
11 * - 0x0F: PA-8T-232
12 * - 0x10: PA-2H (HSSI)
13 * - 0x40: PA-4E1G/120
14 *
15 * It seems that the PA-8T is a combination of two PA-4T+.
16 *
17 * Note: "debug serial mueslix" gives more technical info.
18 */
19
20 #include <stdio.h>
21 #include <stdlib.h>
22 #include <string.h>
23 #include <unistd.h>
24 #include <errno.h>
25 #include <assert.h>
26
27 #include "cpu.h"
28 #include "vm.h"
29 #include "dynamips.h"
30 #include "memory.h"
31 #include "device.h"
32 #include "net.h"
33 #include "net_io.h"
34 #include "ptask.h"
35 #include "dev_mueslix.h"
36 #include "dev_c7200.h"
37
38 /* ====================================================================== */
39 /* PA-4T+ */
40 /* ====================================================================== */
41
42 /*
43 * dev_c7200_pa_4t_init()
44 *
45 * Add a PA-4T port adapter into specified slot.
46 */
47 int dev_c7200_pa_4t_init(c7200_t *router,char *name,u_int pa_bay)
48 {
49 struct mueslix_data *data;
50
51 /* Set the EEPROM */
52 c7200_pa_set_eeprom(router,pa_bay,cisco_eeprom_find_pa("PA-4T+"));
53
54 /* Create the Mueslix chip */
55 data = dev_mueslix_init(router->vm,name,1,
56 router->pa_bay[pa_bay].pci_map,0,
57 c7200_net_irq_for_slot_port(pa_bay,0));
58 if (!data) return(-1);
59
60 /* Store device info into the router structure */
61 return(c7200_pa_set_drvinfo(router,pa_bay,data));
62 }
63
64 /* Remove a PA-4T+ from the specified slot */
65 int dev_c7200_pa_4t_shutdown(c7200_t *router,u_int pa_bay)
66 {
67 struct c7200_pa_bay *bay;
68
69 if (!(bay = c7200_pa_get_info(router,pa_bay)))
70 return(-1);
71
72 c7200_pa_unset_eeprom(router,pa_bay);
73 dev_mueslix_remove(bay->drv_info);
74 return(0);
75 }
76
77 /* Bind a Network IO descriptor to a specific port */
78 int dev_c7200_pa_4t_set_nio(c7200_t *router,u_int pa_bay,u_int port_id,
79 netio_desc_t *nio)
80 {
81 struct mueslix_data *data;
82
83 if ((port_id >= MUESLIX_NR_CHANNELS) ||
84 !(data = c7200_pa_get_drvinfo(router,pa_bay)))
85 return(-1);
86
87 return(dev_mueslix_set_nio(data,port_id,nio));
88 }
89
90 /* Unbind a Network IO descriptor to a specific port */
91 int dev_c7200_pa_4t_unset_nio(c7200_t *router,u_int pa_bay,u_int port_id)
92 {
93 struct mueslix_data *d;
94
95 if ((port_id >= MUESLIX_NR_CHANNELS) ||
96 !(d = c7200_pa_get_drvinfo(router,pa_bay)))
97 return(-1);
98
99 return(dev_mueslix_unset_nio(d,port_id));
100 }
101
102 /* PA-4T+ driver */
103 struct c7200_pa_driver dev_c7200_pa_4t_driver = {
104 "PA-4T+", 1,
105 dev_c7200_pa_4t_init,
106 dev_c7200_pa_4t_shutdown,
107 dev_c7200_pa_4t_set_nio,
108 dev_c7200_pa_4t_unset_nio,
109 };
110
111 /* ====================================================================== */
112 /* PA-8T */
113 /* ====================================================================== */
114
115 /* PA-8T data */
116 struct pa8t_data {
117 struct mueslix_data *mueslix[2];
118 };
119
120 /*
121 * dev_c7200_pa_8t_init()
122 *
123 * Add a PA-8T port adapter into specified slot.
124 */
125 int dev_c7200_pa_8t_init(c7200_t *router,char *name,u_int pa_bay)
126 {
127 struct pa8t_data *data;
128
129 /* Allocate the private data structure for the PA-8T */
130 if (!(data = malloc(sizeof(*data)))) {
131 fprintf(stderr,"%s (PA-8T): out of memory\n",name);
132 return(-1);
133 }
134
135 /* Set the EEPROM */
136 c7200_pa_set_eeprom(router,pa_bay,cisco_eeprom_find_pa("PA-8T"));
137
138 /* Create the 1st Mueslix chip */
139 data->mueslix[0] = dev_mueslix_init(router->vm,name,1,
140 router->pa_bay[pa_bay].pci_map,0,
141 c7200_net_irq_for_slot_port(pa_bay,0));
142 if (!data->mueslix[0]) return(-1);
143
144 /* Create the 2nd Mueslix chip */
145 data->mueslix[1] = dev_mueslix_init(router->vm,name,1,
146 router->pa_bay[pa_bay].pci_map,1,
147 c7200_net_irq_for_slot_port(pa_bay,1));
148 if (!data->mueslix[1]) return(-1);
149
150 /* Store device info into the router structure */
151 return(c7200_pa_set_drvinfo(router,pa_bay,data));
152 }
153
154 /* Remove a PA-8T from the specified slot */
155 int dev_c7200_pa_8t_shutdown(c7200_t *router,u_int pa_bay)
156 {
157 struct c7200_pa_bay *bay;
158 struct pa8t_data *data;
159
160 if (!(bay = c7200_pa_get_info(router,pa_bay)))
161 return(-1);
162
163 data = bay->drv_info;
164
165 /* Remove the PA EEPROM */
166 c7200_pa_unset_eeprom(router,pa_bay);
167
168 /* Remove the two Mueslix chips */
169 dev_mueslix_remove(data->mueslix[0]);
170 dev_mueslix_remove(data->mueslix[1]);
171 free(data);
172 return(0);
173 }
174
175 /* Bind a Network IO descriptor to a specific port */
176 int dev_c7200_pa_8t_set_nio(c7200_t *router,u_int pa_bay,u_int port_id,
177 netio_desc_t *nio)
178 {
179 struct pa8t_data *d;
180
181 if ((port_id >= (MUESLIX_NR_CHANNELS*2)) ||
182 !(d = c7200_pa_get_drvinfo(router,pa_bay)))
183 return(-1);
184
185 return(dev_mueslix_set_nio(d->mueslix[port_id>>2],(port_id&0x03),nio));
186 }
187
188 /* Bind a Network IO descriptor to a specific port */
189 int dev_c7200_pa_8t_unset_nio(c7200_t *router,u_int pa_bay,u_int port_id)
190 {
191 struct pa8t_data *d;
192
193 if ((port_id >= (MUESLIX_NR_CHANNELS*2)) ||
194 !(d = c7200_pa_get_drvinfo(router,pa_bay)))
195 return(-1);
196
197 return(dev_mueslix_unset_nio(d->mueslix[port_id>>2],port_id&0x03));
198 }
199
200 /* PA-8T driver */
201 struct c7200_pa_driver dev_c7200_pa_8t_driver = {
202 "PA-8T", 1,
203 dev_c7200_pa_8t_init,
204 dev_c7200_pa_8t_shutdown,
205 dev_c7200_pa_8t_set_nio,
206 dev_c7200_pa_8t_unset_nio,
207 };

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