/[dynamips]/upstream/dynamips-0.2.7-RC2/dev_c7200.h
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Contents of /upstream/dynamips-0.2.7-RC2/dev_c7200.h

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Revision 8 - (show annotations)
Sat Oct 6 16:24:54 2007 UTC (12 years, 1 month ago) by dpavlin
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File size: 11950 byte(s)
dynamips-0.2.7-RC2

1 /*
2 * Cisco router simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 *
5 * Generic Cisco 7200 routines and definitions (EEPROM,...).
6 *
7 * Notes on IRQs (see "show stack"):
8 *
9 * - triggering IRQ 3: we get indefinitely (for each slot):
10 * "Error: Unexpected NM Interrupt received from slot: 6"
11 *
12 * - triggering IRQ 4: GT64010 reg access: probably "DMA/Timer Interrupt"
13 *
14 * - triggering IRQ 6: we get (probably "OIR/Error Interrupt")
15 * %ERR-1-PERR: PCI bus parity error
16 * %ERR-1-SERR: PCI bus system/parity error
17 * %ERR-1-FATAL: Fatal error interrupt, No reloading
18 * err_stat=0x0, err_enable=0x0, mgmt_event=0xFFFFFFFF
19 *
20 */
21
22 #ifndef __DEV_C7200_H__
23 #define __DEV_C7200_H__
24
25 #include <pthread.h>
26
27 #include "utils.h"
28 #include "net.h"
29 #include "device.h"
30 #include "pci_dev.h"
31 #include "nmc93cX6.h"
32 #include "dev_mv64460.h"
33 #include "net_io.h"
34 #include "vm.h"
35
36 /* Default C7200 parameters */
37 #define C7200_DEFAULT_NPE_TYPE "npe-200"
38 #define C7200_DEFAULT_MIDPLANE "vxr"
39 #define C7200_DEFAULT_RAM_SIZE 256
40 #define C7200_DEFAULT_ROM_SIZE 4
41 #define C7200_DEFAULT_NVRAM_SIZE 128
42 #define C7200_DEFAULT_CONF_REG 0x2102
43 #define C7200_DEFAULT_CLOCK_DIV 4
44 #define C7200_DEFAULT_RAM_MMAP 1
45 #define C7200_DEFAULT_DISK0_SIZE 64
46 #define C7200_DEFAULT_DISK1_SIZE 0
47
48 /* 6 slots + 1 I/O card */
49 #define C7200_MAX_PA_BAYS 7
50
51 /* C7200 Timer IRQ (virtual) */
52 #define C7200_VTIMER_IRQ 0
53
54 /* C7200 DUART Interrupt */
55 #define C7200_DUART_IRQ 5
56
57 /* C7200 Network I/O Interrupt */
58 #define C7200_NETIO_IRQ 2
59
60 /* C7200 PA Management Interrupt handler */
61 #define C7200_PA_MGMT_IRQ 3
62
63 /* C7200 GT64k DMA/Timer Interrupt */
64 #define C7200_GT64K_IRQ 4
65
66 /* C7200 Error/OIR Interrupt */
67 #define C7200_OIR_IRQ 6
68
69 /* Network IRQ */
70 #define C7200_NETIO_IRQ_BASE 32
71 #define C7200_NETIO_IRQ_PORT_BITS 3
72 #define C7200_NETIO_IRQ_PORT_MASK ((1 << C7200_NETIO_IRQ_PORT_BITS) - 1)
73 #define C7200_NETIO_IRQ_PER_SLOT (1 << C7200_NETIO_IRQ_PORT_BITS)
74 #define C7200_NETIO_IRQ_END \
75 (C7200_NETIO_IRQ_BASE + (C7200_MAX_PA_BAYS * C7200_NETIO_IRQ_PER_SLOT) - 1)
76
77 /* C7200 base ram limit (256 Mb) */
78 #define C7200_BASE_RAM_LIMIT 256
79
80 /* C7200 common device addresses */
81 #define C7200_GT64K_ADDR 0x14000000ULL
82 #define C7200_GT64K_SEC_ADDR 0x15000000ULL
83 #define C7200_BOOTFLASH_ADDR 0x1a000000ULL
84 #define C7200_NVRAM_ADDR 0x1e000000ULL
85 #define C7200_MPFPGA_ADDR 0x1e800000ULL
86 #define C7200_IOFPGA_ADDR 0x1e840000ULL
87 #define C7200_BITBUCKET_ADDR 0x1f000000ULL
88 #define C7200_ROM_ADDR 0x1fc00000ULL
89 #define C7200_IOMEM_ADDR 0x20000000ULL
90 #define C7200_SRAM_ADDR 0x4b000000ULL
91 #define C7200_BSWAP_ADDR 0xc0000000ULL
92 #define C7200_PCI_IO_ADDR 0x100000000ULL
93
94 /* NPE-G1 specific info */
95 #define C7200_G1_NVRAM_ADDR 0x1e400000ULL
96
97 /* NPE-G2 specific info */
98 #define C7200_G2_BSWAP_ADDR 0xc0000000ULL
99 #define C7200_G2_BOOTFLASH_ADDR 0xe8000000ULL
100 #define C7200_G2_PCI_IO_ADDR 0xf0000000ULL
101 #define C7200_G2_MV64460_ADDR 0xf1000000ULL
102 #define C7200_G2_MPFPGA_ADDR 0xfe000000ULL
103 #define C7200_G2_IOFPGA_ADDR 0xfe040000ULL
104 #define C7200_G2_NVRAM_ADDR 0xff000000ULL
105 #define C7200_G2_ROM_ADDR 0xfff00000ULL
106
107 /* NVRAM size for NPE-G2: 2 Mb */
108 #define C7200_G2_NVRAM_SIZE (2 * 1048576)
109
110 /* Reserved space for ROM in NVRAM */
111 #define C7200_NVRAM_ROM_RES_SIZE 2048
112
113 /* C7200 physical address bus mask: keep only the lower 33 bits */
114 #define C7200_ADDR_BUS_MASK 0x1ffffffffULL
115
116 /* C7200 ELF Platform ID */
117 #define C7200_ELF_MACHINE_ID 0x19
118
119 /* NPE families */
120 enum {
121 C7200_NPE_FAMILY_MIPS = 0,
122 C7200_NPE_FAMILY_PPC,
123 };
124
125 /* C7200 router */
126 typedef struct c7200_router c7200_t;
127
128 /* Prototype of NPE driver initialization function */
129 typedef int (*c7200_npe_init_fn)(c7200_t *router);
130
131 /* Prototype of PA driver initialization function */
132 typedef int (*c7200_pa_init_fn)(c7200_t *router,char *name,u_int pa_bay);
133
134 /* Prototype of PA driver shutdown function */
135 typedef int (*c7200_pa_shutdown_fn)(c7200_t *router,u_int pa_bay);
136
137 /* Prototype of PA NIO set function */
138 typedef int (*c7200_pa_set_nio_fn)(c7200_t *router,u_int pa_bay,u_int port_id,
139 netio_desc_t *nio);
140
141 /* Prototype of PA NIO unset function */
142 typedef int (*c7200_pa_unset_nio_fn)(c7200_t *router,u_int pa_bay,
143 u_int port_id);
144
145 /* Prototype of NM NIO show info function */
146 typedef int (*c7200_pa_show_info_fn)(c7200_t *router,u_int pa_bay);
147
148 /* C7200 Port Adapter Driver */
149 struct c7200_pa_driver {
150 char *dev_type;
151 int supported;
152 c7200_pa_init_fn pa_init;
153 c7200_pa_shutdown_fn pa_shutdown;
154 c7200_pa_set_nio_fn pa_set_nio;
155 c7200_pa_unset_nio_fn pa_unset_nio;
156 c7200_pa_show_info_fn pa_show_info;
157 };
158
159 /* C7200 NIO binding to a slot/port */
160 struct c7200_nio_binding {
161 netio_desc_t *nio;
162 u_int port_id;
163 struct c7200_nio_binding *prev,*next;
164 };
165
166 /* C7200 PA bay */
167 struct c7200_pa_bay {
168 char *dev_name; /* Device Name */
169 char *dev_type; /* Device Type */
170 struct cisco_eeprom eeprom; /* PA EEPROM */
171 struct pci_bus *pci_map; /* PCI bus */
172 struct c7200_pa_driver *pa_driver; /* PA driver */
173 void *drv_info; /* Private driver info */
174 struct c7200_nio_binding *nio_list; /* NIO bindings to ports */
175 };
176
177 /* C7200 NPE Driver */
178 struct c7200_npe_driver {
179 char *npe_type;
180 int npe_family;
181 c7200_npe_init_fn npe_init;
182 int max_ram_size;
183 int supported;
184 m_uint64_t nvram_addr;
185 int iocard_required;
186 int clpd6729_pci_bus;
187 int clpd6729_pci_dev;
188 int dec21140_pci_bus;
189 int dec21140_pci_dev;
190 };
191
192 /* C7200 router */
193 struct c7200_router {
194 /* Midplane type (standard,VXR) and chassis MAC address */
195 char *midplane_type;
196 int midplane_version;
197 n_eth_addr_t mac_addr;
198
199 /* Associated VM instance */
200 vm_instance_t *vm;
201
202 /* MV64460 device for NPE-G2 */
203 struct mv64460_data *mv64460_sysctr;
204
205 /* Midplane FPGA */
206 struct c7200_mpfpga_data *mpfpga_data;
207
208 /* NPE and PA information */
209 struct c7200_npe_driver *npe_driver;
210 struct c7200_pa_bay pa_bay[C7200_MAX_PA_BAYS];
211 m_uint8_t oir_status;
212
213 /* Hidden I/O bridge hack to support PCMCIA */
214 struct pci_bridge *io_pci_bridge;
215 struct pci_bus *pcmcia_bus;
216
217 /* Midplane EEPROM can be modified to change the chassis MAC address... */
218 struct cisco_eeprom cpu_eeprom,mp_eeprom,pem_eeprom;
219
220 struct nmc93cX6_group sys_eeprom_g1; /* EEPROMs for CPU and Midplane */
221 struct nmc93cX6_group sys_eeprom_g2; /* EEPROM for PEM */
222 struct nmc93cX6_group pa_eeprom_g1; /* EEPROMs for bays 0, 1, 3, 4 */
223 struct nmc93cX6_group pa_eeprom_g2; /* EEPROMs for bays 2, 5, 6 */
224 };
225
226 /* Initialize EEPROM groups */
227 void c7200_init_eeprom_groups(c7200_t *router);
228
229 /* Create a new router instance */
230 c7200_t *c7200_create_instance(char *name,int instance_id);
231
232 /* Delete a router instance */
233 int c7200_delete_instance(char *name);
234
235 /* Delete all router instances */
236 int c7200_delete_all_instances(void);
237
238 /* Save configuration of a C7200 instance */
239 void c7200_save_config(c7200_t *router,FILE *fd);
240
241 /* Save configurations of all C7200 instances */
242 void c7200_save_config_all(FILE *fd);
243
244 /* Get network IRQ for specified slot/port */
245 u_int c7200_net_irq_for_slot_port(u_int slot,u_int port);
246
247 /* Set PA EEPROM definition */
248 int c7200_pa_set_eeprom(c7200_t *router,u_int pa_bay,
249 const struct cisco_eeprom *eeprom);
250
251 /* Unset PA EEPROM definition (empty bay) */
252 int c7200_pa_unset_eeprom(c7200_t *router,u_int pa_bay);
253
254 /* Check if a bay has a port adapter */
255 int c7200_pa_check_eeprom(c7200_t *router,u_int pa_bay);
256
257 /* Get bay info */
258 struct c7200_pa_bay *c7200_pa_get_info(c7200_t *router,u_int pa_bay);
259
260 /* Get PA type */
261 char *c7200_pa_get_type(c7200_t *router,u_int pa_bay);
262
263 /* Get driver info about the specified slot */
264 void *c7200_pa_get_drvinfo(c7200_t *router,u_int pa_bay);
265
266 /* Set driver info for the specified slot */
267 int c7200_pa_set_drvinfo(c7200_t *router,u_int pa_bay,void *drv_info);
268
269 /* Add a PA binding */
270 int c7200_pa_add_binding(c7200_t *router,char *dev_type,u_int pa_bay);
271
272 /* Remove a PA binding */
273 int c7200_pa_remove_binding(c7200_t *router,u_int pa_bay);
274
275 /* Find a NIO binding */
276 struct c7200_nio_binding *
277 c7200_pa_find_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
278
279 /* Add a network IO binding */
280 int c7200_pa_add_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id,
281 char *nio_name);
282
283 /* Remove a NIO binding */
284 int c7200_pa_remove_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
285
286 /* Remove all NIO bindings for the specified PA */
287 int c7200_pa_remove_all_nio_bindings(c7200_t *router,u_int pa_bay);
288
289 /* Enable a Network IO descriptor for a Port Adapter */
290 int c7200_pa_enable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
291
292 /* Disable Network IO descriptor of a Port Adapter */
293 int c7200_pa_disable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
294
295 /* Enable all NIO of the specified PA */
296 int c7200_pa_enable_all_nio(c7200_t *router,u_int pa_bay);
297
298 /* Disable all NIO of the specified PA */
299 int c7200_pa_disable_all_nio(c7200_t *router,u_int pa_bay);
300
301 /* Initialize a Port Adapter */
302 int c7200_pa_init(c7200_t *router,u_int pa_bay);
303
304 /* Shutdown a Port Adapter */
305 int c7200_pa_shutdown(c7200_t *router,u_int pa_bay);
306
307 /* Shutdown all PA of a router */
308 int c7200_pa_shutdown_all(c7200_t *router);
309
310 /* Show info about all NMs */
311 int c7200_pa_show_all_info(c7200_t *router);
312
313 /* Create a Port Adapter (command line) */
314 int c7200_cmd_pa_create(c7200_t *router,char *str);
315
316 /* Add a Network IO descriptor binding (command line) */
317 int c7200_cmd_add_nio(c7200_t *router,char *str);
318
319 /* Show the list of available PA drivers */
320 void c7200_pa_show_drivers(void);
321
322 /* Get an NPE driver */
323 struct c7200_npe_driver *c7200_npe_get_driver(char *npe_type);
324
325 /* Set the NPE type */
326 int c7200_npe_set_type(c7200_t *router,char *npe_type);
327
328 /* Show the list of available NPE drivers */
329 void c7200_npe_show_drivers(void);
330
331 /* Set Midplane type */
332 int c7200_midplane_set_type(c7200_t *router,char *midplane_type);
333
334 /* Set chassis MAC address */
335 int c7200_midplane_set_mac_addr(c7200_t *router,char *mac_addr);
336
337 /* Show C7200 hardware info */
338 void c7200_show_hardware(c7200_t *router);
339
340 /* Initialize default parameters for a C7200 */
341 void c7200_init_defaults(c7200_t *router);
342
343 /* Initialize a Cisco 7200 instance */
344 int c7200_init_instance(c7200_t *router);
345
346 /* Stop a Cisco 7200 instance */
347 int c7200_stop_instance(c7200_t *router);
348
349 /* Trigger an OIR event */
350 int c7200_trigger_oir_event(c7200_t *router,u_int slot_mask);
351
352 /* Initialize a new PA while the virtual router is online (OIR) */
353 int c7200_pa_init_online(c7200_t *router,u_int pa_bay);
354
355 /* Stop a PA while the virtual router is online (OIR) */
356 int c7200_pa_stop_online(c7200_t *router,u_int pa_bay);
357
358 /* dev_c7200_iofpga_init() */
359 int dev_c7200_iofpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
360
361 /* PA drivers */
362 extern struct c7200_pa_driver dev_c7200_iocard_fe_driver;
363 extern struct c7200_pa_driver dev_c7200_iocard_2fe_driver;
364 extern struct c7200_pa_driver dev_c7200_iocard_ge_e_driver;
365 extern struct c7200_pa_driver dev_c7200_pa_fe_tx_driver;
366 extern struct c7200_pa_driver dev_c7200_pa_2fe_tx_driver;
367 extern struct c7200_pa_driver dev_c7200_pa_ge_driver;
368 extern struct c7200_pa_driver dev_c7200_pa_4e_driver;
369 extern struct c7200_pa_driver dev_c7200_pa_8e_driver;
370 extern struct c7200_pa_driver dev_c7200_pa_4t_driver;
371 extern struct c7200_pa_driver dev_c7200_pa_8t_driver;
372 extern struct c7200_pa_driver dev_c7200_pa_a1_driver;
373 extern struct c7200_pa_driver dev_c7200_pa_pos_oc3_driver;
374 extern struct c7200_pa_driver dev_c7200_pa_4b_driver;
375 extern struct c7200_pa_driver dev_c7200_pa_mc8te1_driver;
376
377 #endif

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