/[dynamips]/upstream/dynamips-0.2.7-RC2/dev_c3725.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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upstream/dynamips-0.2.6-RC3/dev_c3725.h revision 4 by dpavlin, Sat Oct 6 16:06:49 2007 UTC upstream/dynamips-0.2.7-RC2/dev_c3725.h revision 8 by dpavlin, Sat Oct 6 16:24:54 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   * Cisco 3725 simulation platform.   * Cisco router simulation platform.
3   * Copyright (c) 2006 Christophe Fillot (cf@utc.fr)   * Copyright (c) 2006 Christophe Fillot (cf@utc.fr)
4   *   *
5   * Generic Cisco 3725 routines and definitions (EEPROM,...).   * Generic Cisco 3725 routines and definitions (EEPROM,...).
# Line 14  Line 14 
14  #include "net.h"  #include "net.h"
15  #include "device.h"  #include "device.h"
16  #include "pci_dev.h"  #include "pci_dev.h"
17  #include "nmc93c46.h"  #include "nmc93cX6.h"
18  #include "net_io.h"  #include "net_io.h"
19  #include "vm.h"  #include "vm.h"
20    
# Line 44  Line 44 
44  /* C3725 External Interrupt */  /* C3725 External Interrupt */
45  #define C3725_EXT_IRQ    6  #define C3725_EXT_IRQ    6
46    
47    /* Network IRQ */
48    #define C3725_NETIO_IRQ_BASE       32
49    #define C3725_NETIO_IRQ_PORT_BITS  3
50    #define C3725_NETIO_IRQ_PORT_MASK  ((1 << C3725_NETIO_IRQ_PORT_BITS) - 1)
51    #define C3725_NETIO_IRQ_PER_SLOT   (1 << C3725_NETIO_IRQ_PORT_BITS)
52    #define C3725_NETIO_IRQ_END        \
53        (C3725_NETIO_IRQ_BASE + (C3725_MAX_NM_BAYS * C3725_NETIO_IRQ_PER_SLOT) - 1)
54    
55  /* C3725 common device addresses */  /* C3725 common device addresses */
56  #define C3725_GT96K_ADDR      0x14000000ULL  #define C3725_GT96K_ADDR      0x14000000ULL
57  #define C3725_IOFPGA_ADDR     0x1e800000ULL  #define C3725_IOFPGA_ADDR     0x1e800000ULL
# Line 127  struct c3725_router { Line 135  struct c3725_router {
135     /* IO memory size to be passed to Smart Init */     /* IO memory size to be passed to Smart Init */
136     u_int nm_iomem_size;     u_int nm_iomem_size;
137    
138       /* I/O FPGA */
139       struct c3725_iofpga_data *iofpga_data;
140    
141     /* Chassis information */     /* Chassis information */
142     struct c3725_nm_bay nm_bay[C3725_MAX_NM_BAYS];     struct c3725_nm_bay nm_bay[C3725_MAX_NM_BAYS];
143     m_uint8_t oir_status;     m_uint8_t oir_status;
# Line 136  struct c3725_router { Line 147  struct c3725_router {
147      * It can be modified to change the chassis MAC address.      * It can be modified to change the chassis MAC address.
148      */      */
149     struct cisco_eeprom mb_eeprom;     struct cisco_eeprom mb_eeprom;
150     struct nmc93c46_group mb_eeprom_group;     struct nmc93cX6_group mb_eeprom_group;
151    
152     /* Network Module EEPROMs */     /* Network Module EEPROMs */
153     struct nmc93c46_group nm_eeprom_group[2];     struct nmc93cX6_group nm_eeprom_group[2];
154  };  };
155    
156  /* Create a new router instance */  /* Create a new router instance */
# Line 157  void c3725_save_config(c3725_t *router,F Line 168  void c3725_save_config(c3725_t *router,F
168  /* Save configurations of all C3725 instances */  /* Save configurations of all C3725 instances */
169  void c3725_save_config_all(FILE *fd);  void c3725_save_config_all(FILE *fd);
170    
171    /* Get network IRQ for specified slot/port */
172    u_int c3725_net_irq_for_slot_port(u_int slot,u_int port);
173    
174  /* Get PCI device for the specified NM bay */  /* Get PCI device for the specified NM bay */
175  int c3725_nm_get_pci_device(u_int nm_bay);  int c3725_nm_get_pci_device(u_int nm_bay);
176    
# Line 256  int c3725_stop_instance(c3725_t *router) Line 270  int c3725_stop_instance(c3725_t *router)
270  /* Initialize EEPROM groups */  /* Initialize EEPROM groups */
271  void c3725_init_eeprom_groups(c3725_t *router);  void c3725_init_eeprom_groups(c3725_t *router);
272    
 /* dev_c3725_iofpga_init() */  
 int dev_c3725_iofpga_init(c3725_t *router,m_uint64_t paddr,m_uint32_t len);  
   
273  /* NM drivers */  /* NM drivers */
274  extern struct c3725_nm_driver dev_c3725_nm_1fe_tx_driver;  extern struct c3725_nm_driver dev_c3725_nm_1fe_tx_driver;
275  extern struct c3725_nm_driver dev_c3725_gt96100_fe_driver;  extern struct c3725_nm_driver dev_c3725_gt96100_fe_driver;

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