/[dynamips]/upstream/dynamips-0.2.7-RC2/cp0.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /upstream/dynamips-0.2.7-RC2/cp0.h

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Revision 8 - (show annotations)
Sat Oct 6 16:24:54 2007 UTC (16 years, 5 months ago) by dpavlin
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File size: 1733 byte(s)
dynamips-0.2.7-RC2

1 /*
2 * Cisco 7200 (Predator) simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 */
5
6 #ifndef __CP0_H__
7 #define __CP0_H__
8
9 #include "utils.h"
10
11 /* CP0 register names */
12 extern char *mips64_cp0_reg_names[];
13
14 /* Get cp0 register index given its name */
15 int cp0_get_reg_index(char *name);
16
17 /* Get the CPU operating mode (User,Supervisor or Kernel) */
18 u_int cp0_get_mode(cpu_mips_t *cpu);
19
20 /* Get a cp0 register */
21 m_uint64_t cp0_get_reg(cpu_mips_t *cpu,u_int cp0_reg);
22
23 /* DMFC0 */
24 fastcall void cp0_exec_dmfc0(cpu_mips_t *cpu,u_int gp_reg,u_int cp0_reg);
25
26 /* DMTC0 */
27 fastcall void cp0_exec_dmtc0(cpu_mips_t *cpu,u_int gp_reg,u_int cp0_reg);
28
29 /* MFC0 */
30 fastcall void cp0_exec_mfc0(cpu_mips_t *cpu,u_int gp_reg,u_int cp0_reg);
31
32 /* MTC0 */
33 fastcall void cp0_exec_mtc0(cpu_mips_t *cpu,u_int gp_reg,u_int cp0_reg);
34
35 /* CFC0 */
36 fastcall void cp0_exec_cfc0(cpu_mips_t *cpu,u_int gp_reg,u_int cp0_reg);
37
38 /* CTC0 */
39 fastcall void cp0_exec_ctc0(cpu_mips_t *cpu,u_int gp_reg,u_int cp0_reg);
40
41 /* TLB lookup */
42 int cp0_tlb_lookup(cpu_mips_t *cpu,m_uint64_t vaddr,mts_map_t *res);
43
44 /* Map all TLB entries into the MTS */
45 void cp0_map_all_tlb_to_mts(cpu_mips_t *cpu);
46
47 /* TLBP: Probe a TLB entry */
48 fastcall void cp0_exec_tlbp(cpu_mips_t *cpu);
49
50 /* TLBR: Read Indexed TLB entry */
51 fastcall void cp0_exec_tlbr(cpu_mips_t *cpu);
52
53 /* TLBWI: Write Indexed TLB entry */
54 fastcall void cp0_exec_tlbwi(cpu_mips_t *cpu);
55
56 /* TLBWR: Write Random TLB entry */
57 fastcall void cp0_exec_tlbwr(cpu_mips_t *cpu);
58
59 /* Raw dump of the TLB */
60 void tlb_raw_dump(cpu_mips_t *cpu);
61
62 /* Dump the specified TLB entry */
63 void tlb_dump_entry(cpu_mips_t *cpu,u_int index);
64
65 /* Human-Readable dump of the TLB */
66 void tlb_dump(cpu_mips_t *cpu);
67
68 #endif

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