/[dynamips]/upstream/dynamips-0.2.7-RC1/dev_c7200_serial.c
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Contents of /upstream/dynamips-0.2.7-RC1/dev_c7200_serial.c

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Revision 3 - (show annotations)
Sat Oct 6 16:05:34 2007 UTC (13 years, 1 month ago) by dpavlin
Original Path: upstream/dynamips-0.2.6-RC2/dev_c7200_serial.c
File MIME type: text/plain
File size: 5623 byte(s)
dynamips-0.2.6-RC2

1 /*
2 * Cisco C7200 (Predator) Simulation Platform.
3 * Copyright (C) 2005,2006 Christophe Fillot. All rights reserved.
4 *
5 * Serial Interfaces (Mueslix).
6 *
7 * EEPROM types:
8 * - 0x0C: PA-4T+
9 * - 0x0D: PA-8T-V35
10 * - 0x0E: PA-8T-X21
11 * - 0x0F: PA-8T-232
12 * - 0x10: PA-2H (HSSI)
13 * - 0x40: PA-4E1G/120
14 *
15 * It seems that the PA-8T is a combination of two PA-4T+.
16 *
17 * Note: "debug serial mueslix" gives more technical info.
18 */
19
20 #include <stdio.h>
21 #include <stdlib.h>
22 #include <string.h>
23 #include <unistd.h>
24 #include <errno.h>
25 #include <assert.h>
26
27 #include "mips64.h"
28 #include "dynamips.h"
29 #include "memory.h"
30 #include "device.h"
31 #include "net.h"
32 #include "net_io.h"
33 #include "ptask.h"
34 #include "dev_mueslix.h"
35 #include "dev_c7200.h"
36
37 /* ====================================================================== */
38 /* PA-4T+ */
39 /* ====================================================================== */
40
41 /*
42 * dev_c7200_pa_4t_init()
43 *
44 * Add a PA-4T port adapter into specified slot.
45 */
46 int dev_c7200_pa_4t_init(c7200_t *router,char *name,u_int pa_bay)
47 {
48 struct mueslix_data *data;
49
50 /* Set the EEPROM */
51 c7200_pa_set_eeprom(router,pa_bay,cisco_eeprom_find_pa("PA-4T+"));
52
53 /* Create the Mueslix chip */
54 data = dev_mueslix_init(router->vm,name,1,
55 router->pa_bay[pa_bay].pci_map,0,
56 C7200_NETIO_IRQ);
57 if (!data) return(-1);
58
59 /* Store device info into the router structure */
60 return(c7200_pa_set_drvinfo(router,pa_bay,data));
61 }
62
63 /* Remove a PA-4T+ from the specified slot */
64 int dev_c7200_pa_4t_shutdown(c7200_t *router,u_int pa_bay)
65 {
66 struct c7200_pa_bay *bay;
67
68 if (!(bay = c7200_pa_get_info(router,pa_bay)))
69 return(-1);
70
71 c7200_pa_unset_eeprom(router,pa_bay);
72 dev_mueslix_remove(bay->drv_info);
73 return(0);
74 }
75
76 /* Bind a Network IO descriptor to a specific port */
77 int dev_c7200_pa_4t_set_nio(c7200_t *router,u_int pa_bay,u_int port_id,
78 netio_desc_t *nio)
79 {
80 struct mueslix_data *data;
81
82 if ((port_id >= MUESLIX_NR_CHANNELS) ||
83 !(data = c7200_pa_get_drvinfo(router,pa_bay)))
84 return(-1);
85
86 return(dev_mueslix_set_nio(data,port_id,nio));
87 }
88
89 /* Unbind a Network IO descriptor to a specific port */
90 int dev_c7200_pa_4t_unset_nio(c7200_t *router,u_int pa_bay,u_int port_id)
91 {
92 struct mueslix_data *d;
93
94 if ((port_id >= MUESLIX_NR_CHANNELS) ||
95 !(d = c7200_pa_get_drvinfo(router,pa_bay)))
96 return(-1);
97
98 return(dev_mueslix_unset_nio(d,port_id));
99 }
100
101 /* PA-4T+ driver */
102 struct c7200_pa_driver dev_c7200_pa_4t_driver = {
103 "PA-4T+", 1,
104 dev_c7200_pa_4t_init,
105 dev_c7200_pa_4t_shutdown,
106 dev_c7200_pa_4t_set_nio,
107 dev_c7200_pa_4t_unset_nio,
108 };
109
110 /* ====================================================================== */
111 /* PA-8T */
112 /* ====================================================================== */
113
114 /* PA-8T data */
115 struct pa8t_data {
116 struct mueslix_data *mueslix[2];
117 };
118
119 /*
120 * dev_c7200_pa_8t_init()
121 *
122 * Add a PA-8T port adapter into specified slot.
123 */
124 int dev_c7200_pa_8t_init(c7200_t *router,char *name,u_int pa_bay)
125 {
126 struct pa8t_data *data;
127
128 /* Allocate the private data structure for the PA-8T */
129 if (!(data = malloc(sizeof(*data)))) {
130 fprintf(stderr,"%s (PA-8T): out of memory\n",name);
131 return(-1);
132 }
133
134 /* Set the EEPROM */
135 c7200_pa_set_eeprom(router,pa_bay,cisco_eeprom_find_pa("PA-8T"));
136
137 /* Create the 1st Mueslix chip */
138 data->mueslix[0] = dev_mueslix_init(router->vm,name,1,
139 router->pa_bay[pa_bay].pci_map,0,
140 C7200_NETIO_IRQ);
141 if (!data->mueslix[0]) return(-1);
142
143 /* Create the 2nd Mueslix chip */
144 data->mueslix[1] = dev_mueslix_init(router->vm,name,1,
145 router->pa_bay[pa_bay].pci_map,1,
146 C7200_NETIO_IRQ);
147 if (!data->mueslix[1]) return(-1);
148
149 /* Store device info into the router structure */
150 return(c7200_pa_set_drvinfo(router,pa_bay,data));
151 }
152
153 /* Remove a PA-8T from the specified slot */
154 int dev_c7200_pa_8t_shutdown(c7200_t *router,u_int pa_bay)
155 {
156 struct c7200_pa_bay *bay;
157 struct pa8t_data *data;
158
159 if (!(bay = c7200_pa_get_info(router,pa_bay)))
160 return(-1);
161
162 data = bay->drv_info;
163
164 /* Remove the PA EEPROM */
165 c7200_pa_unset_eeprom(router,pa_bay);
166
167 /* Remove the two Mueslix chips */
168 dev_mueslix_remove(data->mueslix[0]);
169 dev_mueslix_remove(data->mueslix[1]);
170 free(data);
171 return(0);
172 }
173
174 /* Bind a Network IO descriptor to a specific port */
175 int dev_c7200_pa_8t_set_nio(c7200_t *router,u_int pa_bay,u_int port_id,
176 netio_desc_t *nio)
177 {
178 struct pa8t_data *d;
179
180 if ((port_id >= (MUESLIX_NR_CHANNELS*2)) ||
181 !(d = c7200_pa_get_drvinfo(router,pa_bay)))
182 return(-1);
183
184 return(dev_mueslix_set_nio(d->mueslix[port_id>>2],(port_id&0x03),nio));
185 }
186
187 /* Bind a Network IO descriptor to a specific port */
188 int dev_c7200_pa_8t_unset_nio(c7200_t *router,u_int pa_bay,u_int port_id)
189 {
190 struct pa8t_data *d;
191
192 if ((port_id >= (MUESLIX_NR_CHANNELS*2)) ||
193 !(d = c7200_pa_get_drvinfo(router,pa_bay)))
194 return(-1);
195
196 return(dev_mueslix_unset_nio(d->mueslix[port_id>>2],port_id&0x03));
197 }
198
199 /* PA-8T driver */
200 struct c7200_pa_driver dev_c7200_pa_8t_driver = {
201 "PA-8T", 1,
202 dev_c7200_pa_8t_init,
203 dev_c7200_pa_8t_shutdown,
204 dev_c7200_pa_8t_set_nio,
205 dev_c7200_pa_8t_unset_nio,
206 };

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