/[dynamips]/upstream/dynamips-0.2.7-RC1/dev_c7200.h
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Contents of /upstream/dynamips-0.2.7-RC1/dev_c7200.h

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Revision 7 - (show annotations)
Sat Oct 6 16:23:47 2007 UTC (12 years, 1 month ago) by dpavlin
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File size: 11527 byte(s)
dynamips-0.2.7-RC1

1 /*
2 * Cisco router simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 *
5 * Generic Cisco 7200 routines and definitions (EEPROM,...).
6 *
7 * Notes on IRQs (see "show stack"):
8 *
9 * - triggering IRQ 3: we get indefinitely (for each slot):
10 * "Error: Unexpected NM Interrupt received from slot: 6"
11 *
12 * - triggering IRQ 4: GT64010 reg access: probably "DMA/Timer Interrupt"
13 *
14 * - triggering IRQ 6: we get (probably "OIR/Error Interrupt")
15 * %ERR-1-PERR: PCI bus parity error
16 * %ERR-1-SERR: PCI bus system/parity error
17 * %ERR-1-FATAL: Fatal error interrupt, No reloading
18 * err_stat=0x0, err_enable=0x0, mgmt_event=0xFFFFFFFF
19 *
20 */
21
22 #ifndef __DEV_C7200_H__
23 #define __DEV_C7200_H__
24
25 #include <pthread.h>
26
27 #include "utils.h"
28 #include "net.h"
29 #include "device.h"
30 #include "pci_dev.h"
31 #include "nmc93c46.h"
32 #include "dev_mv64460.h"
33 #include "net_io.h"
34 #include "vm.h"
35
36 /* Default C7200 parameters */
37 #define C7200_DEFAULT_NPE_TYPE "npe-200"
38 #define C7200_DEFAULT_MIDPLANE "vxr"
39 #define C7200_DEFAULT_RAM_SIZE 256
40 #define C7200_DEFAULT_ROM_SIZE 4
41 #define C7200_DEFAULT_NVRAM_SIZE 128
42 #define C7200_DEFAULT_CONF_REG 0x2102
43 #define C7200_DEFAULT_CLOCK_DIV 4
44 #define C7200_DEFAULT_RAM_MMAP 1
45 #define C7200_DEFAULT_DISK0_SIZE 64
46 #define C7200_DEFAULT_DISK1_SIZE 0
47
48 /* 6 slots + 1 I/O card */
49 #define C7200_MAX_PA_BAYS 7
50
51 /* C7200 Timer IRQ (virtual) */
52 #define C7200_VTIMER_IRQ 0
53
54 /* C7200 DUART Interrupt */
55 #define C7200_DUART_IRQ 5
56
57 /* C7200 Network I/O Interrupt */
58 #define C7200_NETIO_IRQ 2
59
60 /* C7200 PA Management Interrupt handler */
61 #define C7200_PA_MGMT_IRQ 3
62
63 /* C7200 GT64k DMA/Timer Interrupt */
64 #define C7200_GT64K_IRQ 4
65
66 /* C7200 Error/OIR Interrupt */
67 #define C7200_OIR_IRQ 6
68
69 /* C7200 base ram limit (256 Mb) */
70 #define C7200_BASE_RAM_LIMIT 256
71
72 /* C7200 common device addresses */
73 #define C7200_GT64K_ADDR 0x14000000ULL
74 #define C7200_GT64K_SEC_ADDR 0x15000000ULL
75 #define C7200_BOOTFLASH_ADDR 0x1a000000ULL
76 #define C7200_NVRAM_ADDR 0x1e000000ULL
77 #define C7200_MPFPGA_ADDR 0x1e800000ULL
78 #define C7200_IOFPGA_ADDR 0x1e840000ULL
79 #define C7200_BITBUCKET_ADDR 0x1f000000ULL
80 #define C7200_ROM_ADDR 0x1fc00000ULL
81 #define C7200_IOMEM_ADDR 0x20000000ULL
82 #define C7200_SRAM_ADDR 0x4b000000ULL
83 #define C7200_BSWAP_ADDR 0xc0000000ULL
84 #define C7200_PCI_IO_ADDR 0x100000000ULL
85
86 /* NPE-G1 specific info */
87 #define C7200_G1_NVRAM_ADDR 0x1e400000ULL
88
89 /* NPE-G2 specific info */
90 #define C7200_G2_BSWAP_ADDR 0xc0000000ULL
91 #define C7200_G2_BOOTFLASH_ADDR 0xe8000000ULL
92 #define C7200_G2_PCI_IO_ADDR 0xf0000000ULL
93 #define C7200_G2_MV64460_ADDR 0xf1000000ULL
94 #define C7200_G2_MPFPGA_ADDR 0xfe000000ULL
95 #define C7200_G2_IOFPGA_ADDR 0xfe040000ULL
96 #define C7200_G2_NVRAM_ADDR 0xff000000ULL
97 #define C7200_G2_ROM_ADDR 0xfff00000ULL
98
99 /* NVRAM size for NPE-G2: 2 Mb */
100 #define C7200_G2_NVRAM_SIZE (2 * 1048576)
101
102 /* Reserved space for ROM in NVRAM */
103 #define C7200_NVRAM_ROM_RES_SIZE 2048
104
105 /* C7200 physical address bus mask: keep only the lower 33 bits */
106 #define C7200_ADDR_BUS_MASK 0x1ffffffffULL
107
108 /* C7200 ELF Platform ID */
109 #define C7200_ELF_MACHINE_ID 0x19
110
111 /* NPE families */
112 enum {
113 C7200_NPE_FAMILY_MIPS = 0,
114 C7200_NPE_FAMILY_PPC,
115 };
116
117 /* C7200 router */
118 typedef struct c7200_router c7200_t;
119
120 /* Prototype of NPE driver initialization function */
121 typedef int (*c7200_npe_init_fn)(c7200_t *router);
122
123 /* Prototype of PA driver initialization function */
124 typedef int (*c7200_pa_init_fn)(c7200_t *router,char *name,u_int pa_bay);
125
126 /* Prototype of PA driver shutdown function */
127 typedef int (*c7200_pa_shutdown_fn)(c7200_t *router,u_int pa_bay);
128
129 /* Prototype of PA NIO set function */
130 typedef int (*c7200_pa_set_nio_fn)(c7200_t *router,u_int pa_bay,u_int port_id,
131 netio_desc_t *nio);
132
133 /* Prototype of PA NIO unset function */
134 typedef int (*c7200_pa_unset_nio_fn)(c7200_t *router,u_int pa_bay,
135 u_int port_id);
136
137 /* Prototype of NM NIO show info function */
138 typedef int (*c7200_pa_show_info_fn)(c7200_t *router,u_int pa_bay);
139
140 /* C7200 Port Adapter Driver */
141 struct c7200_pa_driver {
142 char *dev_type;
143 int supported;
144 c7200_pa_init_fn pa_init;
145 c7200_pa_shutdown_fn pa_shutdown;
146 c7200_pa_set_nio_fn pa_set_nio;
147 c7200_pa_unset_nio_fn pa_unset_nio;
148 c7200_pa_show_info_fn pa_show_info;
149 };
150
151 /* C7200 NIO binding to a slot/port */
152 struct c7200_nio_binding {
153 netio_desc_t *nio;
154 u_int port_id;
155 struct c7200_nio_binding *prev,*next;
156 };
157
158 /* C7200 PA bay */
159 struct c7200_pa_bay {
160 char *dev_name; /* Device Name */
161 char *dev_type; /* Device Type */
162 struct cisco_eeprom eeprom; /* PA EEPROM */
163 struct pci_bus *pci_map; /* PCI bus */
164 struct c7200_pa_driver *pa_driver; /* PA driver */
165 void *drv_info; /* Private driver info */
166 struct c7200_nio_binding *nio_list; /* NIO bindings to ports */
167 };
168
169 /* C7200 NPE Driver */
170 struct c7200_npe_driver {
171 char *npe_type;
172 int npe_family;
173 c7200_npe_init_fn npe_init;
174 int max_ram_size;
175 int supported;
176 m_uint64_t nvram_addr;
177 int iocard_required;
178 int clpd6729_pci_bus;
179 int clpd6729_pci_dev;
180 int dec21140_pci_bus;
181 int dec21140_pci_dev;
182 };
183
184 /* C7200 router */
185 struct c7200_router {
186 /* Midplane type (standard,VXR) and chassis MAC address */
187 char *midplane_type;
188 int midplane_version;
189 n_eth_addr_t mac_addr;
190
191 /* Associated VM instance */
192 vm_instance_t *vm;
193
194 /* MV64460 device for NPE-G2 */
195 struct mv64460_data *mv64460_sysctr;
196
197 /* NPE and PA information */
198 struct c7200_npe_driver *npe_driver;
199 struct c7200_pa_bay pa_bay[C7200_MAX_PA_BAYS];
200 m_uint8_t oir_status;
201
202 /* Hidden I/O bridge hack to support PCMCIA */
203 struct pci_bridge *io_pci_bridge;
204 struct pci_bus *pcmcia_bus;
205
206 /* Midplane EEPROM can be modified to change the chassis MAC address... */
207 struct cisco_eeprom cpu_eeprom,mp_eeprom,pem_eeprom;
208
209 struct nmc93c46_group sys_eeprom_g1; /* EEPROMs for CPU and Midplane */
210 struct nmc93c46_group sys_eeprom_g2; /* EEPROM for PEM */
211 struct nmc93c46_group pa_eeprom_g1; /* EEPROMs for bays 0, 1, 3, 4 */
212 struct nmc93c46_group pa_eeprom_g2; /* EEPROMs for bays 2, 5, 6 */
213 };
214
215 /* Initialize EEPROM groups */
216 void c7200_init_eeprom_groups(c7200_t *router);
217
218 /* Create a new router instance */
219 c7200_t *c7200_create_instance(char *name,int instance_id);
220
221 /* Delete a router instance */
222 int c7200_delete_instance(char *name);
223
224 /* Delete all router instances */
225 int c7200_delete_all_instances(void);
226
227 /* Save configuration of a C7200 instance */
228 void c7200_save_config(c7200_t *router,FILE *fd);
229
230 /* Save configurations of all C7200 instances */
231 void c7200_save_config_all(FILE *fd);
232
233 /* Set PA EEPROM definition */
234 int c7200_pa_set_eeprom(c7200_t *router,u_int pa_bay,
235 const struct cisco_eeprom *eeprom);
236
237 /* Unset PA EEPROM definition (empty bay) */
238 int c7200_pa_unset_eeprom(c7200_t *router,u_int pa_bay);
239
240 /* Check if a bay has a port adapter */
241 int c7200_pa_check_eeprom(c7200_t *router,u_int pa_bay);
242
243 /* Get bay info */
244 struct c7200_pa_bay *c7200_pa_get_info(c7200_t *router,u_int pa_bay);
245
246 /* Get PA type */
247 char *c7200_pa_get_type(c7200_t *router,u_int pa_bay);
248
249 /* Get driver info about the specified slot */
250 void *c7200_pa_get_drvinfo(c7200_t *router,u_int pa_bay);
251
252 /* Set driver info for the specified slot */
253 int c7200_pa_set_drvinfo(c7200_t *router,u_int pa_bay,void *drv_info);
254
255 /* Add a PA binding */
256 int c7200_pa_add_binding(c7200_t *router,char *dev_type,u_int pa_bay);
257
258 /* Remove a PA binding */
259 int c7200_pa_remove_binding(c7200_t *router,u_int pa_bay);
260
261 /* Find a NIO binding */
262 struct c7200_nio_binding *
263 c7200_pa_find_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
264
265 /* Add a network IO binding */
266 int c7200_pa_add_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id,
267 char *nio_name);
268
269 /* Remove a NIO binding */
270 int c7200_pa_remove_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
271
272 /* Remove all NIO bindings for the specified PA */
273 int c7200_pa_remove_all_nio_bindings(c7200_t *router,u_int pa_bay);
274
275 /* Enable a Network IO descriptor for a Port Adapter */
276 int c7200_pa_enable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
277
278 /* Disable Network IO descriptor of a Port Adapter */
279 int c7200_pa_disable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
280
281 /* Enable all NIO of the specified PA */
282 int c7200_pa_enable_all_nio(c7200_t *router,u_int pa_bay);
283
284 /* Disable all NIO of the specified PA */
285 int c7200_pa_disable_all_nio(c7200_t *router,u_int pa_bay);
286
287 /* Initialize a Port Adapter */
288 int c7200_pa_init(c7200_t *router,u_int pa_bay);
289
290 /* Shutdown a Port Adapter */
291 int c7200_pa_shutdown(c7200_t *router,u_int pa_bay);
292
293 /* Shutdown all PA of a router */
294 int c7200_pa_shutdown_all(c7200_t *router);
295
296 /* Show info about all NMs */
297 int c7200_pa_show_all_info(c7200_t *router);
298
299 /* Create a Port Adapter (command line) */
300 int c7200_cmd_pa_create(c7200_t *router,char *str);
301
302 /* Add a Network IO descriptor binding (command line) */
303 int c7200_cmd_add_nio(c7200_t *router,char *str);
304
305 /* Show the list of available PA drivers */
306 void c7200_pa_show_drivers(void);
307
308 /* Get an NPE driver */
309 struct c7200_npe_driver *c7200_npe_get_driver(char *npe_type);
310
311 /* Set the NPE type */
312 int c7200_npe_set_type(c7200_t *router,char *npe_type);
313
314 /* Show the list of available NPE drivers */
315 void c7200_npe_show_drivers(void);
316
317 /* Set Midplane type */
318 int c7200_midplane_set_type(c7200_t *router,char *midplane_type);
319
320 /* Set chassis MAC address */
321 int c7200_midplane_set_mac_addr(c7200_t *router,char *mac_addr);
322
323 /* Show C7200 hardware info */
324 void c7200_show_hardware(c7200_t *router);
325
326 /* Initialize default parameters for a C7200 */
327 void c7200_init_defaults(c7200_t *router);
328
329 /* Initialize a Cisco 7200 instance */
330 int c7200_init_instance(c7200_t *router);
331
332 /* Stop a Cisco 7200 instance */
333 int c7200_stop_instance(c7200_t *router);
334
335 /* Trigger an OIR event */
336 int c7200_trigger_oir_event(c7200_t *router,u_int slot_mask);
337
338 /* Initialize a new PA while the virtual router is online (OIR) */
339 int c7200_pa_init_online(c7200_t *router,u_int pa_bay);
340
341 /* Stop a PA while the virtual router is online (OIR) */
342 int c7200_pa_stop_online(c7200_t *router,u_int pa_bay);
343
344 /* dev_c7200_iofpga_init() */
345 int dev_c7200_iofpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
346
347 /* dev_mpfpga_init() */
348 int dev_c7200_mpfpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
349
350 /* PA drivers */
351 extern struct c7200_pa_driver dev_c7200_iocard_fe_driver;
352 extern struct c7200_pa_driver dev_c7200_iocard_2fe_driver;
353 extern struct c7200_pa_driver dev_c7200_iocard_ge_e_driver;
354 extern struct c7200_pa_driver dev_c7200_pa_fe_tx_driver;
355 extern struct c7200_pa_driver dev_c7200_pa_2fe_tx_driver;
356 extern struct c7200_pa_driver dev_c7200_pa_ge_driver;
357 extern struct c7200_pa_driver dev_c7200_pa_4e_driver;
358 extern struct c7200_pa_driver dev_c7200_pa_8e_driver;
359 extern struct c7200_pa_driver dev_c7200_pa_4t_driver;
360 extern struct c7200_pa_driver dev_c7200_pa_8t_driver;
361 extern struct c7200_pa_driver dev_c7200_pa_a1_driver;
362 extern struct c7200_pa_driver dev_c7200_pa_pos_oc3_driver;
363 extern struct c7200_pa_driver dev_c7200_pa_4b_driver;
364 extern struct c7200_pa_driver dev_c7200_pa_mc8te1_driver;
365
366 #endif

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