upstream/dynamips-0.2.7-RC1/dev_c2600_iofpga.c

/*
 * Cisco router simulation platform.
 * Copyright (c) 2006 Christophe Fillot (cf@utc.fr)
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <sys/types.h>
#include <termios.h>
#include <fcntl.h>
#include <pthread.h>

#include "ptask.h"
#include "cpu.h"
#include "vm.h"
#include "dynamips.h"
#include "memory.h"
#include "device.h"
#include "dev_vtty.h"
#include "nmc93c46.h"
#include "dev_c2600.h"

/* Debugging flags */
#define DEBUG_UNKNOWN   1
#define DEBUG_ACCESS    0

/* Definitions for Mainboard EEPROM */
#define EEPROM_MB_DOUT  3
#define EEPROM_MB_DIN   2
#define EEPROM_MB_CLK   1
#define EEPROM_MB_CS    0

/* Definitions for Network Modules EEPROM */
#define EEPROM_NM_DOUT  7
#define EEPROM_NM_DIN   6
#define EEPROM_NM_CLK   2
#define EEPROM_NM_CS    4

#define C2691_NET_IRQ_CLEARING_DELAY  16

/* IO FPGA structure */
struct iofpga_data {
   vm_obj_t vm_obj;
   struct vdevice dev;
   c2600_t *router;
   
   /* 
    * Used to introduce a "delay" before clearing the network interrupt
    * on 3620/3640 platforms. Added due to a packet loss when using an 
    * Ethernet NM on these platforms.
    *
    * Anyway, we should rely on the device information with appropriate IRQ
    * routing.
    */
   int net_irq_clearing_count;

   /* Interrupt mask*/
   m_uint16_t intr_mask;
};

/* Mainboard EEPROM definition */
static const struct nmc93c46_eeprom_def eeprom_mb_def = {
   EEPROM_MB_CLK, EEPROM_MB_CS,
   EEPROM_MB_DIN, EEPROM_MB_DOUT,
};

/* Mainboard EEPROM */
static const struct nmc93c46_group eeprom_mb_group = {
   1, 0, "Mainboard EEPROM", 0, { &eeprom_mb_def },
};

/* NM EEPROM definition */
static const struct nmc93c46_eeprom_def eeprom_nm_def = {
   EEPROM_NM_CLK, EEPROM_NM_CS,
   EEPROM_NM_DIN, EEPROM_NM_DOUT,
};

/* NM EEPROM */
static const struct nmc93c46_group eeprom_nm_group = {
   1, 0, "NM EEPROM", 0, { &eeprom_nm_def },
};

/*
 * dev_c2600_iofpga_access()
 */
static void *
dev_c2600_iofpga_access(cpu_gen_t *cpu,struct vdevice *dev,
                        m_uint32_t offset,u_int op_size,u_int op_type,
                        m_uint64_t *data)
{
   struct iofpga_data *d = dev->priv_data;

   if (op_type == MTS_READ)
      *data = 0x0;

#if DEBUG_ACCESS
   if (op_type == MTS_READ) {
      cpu_log(cpu,"IO_FPGA","reading reg 0x%x at pc=0x%llx (size=%u)\n",
              offset,cpu_get_pc(cpu),op_size);
   } else {
      cpu_log(cpu,"IO_FPGA",
              "writing reg 0x%x at pc=0x%llx, data=0x%llx (size=%u)\n",
              offset,cpu_get_pc(cpu),*data,op_size);
   }
#endif

   switch(offset) {
      case 0x04:
         if (op_type == MTS_READ)
            *data = 0x00;
         //vm_clear_irq(cpu->vm,C2600_NETIO_IRQ);
         break;

      /* 
       * Network Interrupt.
       *
       * Bit 0: slot 1.
       * Bit 4: slot 0 (MB), port 0
       * Bit 5: slot 0 (MB), port 1
       * Other: AIM ? (error messages displayed)
       */
      case 0x08:
         if (op_type == MTS_READ)
            *data = 0x31;
         vm_clear_irq(cpu->vm,C2600_NETIO_IRQ);
         break;

      case 0x10:
      case 0x14:
         if (op_type == MTS_READ)
            *data = 0xFFFFFFFF;
         break;

      /* Flash Related: 0x1y */
#if 1
      case 0x0c:
         if (op_type == MTS_READ)
            *data = 0x10;
         break;
#endif

      /* NM EEPROM */
      case 0x1c:
         if (op_type == MTS_WRITE)
            nmc93c46_write(&d->router->nm_eeprom_group,(u_int)(*data));
         else
            *data = nmc93c46_read(&d->router->nm_eeprom_group);
         break;

#if DEBUG_UNKNOWN
      default:
         if (op_type == MTS_READ) {
            cpu_log(cpu,"IO_FPGA",
                    "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n",
                    offset,cpu_get_pc(cpu),op_size);
         } else {
            cpu_log(cpu,"IO_FPGA",
                    "write to unknown addr 0x%x, value=0x%llx, "
                    "pc=0x%llx (size=%u)\n",
                    offset,*data,cpu_get_pc(cpu),op_size);
         }
#endif
   }

   return NULL;
}

/* Initialize EEPROM groups */
void c2600_init_eeprom_groups(c2600_t *router)
{
   /* Initialize Mainboard EEPROM */
   router->mb_eeprom_group = eeprom_mb_group;
   router->mb_eeprom_group.eeprom[0] = &router->mb_eeprom;
   router->mb_eeprom.data = NULL;
   router->mb_eeprom.len  = 0;

   /* EEPROM for NM slot 1 */
   router->nm_eeprom_group = eeprom_nm_group;
   router->nm_eeprom_group.eeprom[0] = &router->nm_bay[1].eeprom;
}

/* Shutdown the IO FPGA device */
void dev_c2600_iofpga_shutdown(vm_instance_t *vm,struct iofpga_data *d)
{
   if (d != NULL) {
      /* Remove the device */
      dev_remove(vm,&d->dev);

      /* Free the structure itself */
      free(d);
   }
}

/*
 * dev_c2600_iofpga_init()
 */
int dev_c2600_iofpga_init(c2600_t *router,m_uint64_t paddr,m_uint32_t len)
{
   vm_instance_t *vm = router->vm;
   struct iofpga_data *d;

   /* Allocate private data structure */
   if (!(d = malloc(sizeof(*d)))) {
      fprintf(stderr,"IO_FPGA: out of memory\n");
      return(-1);
   }

   memset(d,0,sizeof(*d));
   d->router = router;

   vm_object_init(&d->vm_obj);
   d->vm_obj.name = "io_fpga";
   d->vm_obj.data = d;
   d->vm_obj.shutdown = (vm_shutdown_t)dev_c2600_iofpga_shutdown;

   /* Set device properties */
   dev_init(&d->dev);
   d->dev.name      = "io_fpga";
   d->dev.phys_addr = paddr;
   d->dev.phys_len  = len;
   d->dev.priv_data = d;
   d->dev.handler   = dev_c2600_iofpga_access;

   /* Map this device to the VM */
   vm_bind_device(router->vm,&d->dev);
   vm_object_add(vm,&d->vm_obj);
   return(0);
}
1	dpavlin	7	/*
2			* Cisco router simulation platform.
3			* Copyright (c) 2006 Christophe Fillot (cf@utc.fr)
4			*/
5
6			#include <stdio.h>
7			#include <stdlib.h>
8			#include <string.h>
9			#include <unistd.h>
10			#include <sys/types.h>
11			#include <termios.h>
12			#include <fcntl.h>
13			#include <pthread.h>
14
15			#include "ptask.h"
16			#include "cpu.h"
17			#include "vm.h"
18			#include "dynamips.h"
19			#include "memory.h"
20			#include "device.h"
21			#include "dev_vtty.h"
22			#include "nmc93c46.h"
23			#include "dev_c2600.h"
24
25			/* Debugging flags */
26			#define DEBUG_UNKNOWN 1
27			#define DEBUG_ACCESS 0
28
29			/* Definitions for Mainboard EEPROM */
30			#define EEPROM_MB_DOUT 3
31			#define EEPROM_MB_DIN 2
32			#define EEPROM_MB_CLK 1
33			#define EEPROM_MB_CS 0
34
35			/* Definitions for Network Modules EEPROM */
36			#define EEPROM_NM_DOUT 7
37			#define EEPROM_NM_DIN 6
38			#define EEPROM_NM_CLK 2
39			#define EEPROM_NM_CS 4
40
41			#define C2691_NET_IRQ_CLEARING_DELAY 16
42
43			/* IO FPGA structure */
44			struct iofpga_data {
45			vm_obj_t vm_obj;
46			struct vdevice dev;
47			c2600_t *router;
48
49			/*
50			* Used to introduce a "delay" before clearing the network interrupt
51			* on 3620/3640 platforms. Added due to a packet loss when using an
52			* Ethernet NM on these platforms.
53			*
54			* Anyway, we should rely on the device information with appropriate IRQ
55			* routing.
56			*/
57			int net_irq_clearing_count;
58
59			/* Interrupt mask*/
60			m_uint16_t intr_mask;
61			};
62
63			/* Mainboard EEPROM definition */
64			static const struct nmc93c46_eeprom_def eeprom_mb_def = {
65			EEPROM_MB_CLK, EEPROM_MB_CS,
66			EEPROM_MB_DIN, EEPROM_MB_DOUT,
67			};
68
69			/* Mainboard EEPROM */
70			static const struct nmc93c46_group eeprom_mb_group = {
71			1, 0, "Mainboard EEPROM", 0, { &eeprom_mb_def },
72			};
73
74			/* NM EEPROM definition */
75			static const struct nmc93c46_eeprom_def eeprom_nm_def = {
76			EEPROM_NM_CLK, EEPROM_NM_CS,
77			EEPROM_NM_DIN, EEPROM_NM_DOUT,
78			};
79
80			/* NM EEPROM */
81			static const struct nmc93c46_group eeprom_nm_group = {
82			1, 0, "NM EEPROM", 0, { &eeprom_nm_def },
83			};
84
85			/*
86			* dev_c2600_iofpga_access()
87			*/
88			static void *
89			dev_c2600_iofpga_access(cpu_gen_t cpu,struct vdevice dev,
90			m_uint32_t offset,u_int op_size,u_int op_type,
91			m_uint64_t *data)
92			{
93			struct iofpga_data *d = dev->priv_data;
94
95			if (op_type == MTS_READ)
96			*data = 0x0;
97
98			#if DEBUG_ACCESS
99			if (op_type == MTS_READ) {
100			cpu_log(cpu,"IO_FPGA","reading reg 0x%x at pc=0x%llx (size=%u)\n",
101			offset,cpu_get_pc(cpu),op_size);
102			} else {
103			cpu_log(cpu,"IO_FPGA",
104			"writing reg 0x%x at pc=0x%llx, data=0x%llx (size=%u)\n",
105			offset,cpu_get_pc(cpu),*data,op_size);
106			}
107			#endif
108
109			switch(offset) {
110			case 0x04:
111			if (op_type == MTS_READ)
112			*data = 0x00;
113			//vm_clear_irq(cpu->vm,C2600_NETIO_IRQ);
114			break;
115
116			/*
117			* Network Interrupt.
118			*
119			* Bit 0: slot 1.
120			* Bit 4: slot 0 (MB), port 0
121			* Bit 5: slot 0 (MB), port 1
122			* Other: AIM ? (error messages displayed)
123			*/
124			case 0x08:
125			if (op_type == MTS_READ)
126			*data = 0x31;
127			vm_clear_irq(cpu->vm,C2600_NETIO_IRQ);
128			break;
129
130			case 0x10:
131			case 0x14:
132			if (op_type == MTS_READ)
133			*data = 0xFFFFFFFF;
134			break;
135
136			/* Flash Related: 0x1y */
137			#if 1
138			case 0x0c:
139			if (op_type == MTS_READ)
140			*data = 0x10;
141			break;
142			#endif
143
144			/* NM EEPROM */
145			case 0x1c:
146			if (op_type == MTS_WRITE)
147			nmc93c46_write(&d->router->nm_eeprom_group,(u_int)(*data));
148			else
149			*data = nmc93c46_read(&d->router->nm_eeprom_group);
150			break;
151
152			#if DEBUG_UNKNOWN
153			default:
154			if (op_type == MTS_READ) {
155			cpu_log(cpu,"IO_FPGA",
156			"read from unknown addr 0x%x, pc=0x%llx (size=%u)\n",
157			offset,cpu_get_pc(cpu),op_size);
158			} else {
159			cpu_log(cpu,"IO_FPGA",
160			"write to unknown addr 0x%x, value=0x%llx, "
161			"pc=0x%llx (size=%u)\n",
162			offset,*data,cpu_get_pc(cpu),op_size);
163			}
164			#endif
165			}
166
167			return NULL;
168			}
169
170			/* Initialize EEPROM groups */
171			void c2600_init_eeprom_groups(c2600_t *router)
172			{
173			/* Initialize Mainboard EEPROM */
174			router->mb_eeprom_group = eeprom_mb_group;
175			router->mb_eeprom_group.eeprom[0] = &router->mb_eeprom;
176			router->mb_eeprom.data = NULL;
177			router->mb_eeprom.len = 0;
178
179			/* EEPROM for NM slot 1 */
180			router->nm_eeprom_group = eeprom_nm_group;
181			router->nm_eeprom_group.eeprom[0] = &router->nm_bay[1].eeprom;
182			}
183
184			/* Shutdown the IO FPGA device */
185			void dev_c2600_iofpga_shutdown(vm_instance_t vm,struct iofpga_data d)
186			{
187			if (d != NULL) {
188			/* Remove the device */
189			dev_remove(vm,&d->dev);
190
191			/* Free the structure itself */
192			free(d);
193			}
194			}
195
196			/*
197			* dev_c2600_iofpga_init()
198			*/
199			int dev_c2600_iofpga_init(c2600_t *router,m_uint64_t paddr,m_uint32_t len)
200			{
201			vm_instance_t *vm = router->vm;
202			struct iofpga_data *d;
203
204			/* Allocate private data structure */
205			if (!(d = malloc(sizeof(*d)))) {
206			fprintf(stderr,"IO_FPGA: out of memory\n");
207			return(-1);
208			}
209
210			memset(d,0,sizeof(*d));
211			d->router = router;
212
213			vm_object_init(&d->vm_obj);
214			d->vm_obj.name = "io_fpga";
215			d->vm_obj.data = d;
216			d->vm_obj.shutdown = (vm_shutdown_t)dev_c2600_iofpga_shutdown;
217
218			/* Set device properties */
219			dev_init(&d->dev);
220			d->dev.name = "io_fpga";
221			d->dev.phys_addr = paddr;
222			d->dev.phys_len = len;
223			d->dev.priv_data = d;
224			d->dev.handler = dev_c2600_iofpga_access;
225
226			/* Map this device to the VM */
227			vm_bind_device(router->vm,&d->dev);
228			vm_object_add(vm,&d->vm_obj);
229			return(0);
230			}