/[dynamips]/upstream/dynamips-0.2.7-RC1/cpu.h
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Annotation of /upstream/dynamips-0.2.7-RC1/cpu.h

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Revision 7 - (hide annotations)
Sat Oct 6 16:23:47 2007 UTC (12 years, 2 months ago) by dpavlin
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dynamips-0.2.7-RC1

1 dpavlin 1 /*
2 dpavlin 7 * Cisco router simulation platform.
3 dpavlin 1 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4     */
5    
6     #ifndef __CPU_H__
7     #define __CPU_H__
8    
9 dpavlin 7 #include <pthread.h>
10     #include "utils.h"
11    
12     /* Forward declaration for generic CPU type */
13     typedef struct cpu_gen cpu_gen_t;
14    
15 dpavlin 1 #include "mips64.h"
16 dpavlin 7 #include "mips64_cp0.h"
17     #include "ppc32.h"
18 dpavlin 1
19 dpavlin 7 /* Possible CPU types */
20     enum {
21     CPU_TYPE_MIPS64 = 1,
22     CPU_TYPE_PPC32,
23     };
24    
25     /* Virtual CPU states */
26     enum {
27     CPU_STATE_RUNNING = 0,
28     CPU_STATE_HALTED,
29     CPU_STATE_SUSPENDED,
30     };
31    
32     /* Maximum results for idle pc */
33     #define CPU_IDLE_PC_MAX_RES 10
34    
35     /* Idle PC proposed value */
36     struct cpu_idle_pc {
37     m_uint64_t pc;
38     u_int count;
39     };
40    
41     /* Number of recorded memory accesses (power of two) */
42     #define MEMLOG_COUNT 16
43    
44     typedef struct memlog_access memlog_access_t;
45     struct memlog_access {
46     m_uint64_t iaddr;
47     m_uint64_t vaddr;
48     m_uint64_t data;
49     m_uint32_t data_valid;
50     m_uint32_t op_size;
51     m_uint32_t op_type;
52     };
53    
54     /* Generic CPU definition */
55     struct cpu_gen {
56     /* CPU type and identifier for MP systems */
57     u_int type,id;
58    
59     /* CPU states */
60     volatile u_int state,prev_state;
61     volatile m_uint64_t seq_state;
62    
63     /* Thread running this CPU */
64     pthread_t cpu_thread;
65     int cpu_thread_running;
66    
67     /* "Idle" loop management */
68     u_int idle_count,idle_max,idle_sleep_time;
69     pthread_mutex_t idle_mutex;
70     pthread_cond_t idle_cond;
71    
72     /* VM instance */
73     vm_instance_t *vm;
74    
75     /* Next CPU in group */
76     cpu_gen_t *next;
77    
78     /* Idle PC proposal */
79     struct cpu_idle_pc idle_pc_prop[CPU_IDLE_PC_MAX_RES];
80     u_int idle_pc_prop_count;
81    
82     /* Specific CPU part */
83     union {
84     cpu_mips_t mips64_cpu;
85     cpu_ppc_t ppc32_cpu;
86     }sp;
87    
88     /* Methods */
89     void (*reg_set)(cpu_gen_t *cpu,u_int reg_index,m_uint64_t val);
90     void (*reg_dump)(cpu_gen_t *cpu);
91     void (*mmu_dump)(cpu_gen_t *cpu);
92     void (*mmu_raw_dump)(cpu_gen_t *cpu);
93     void (*add_breakpoint)(cpu_gen_t *cpu,m_uint64_t addr);
94     void (*remove_breakpoint)(cpu_gen_t *cpu,m_uint64_t addr);
95     void (*set_idle_pc)(cpu_gen_t *cpu,m_uint64_t addr);
96     void (*get_idling_pc)(cpu_gen_t *cpu);
97     void (*mts_rebuild)(cpu_gen_t *cpu);
98     void (*mts_show_stats)(cpu_gen_t *cpu);
99    
100     /* Memory access log for fault debugging */
101     u_int memlog_pos;
102     memlog_access_t memlog_array[MEMLOG_COUNT];
103     };
104    
105 dpavlin 1 /* CPU group definition */
106     typedef struct cpu_group cpu_group_t;
107     struct cpu_group {
108     char *name;
109 dpavlin 7 cpu_gen_t *cpu_list;
110 dpavlin 1 void *priv_data;
111     };
112    
113 dpavlin 7 #define CPU_MIPS64(cpu) (&(cpu)->sp.mips64_cpu)
114     #define CPU_PPC32(cpu) (&(cpu)->sp.ppc32_cpu)
115    
116     /* Get CPU instruction pointer */
117     static forced_inline m_uint64_t cpu_get_pc(cpu_gen_t *cpu)
118     {
119     switch(cpu->type) {
120     case CPU_TYPE_MIPS64:
121     return(CPU_MIPS64(cpu)->pc);
122     case CPU_TYPE_PPC32:
123     return((m_uint64_t)CPU_PPC32(cpu)->ia);
124     default:
125     return(0);
126     }
127     }
128    
129     /* Get CPU performance counter */
130     static forced_inline m_uint64_t cpu_get_perf_counter(cpu_gen_t *cpu)
131     {
132     switch(cpu->type) {
133     case CPU_TYPE_MIPS64:
134     return(CPU_MIPS64(cpu)->perf_counter);
135     case CPU_TYPE_PPC32:
136     return(CPU_PPC32(cpu)->perf_counter);
137     default:
138     return(0);
139     }
140     }
141    
142 dpavlin 1 /* Find a CPU in a group given its ID */
143 dpavlin 7 cpu_gen_t *cpu_group_find_id(cpu_group_t *group,u_int id);
144 dpavlin 1
145     /* Find the highest CPU ID in a CPU group */
146     int cpu_group_find_highest_id(cpu_group_t *group,u_int *highest_id);
147    
148     /* Add a CPU in a CPU group */
149 dpavlin 7 int cpu_group_add(cpu_group_t *group,cpu_gen_t *cpu);
150 dpavlin 1
151     /* Create a new CPU group */
152     cpu_group_t *cpu_group_create(char *name);
153    
154     /* Delete a CPU group */
155     void cpu_group_delete(cpu_group_t *group);
156    
157     /* Rebuild the MTS subsystem for a CPU group */
158     int cpu_group_rebuild_mts(cpu_group_t *group);
159    
160     /* Log a message for a CPU */
161 dpavlin 7 void cpu_log(cpu_gen_t *cpu,char *module,char *format,...);
162 dpavlin 1
163     /* Create a new CPU */
164 dpavlin 7 cpu_gen_t *cpu_create(vm_instance_t *vm,u_int type,u_int id);
165 dpavlin 1
166     /* Delete a CPU */
167 dpavlin 7 void cpu_delete(cpu_gen_t *cpu);
168 dpavlin 1
169     /* Start a CPU */
170 dpavlin 7 void cpu_start(cpu_gen_t *cpu);
171 dpavlin 1
172     /* Stop a CPU */
173 dpavlin 7 void cpu_stop(cpu_gen_t *cpu);
174 dpavlin 1
175     /* Start all CPUs of a CPU group */
176     void cpu_group_start_all_cpu(cpu_group_t *group);
177    
178     /* Stop all CPUs of a CPU group */
179     void cpu_group_stop_all_cpu(cpu_group_t *group);
180    
181     /* Set a state of all CPUs of a CPU group */
182     void cpu_group_set_state(cpu_group_t *group,u_int state);
183    
184     /* Synchronize on CPUs (all CPUs must be inactive) */
185     int cpu_group_sync_state(cpu_group_t *group);
186    
187     /* Save state of all CPUs */
188     int cpu_group_save_state(cpu_group_t *group);
189    
190     /* Restore state of all CPUs */
191     int cpu_group_restore_state(cpu_group_t *group);
192    
193 dpavlin 7 /* Virtual idle loop */
194     void cpu_idle_loop(cpu_gen_t *cpu);
195    
196     /* Break idle wait state */
197     void cpu_idle_break_wait(cpu_gen_t *cpu);
198    
199 dpavlin 1 #endif

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