/[dynamips]/upstream/dynamips-0.2.6-RC1/dev_c7200.h
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Contents of /upstream/dynamips-0.2.6-RC1/dev_c7200.h

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Revision 2 - (show annotations)
Sat Oct 6 16:03:58 2007 UTC (12 years, 1 month ago) by dpavlin
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File size: 11249 byte(s)
import dynamips-0.2.6-RC1

1 /*
2 * Cisco 7200 (Predator) simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 *
5 * Generic Cisco 7200 routines and definitions (EEPROM,...).
6 *
7 * Notes on IRQs (see "show stack"):
8 *
9 * - triggering IRQ 3: we get indefinitely (for each slot):
10 * "Error: Unexpected NM Interrupt received from slot: 6"
11 *
12 * - triggering IRQ 4: GT64010 reg access: probably "DMA/Timer Interrupt"
13 *
14 * - triggering IRQ 6: we get (probably "OIR/Error Interrupt")
15 * %ERR-1-PERR: PCI bus parity error
16 * %ERR-1-SERR: PCI bus system/parity error
17 * %ERR-1-FATAL: Fatal error interrupt, No reloading
18 * err_stat=0x0, err_enable=0x0, mgmt_event=0xFFFFFFFF
19 *
20 */
21
22 #ifndef __DEV_C7200_H__
23 #define __DEV_C7200_H__
24
25 #include <pthread.h>
26
27 #include "utils.h"
28 #include "net.h"
29 #include "device.h"
30 #include "pci_dev.h"
31 #include "nmc93c46.h"
32 #include "net_io.h"
33 #include "vm.h"
34
35 /* Default C7200 parameters */
36 #define C7200_DEFAULT_NPE_TYPE "npe-200"
37 #define C7200_DEFAULT_MIDPLANE "vxr"
38 #define C7200_DEFAULT_RAM_SIZE 256
39 #define C7200_DEFAULT_ROM_SIZE 4
40 #define C7200_DEFAULT_NVRAM_SIZE 128
41 #define C7200_DEFAULT_CONF_REG 0x2102
42 #define C7200_DEFAULT_CLOCK_DIV 4
43 #define C7200_DEFAULT_RAM_MMAP 1
44 #define C7200_DEFAULT_DISK0_SIZE 64
45 #define C7200_DEFAULT_DISK1_SIZE 0
46
47 /* 6 slots + 1 I/O card */
48 #define C7200_MAX_PA_BAYS 7
49
50 /* C7200 DUART Interrupt */
51 #define C7200_DUART_IRQ 5
52
53 /* C7200 Network I/O Interrupt */
54 #define C7200_NETIO_IRQ 2
55
56 /* C7200 PA Management Interrupt handler */
57 #define C7200_PA_MGMT_IRQ 3
58
59 /* C7200 GT64k DMA/Timer Interrupt */
60 #define C7200_GT64K_IRQ 4
61
62 /* C7200 Error/OIR Interrupt */
63 #define C7200_OIR_IRQ 6
64
65 /* C7200 base ram limit (256 Mb) */
66 #define C7200_BASE_RAM_LIMIT 256
67
68 /* C7200 common device addresses */
69 #define C7200_GT64K_ADDR 0x14000000ULL
70 #define C7200_GT64K_SEC_ADDR 0x15000000ULL
71 #define C7200_BOOTFLASH_ADDR 0x1a000000ULL
72 #define C7200_NVRAM_ADDR 0x1e000000ULL
73 #define C7200_NPEG1_NVRAM_ADDR 0x1e400000ULL
74 #define C7200_MPFPGA_ADDR 0x1e800000ULL
75 #define C7200_IOFPGA_ADDR 0x1e840000ULL
76 #define C7200_BITBUCKET_ADDR 0x1f000000ULL
77 #define C7200_ROM_ADDR 0x1fc00000ULL
78 #define C7200_IOMEM_ADDR 0x20000000ULL
79 #define C7200_SRAM_ADDR 0x4b000000ULL
80 #define C7200_PCI_IO_ADDR 0x100000000ULL
81
82 /* Reserved space for ROM in NVRAM */
83 #define C7200_NVRAM_ROM_RES_SIZE 2048
84
85 /* C7200 physical address bus mask: keep only the lower 33 bits */
86 #define C7200_ADDR_BUS_MASK 0x1ffffffffULL
87
88 /* C7200 ELF Platform ID */
89 #define C7200_ELF_MACHINE_ID 0x19
90
91 /* C7200 router */
92 typedef struct c7200_router c7200_t;
93
94 /* C7200 EEPROM */
95 struct c7200_eeprom {
96 char *name;
97 m_uint16_t *data;
98 u_int len;
99 };
100
101 /* Prototype of NPE driver initialization function */
102 typedef int (*c7200_npe_init_fn)(c7200_t *router);
103
104 /* Prototype of PA driver initialization function */
105 typedef int (*c7200_pa_init_fn)(c7200_t *router,char *name,u_int pa_bay);
106
107 /* Prototype of PA driver shutdown function */
108 typedef int (*c7200_pa_shutdown_fn)(c7200_t *router,u_int pa_bay);
109
110 /* Prototype of PA NIO set function */
111 typedef int (*c7200_pa_set_nio_fn)(c7200_t *router,u_int pa_bay,u_int port_id,
112 netio_desc_t *nio);
113
114 /* Prototype of PA NIO unset function */
115 typedef int (*c7200_pa_unset_nio_fn)(c7200_t *router,u_int pa_bay,
116 u_int port_id);
117
118 /* Prototype of NM NIO show info function */
119 typedef int (*c7200_pa_show_info_fn)(c7200_t *router,u_int pa_bay);
120
121 /* C7200 Port Adapter Driver */
122 struct c7200_pa_driver {
123 char *dev_type;
124 int supported;
125 c7200_pa_init_fn pa_init;
126 c7200_pa_shutdown_fn pa_shutdown;
127 c7200_pa_set_nio_fn pa_set_nio;
128 c7200_pa_unset_nio_fn pa_unset_nio;
129 c7200_pa_show_info_fn pa_show_info;
130 };
131
132 /* C7200 NIO binding to a slot/port */
133 struct c7200_nio_binding {
134 netio_desc_t *nio;
135 u_int port_id;
136 struct c7200_nio_binding *prev,*next;
137 };
138
139 /* C7200 PA bay */
140 struct c7200_pa_bay {
141 char *dev_name; /* Device Name */
142 char *dev_type; /* Device Type */
143 struct pci_bus *pci_map; /* PCI bus */
144 struct nmc93c46_eeprom_def eeprom; /* PA EEPROM */
145 struct c7200_pa_driver *pa_driver; /* PA driver */
146 void *drv_info; /* Private driver info */
147 struct c7200_nio_binding *nio_list; /* NIO bindings to ports */
148 };
149
150 /* C7200 NPE Driver */
151 struct c7200_npe_driver {
152 char *npe_type;
153 c7200_npe_init_fn npe_init;
154 int max_ram_size;
155 int supported;
156 m_uint64_t nvram_addr;
157 int clpd6729_pci_bus;
158 int clpd6729_pci_dev;
159 int dec21140_pci_bus;
160 int dec21140_pci_dev;
161 };
162
163 /* C7200 router */
164 struct c7200_router {
165 /* Midplane type (standard,VXR) and chassis MAC address */
166 char *midplane_type;
167 int midplane_version;
168 n_eth_addr_t mac_addr;
169
170 /* Associated VM instance */
171 vm_instance_t *vm;
172
173 /* NPE and PA information */
174 struct c7200_npe_driver *npe_driver;
175 struct c7200_pa_bay pa_bay[C7200_MAX_PA_BAYS];
176 m_uint8_t oir_status;
177
178 /* Hidden I/O bridge hack to support PCMCIA */
179 struct pci_bridge *io_pci_bridge;
180 struct pci_bus *pcmcia_bus;
181
182 /* Midplane EEPROM can be modified to change the chassis MAC address... */
183 m_uint16_t mp_eeprom_data[64];
184
185 struct nmc93c46_eeprom_def cpu_eeprom; /* CPU EEPROM */
186 struct nmc93c46_eeprom_def mp_eeprom; /* Midplane EEPROM */
187 struct nmc93c46_eeprom_def pem_eeprom; /* Power Entry Module EEPROM */
188
189 struct nmc93c46_group sys_eeprom_g1; /* EEPROMs for CPU and Midplane */
190 struct nmc93c46_group sys_eeprom_g2; /* EEPROM for PEM */
191 struct nmc93c46_group pa_eeprom_g1; /* EEPROMs for bays 0, 1, 3, 4 */
192 struct nmc93c46_group pa_eeprom_g2; /* EEPROMs for bays 2, 5, 6 */
193 };
194
195 /* Initialize EEPROM groups */
196 void c7200_init_eeprom_groups(c7200_t *router);
197
198 /* Find an EEPROM in the specified array */
199 struct c7200_eeprom *c7200_get_eeprom(struct c7200_eeprom *eeproms,char *name);
200
201 /* Get an EEPROM for a given NPE model */
202 struct c7200_eeprom *c7200_get_cpu_eeprom(char *npe_name);
203
204 /* Get an EEPROM for a given midplane model */
205 struct c7200_eeprom *c7200_get_midplane_eeprom(char *midplane_name);
206
207 /* Get a PEM EEPROM for a given NPE model */
208 struct c7200_eeprom *c7200_get_pem_eeprom(char *npe_name);
209
210 /* Create a new router instance */
211 c7200_t *c7200_create_instance(char *name,int instance_id);
212
213 /* Delete a router instance */
214 int c7200_delete_instance(char *name);
215
216 /* Delete all router instances */
217 int c7200_delete_all_instances(void);
218
219 /* Save configuration of a C7200 instance */
220 void c7200_save_config(c7200_t *router,FILE *fd);
221
222 /* Save configurations of all C7200 instances */
223 void c7200_save_config_all(FILE *fd);
224
225 /* Set PA EEPROM definition */
226 int c7200_pa_set_eeprom(c7200_t *router,u_int pa_bay,
227 const struct c7200_eeprom *eeprom);
228
229 /* Unset PA EEPROM definition (empty bay) */
230 int c7200_pa_unset_eeprom(c7200_t *router,u_int pa_bay);
231
232 /* Check if a bay has a port adapter */
233 int c7200_pa_check_eeprom(c7200_t *router,u_int pa_bay);
234
235 /* Get bay info */
236 struct c7200_pa_bay *c7200_pa_get_info(c7200_t *router,u_int pa_bay);
237
238 /* Get PA type */
239 char *c7200_pa_get_type(c7200_t *router,u_int pa_bay);
240
241 /* Get driver info about the specified slot */
242 void *c7200_pa_get_drvinfo(c7200_t *router,u_int pa_bay);
243
244 /* Set driver info for the specified slot */
245 int c7200_pa_set_drvinfo(c7200_t *router,u_int pa_bay,void *drv_info);
246
247 /* Add a PA binding */
248 int c7200_pa_add_binding(c7200_t *router,char *dev_type,u_int pa_bay);
249
250 /* Remove a PA binding */
251 int c7200_pa_remove_binding(c7200_t *router,u_int pa_bay);
252
253 /* Find a NIO binding */
254 struct c7200_nio_binding *
255 c7200_pa_find_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
256
257 /* Add a network IO binding */
258 int c7200_pa_add_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id,
259 char *nio_name);
260
261 /* Remove a NIO binding */
262 int c7200_pa_remove_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
263
264 /* Remove all NIO bindings for the specified PA */
265 int c7200_pa_remove_all_nio_bindings(c7200_t *router,u_int pa_bay);
266
267 /* Enable a Network IO descriptor for a Port Adapter */
268 int c7200_pa_enable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
269
270 /* Disable Network IO descriptor of a Port Adapter */
271 int c7200_pa_disable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
272
273 /* Enable all NIO of the specified PA */
274 int c7200_pa_enable_all_nio(c7200_t *router,u_int pa_bay);
275
276 /* Disable all NIO of the specified PA */
277 int c7200_pa_disable_all_nio(c7200_t *router,u_int pa_bay);
278
279 /* Initialize a Port Adapter */
280 int c7200_pa_init(c7200_t *router,u_int pa_bay);
281
282 /* Shutdown a Port Adapter */
283 int c7200_pa_shutdown(c7200_t *router,u_int pa_bay);
284
285 /* Shutdown all PA of a router */
286 int c7200_pa_shutdown_all(c7200_t *router);
287
288 /* Show info about all NMs */
289 int c7200_pa_show_all_info(c7200_t *router);
290
291 /* Create a Port Adapter (command line) */
292 int c7200_cmd_pa_create(c7200_t *router,char *str);
293
294 /* Add a Network IO descriptor binding (command line) */
295 int c7200_cmd_add_nio(c7200_t *router,char *str);
296
297 /* Show the list of available PA drivers */
298 void c7200_pa_show_drivers(void);
299
300 /* Get an NPE driver */
301 struct c7200_npe_driver *c7200_npe_get_driver(char *npe_type);
302
303 /* Set the NPE type */
304 int c7200_npe_set_type(c7200_t *router,char *npe_type);
305
306 /* Show the list of available NPE drivers */
307 void c7200_npe_show_drivers(void);
308
309 /* Set Midplane type */
310 int c7200_midplane_set_type(c7200_t *router,char *midplane_type);
311
312 /* Set chassis MAC address */
313 int c7200_midplane_set_mac_addr(c7200_t *router,char *mac_addr);
314
315 /* Show C7200 hardware info */
316 void c7200_show_hardware(c7200_t *router);
317
318 /* Initialize default parameters for a C7200 */
319 void c7200_init_defaults(c7200_t *router);
320
321 /* Initialize the C7200 Platform */
322 int c7200_init_platform(c7200_t *router);
323
324 /* Boot the IOS image */
325 int c7200_boot_ios(c7200_t *router);
326
327 /* Initialize a Cisco 7200 instance */
328 int c7200_init_instance(c7200_t *router);
329
330 /* Stop a Cisco 7200 instance */
331 int c7200_stop_instance(c7200_t *router);
332
333 /* Trigger an OIR event */
334 int c7200_trigger_oir_event(c7200_t *router,u_int slot_mask);
335
336 /* Initialize a new PA while the virtual router is online (OIR) */
337 int c7200_pa_init_online(c7200_t *router,u_int pa_bay);
338
339 /* Stop a PA while the virtual router is online (OIR) */
340 int c7200_pa_stop_online(c7200_t *router,u_int pa_bay);
341
342 /* dev_c7200_iofpga_init() */
343 int dev_c7200_iofpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
344
345 /* dev_mpfpga_init() */
346 int dev_c7200_mpfpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
347
348 /* PA drivers */
349 extern struct c7200_pa_driver dev_c7200_io_fe_driver;
350 extern struct c7200_pa_driver dev_c7200_pa_fe_tx_driver;
351 extern struct c7200_pa_driver dev_c7200_pa_4e_driver;
352 extern struct c7200_pa_driver dev_c7200_pa_8e_driver;
353 extern struct c7200_pa_driver dev_c7200_pa_4t_driver;
354 extern struct c7200_pa_driver dev_c7200_pa_8t_driver;
355 extern struct c7200_pa_driver dev_c7200_pa_a1_driver;
356 extern struct c7200_pa_driver dev_c7200_pa_pos_oc3_driver;
357 extern struct c7200_pa_driver dev_c7200_pa_4b_driver;
358
359 #endif

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