upstream/dynamips-0.2.5/nmc93c46.h

/*
 * Simulates a NMC93C46 Serial EEPROM.
 * Copyright (c) 2005,2006 Christophe Fillot.
 */

#ifndef __NMC93C46_H__
#define __NMC93C46_H__

#include <sys/types.h>
#include "utils.h"

/* 8 groups with 4 differents bits (clock,select,data_in,data_out) */
#define NMC93C46_MAX_EEPROM_PER_GROUP  8

/* NMC93C46 EEPROM command bit length */
#define NMC93C46_CMD_BITLEN   9

/* NMC93C46 EEPROM data bit length */
#define NMC93C46_CMD_DATALEN  16

/* NMC93C46 EEPROM commands:     SB (1) OP(2) Address(5) */
#define NMC93C46_CMD_CONTROL     (0x1 | 0x0)
#define NMC93C46_CMD_WRDS        (0x1 | 0x0 | 0x00)
#define NMC93C46_CMD_ERASE_ALL   (0x1 | 0x0 | 0x08)
#define NMC93C46_CMD_WRITE_ALL   (0x1 | 0x0 | 0x10)
#define NMC93C46_CMD_WREN        (0x1 | 0x0 | 0x18)
#define NMC93C46_CMD_READ        (0x1 | 0x2)
#define NMC93C46_CMD_WRITE       (0x1 | 0x4)
#define NMC93C46_CMD_ERASE       (0x1 | 0x6)

struct nmc93c46_eeprom_def {
   u_int clock_bit;
   u_int select_bit;
   u_int din_bit;
   u_int dout_bit;
   m_uint16_t *data;
   u_int data_len;
};

struct nmc93c46_eeprom_state {   
   u_int cmd_len;
   u_int cmd_val;
   u_int state;
   u_int dataout_pos;
   u_int dataout_val;
};

struct nmc93c46_group {
   u_int nr_eeprom;
   u_int eeprom_reg;
   char *description;
   int debug;
   struct nmc93c46_eeprom_def *def[NMC93C46_MAX_EEPROM_PER_GROUP];
   struct nmc93c46_eeprom_state state[NMC93C46_MAX_EEPROM_PER_GROUP];
};

/* Handle write */
void nmc93c46_write(struct nmc93c46_group *g,u_int data);

/* Handle read */
u_int nmc93c46_read(struct nmc93c46_group *p);

#endif /* __NMC93C46_H__ */
1	dpavlin	1	/*
2			* Simulates a NMC93C46 Serial EEPROM.
3			* Copyright (c) 2005,2006 Christophe Fillot.
4			*/
5
6			#ifndef __NMC93C46_H__
7			#define __NMC93C46_H__
8
9			#include <sys/types.h>
10			#include "utils.h"
11
12			/* 8 groups with 4 differents bits (clock,select,data_in,data_out) */
13			#define NMC93C46_MAX_EEPROM_PER_GROUP 8
14
15			/* NMC93C46 EEPROM command bit length */
16			#define NMC93C46_CMD_BITLEN 9
17
18			/* NMC93C46 EEPROM data bit length */
19			#define NMC93C46_CMD_DATALEN 16
20
21			/* NMC93C46 EEPROM commands: SB (1) OP(2) Address(5) */
22			#define NMC93C46_CMD_CONTROL (0x1 \| 0x0)
23			#define NMC93C46_CMD_WRDS (0x1 \| 0x0 \| 0x00)
24			#define NMC93C46_CMD_ERASE_ALL (0x1 \| 0x0 \| 0x08)
25			#define NMC93C46_CMD_WRITE_ALL (0x1 \| 0x0 \| 0x10)
26			#define NMC93C46_CMD_WREN (0x1 \| 0x0 \| 0x18)
27			#define NMC93C46_CMD_READ (0x1 \| 0x2)
28			#define NMC93C46_CMD_WRITE (0x1 \| 0x4)
29			#define NMC93C46_CMD_ERASE (0x1 \| 0x6)
30
31			struct nmc93c46_eeprom_def {
32			u_int clock_bit;
33			u_int select_bit;
34			u_int din_bit;
35			u_int dout_bit;
36			m_uint16_t *data;
37			u_int data_len;
38			};
39
40			struct nmc93c46_eeprom_state {
41			u_int cmd_len;
42			u_int cmd_val;
43			u_int state;
44			u_int dataout_pos;
45			u_int dataout_val;
46			};
47
48			struct nmc93c46_group {
49			u_int nr_eeprom;
50			u_int eeprom_reg;
51			char *description;
52			int debug;
53			struct nmc93c46_eeprom_def *def[NMC93C46_MAX_EEPROM_PER_GROUP];
54			struct nmc93c46_eeprom_state state[NMC93C46_MAX_EEPROM_PER_GROUP];
55			};
56
57			/* Handle write */
58			void nmc93c46_write(struct nmc93c46_group *g,u_int data);
59
60			/* Handle read */
61			u_int nmc93c46_read(struct nmc93c46_group *p);
62
63			#endif /* __NMC93C46_H__ */