/[dynamips]/upstream/dynamips-0.2.5/dev_c7200.h
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Contents of /upstream/dynamips-0.2.5/dev_c7200.h

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Revision 1 - (show annotations)
Sat Oct 6 16:01:44 2007 UTC (12 years, 2 months ago) by dpavlin
File MIME type: text/plain
File size: 11020 byte(s)
import 0.2.5 from upstream

1 /*
2 * Cisco 7200 (Predator) simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 *
5 * Generic Cisco 7200 routines and definitions (EEPROM,...).
6 *
7 * Notes on IRQs (see "show stack"):
8 *
9 * - triggering IRQ 3: we get indefinitely (for each slot):
10 * "Error: Unexpected NM Interrupt received from slot: 6"
11 *
12 * - triggering IRQ 4: GT64010 reg access: probably "DMA/Timer Interrupt"
13 *
14 * - triggering IRQ 6: we get (probably "OIR/Error Interrupt")
15 * %ERR-1-PERR: PCI bus parity error
16 * %ERR-1-SERR: PCI bus system/parity error
17 * %ERR-1-FATAL: Fatal error interrupt, No reloading
18 * err_stat=0x0, err_enable=0x0, mgmt_event=0xFFFFFFFF
19 *
20 */
21
22 #ifndef __DEV_C7200_H__
23 #define __DEV_C7200_H__
24
25 #include <pthread.h>
26
27 #include "utils.h"
28 #include "net.h"
29 #include "device.h"
30 #include "pci_dev.h"
31 #include "nmc93c46.h"
32 #include "net_io.h"
33 #include "vm.h"
34
35 /* Default C7200 parameters */
36 #define C7200_DEFAULT_NPE_TYPE "npe-200"
37 #define C7200_DEFAULT_MIDPLANE "vxr"
38 #define C7200_DEFAULT_RAM_SIZE 256
39 #define C7200_DEFAULT_ROM_SIZE 4
40 #define C7200_DEFAULT_NVRAM_SIZE 128
41 #define C7200_DEFAULT_CONF_REG 0x2102
42 #define C7200_DEFAULT_CLOCK_DIV 4
43 #define C7200_DEFAULT_RAM_MMAP 1
44 #define C7200_DEFAULT_DISK0_SIZE 64
45 #define C7200_DEFAULT_DISK1_SIZE 0
46
47 /* 6 slots + 1 I/O card */
48 #define C7200_MAX_PA_BAYS 7
49
50 /* C7200 DUART Interrupt */
51 #define C7200_DUART_IRQ 5
52
53 /* C7200 Network I/O Interrupt */
54 #define C7200_NETIO_IRQ 2
55
56 /* C7200 PA Management Interrupt handler */
57 #define C7200_PA_MGMT_IRQ 3
58
59 /* C7200 GT64k DMA/Timer Interrupt */
60 #define C7200_GT64K_IRQ 4
61
62 /* C7200 Error/OIR Interrupt */
63 #define C7200_OIR_IRQ 6
64
65 /* C7200 base ram limit (256 Mb) */
66 #define C7200_BASE_RAM_LIMIT 256
67
68 /* C7200 common device addresses */
69 #define C7200_GT64K_ADDR 0x14000000ULL
70 #define C7200_GT64K_SEC_ADDR 0x15000000ULL
71 #define C7200_BOOTFLASH_ADDR 0x1a000000ULL
72 #define C7200_NVRAM_ADDR 0x1e000000ULL
73 #define C7200_NPEG1_NVRAM_ADDR 0x1e400000ULL
74 #define C7200_MPFPGA_ADDR 0x1e800000ULL
75 #define C7200_IOFPGA_ADDR 0x1e840000ULL
76 #define C7200_BITBUCKET_ADDR 0x1f000000ULL
77 #define C7200_ROM_ADDR 0x1fc00000ULL
78 #define C7200_IOMEM_ADDR 0x20000000ULL
79 #define C7200_SRAM_ADDR 0x4b000000ULL
80 #define C7200_PCI_IO_ADDR 0x100000000ULL
81
82 /* Reserved space for ROM in NVRAM */
83 #define C7200_NVRAM_ROM_RES_SIZE 2048
84
85 /* C7200 physical address bus mask: keep only the lower 33 bits */
86 #define C7200_ADDR_BUS_MASK 0x1ffffffffULL
87
88 /* C7200 ELF Platform ID */
89 #define C7200_ELF_MACHINE_ID 0x19
90
91 /* C7200 router */
92 typedef struct c7200_router c7200_t;
93
94 /* C7200 EEPROM */
95 struct c7200_eeprom {
96 char *name;
97 m_uint16_t *data;
98 u_int len;
99 };
100
101 /* Prototype of NPE driver initialization function */
102 typedef int (*c7200_npe_init_fn)(c7200_t *router);
103
104 /* Prototype of PA driver initialization function */
105 typedef int (*c7200_pa_init_fn)(c7200_t *router,char *name,u_int pa_bay);
106
107 /* Prototype of PA driver shutdown function */
108 typedef int (*c7200_pa_shutdown_fn)(c7200_t *router,u_int pa_bay);
109
110 /* Prototype of PA NIO set function */
111 typedef int (*c7200_pa_set_nio_fn)(c7200_t *router,u_int pa_bay,u_int port_id,
112 netio_desc_t *nio);
113
114 /* Prototype of PA NIO unset function */
115 typedef int (*c7200_pa_unset_nio_fn)(c7200_t *router,u_int pa_bay,
116 u_int port_id);
117
118 /* C7200 Port Adapter Driver */
119 struct c7200_pa_driver {
120 char *dev_type;
121 int supported;
122 c7200_pa_init_fn pa_init;
123 c7200_pa_shutdown_fn pa_shutdown;
124 c7200_pa_set_nio_fn pa_set_nio;
125 c7200_pa_unset_nio_fn pa_unset_nio;
126 };
127
128 /* C7200 NIO binding to a slot/port */
129 struct c7200_nio_binding {
130 netio_desc_t *nio;
131 u_int port_id;
132 struct c7200_nio_binding *prev,*next;
133 };
134
135 /* C7200 PA bay */
136 struct c7200_pa_bay {
137 char *dev_name; /* Device Name */
138 char *dev_type; /* Device Type */
139 struct pci_bus *pci_map; /* PCI bus */
140 struct nmc93c46_eeprom_def eeprom; /* PA EEPROM */
141 struct c7200_pa_driver *pa_driver; /* PA driver */
142 void *drv_info; /* Private driver info */
143 struct c7200_nio_binding *nio_list; /* NIO bindings to ports */
144 };
145
146 /* C7200 NPE Driver */
147 struct c7200_npe_driver {
148 char *npe_type;
149 c7200_npe_init_fn npe_init;
150 int max_ram_size;
151 int supported;
152 m_uint64_t nvram_addr;
153 int clpd6729_pci_bus;
154 int clpd6729_pci_dev;
155 int dec21140_pci_bus;
156 int dec21140_pci_dev;
157 };
158
159 /* C7200 router */
160 struct c7200_router {
161 /* Midplane type (standard,VXR) and chassis MAC address */
162 char *midplane_type;
163 int midplane_version;
164 n_eth_addr_t mac_addr;
165
166 /* Associated VM instance */
167 vm_instance_t *vm;
168
169 /* NPE and PA information */
170 struct c7200_npe_driver *npe_driver;
171 struct c7200_pa_bay pa_bay[C7200_MAX_PA_BAYS];
172 m_uint8_t oir_status;
173
174 /* Hidden I/O bridge hack to support PCMCIA */
175 struct pci_bridge *io_pci_bridge;
176 struct pci_bus *pcmcia_bus;
177
178 /* Midplane EEPROM can be modified to change the chassis MAC address... */
179 m_uint16_t mp_eeprom_data[64];
180
181 struct nmc93c46_eeprom_def cpu_eeprom; /* CPU EEPROM */
182 struct nmc93c46_eeprom_def mp_eeprom; /* Midplane EEPROM */
183 struct nmc93c46_eeprom_def pem_eeprom; /* Power Entry Module EEPROM */
184
185 struct nmc93c46_group sys_eeprom_g1; /* EEPROMs for CPU and Midplane */
186 struct nmc93c46_group sys_eeprom_g2; /* EEPROM for PEM */
187 struct nmc93c46_group pa_eeprom_g1; /* EEPROMs for bays 0, 1, 3, 4 */
188 struct nmc93c46_group pa_eeprom_g2; /* EEPROMs for bays 2, 5, 6 */
189 };
190
191 /* Initialize EEPROM groups */
192 void c7200_init_eeprom_groups(c7200_t *router);
193
194 /* Find an EEPROM in the specified array */
195 struct c7200_eeprom *c7200_get_eeprom(struct c7200_eeprom *eeproms,char *name);
196
197 /* Get an EEPROM for a given NPE model */
198 struct c7200_eeprom *c7200_get_cpu_eeprom(char *npe_name);
199
200 /* Get an EEPROM for a given midplane model */
201 struct c7200_eeprom *c7200_get_midplane_eeprom(char *midplane_name);
202
203 /* Get a PEM EEPROM for a given NPE model */
204 struct c7200_eeprom *c7200_get_pem_eeprom(char *npe_name);
205
206 /* Create a new router instance */
207 c7200_t *c7200_create_instance(char *name,int instance_id);
208
209 /* Delete a router instance */
210 int c7200_delete_instance(char *name);
211
212 /* Delete all router instances */
213 int c7200_delete_all_instances(void);
214
215 /* Save configuration of a C7200 instance */
216 void c7200_save_config(c7200_t *router,FILE *fd);
217
218 /* Save configurations of all C7200 instances */
219 void c7200_save_config_all(FILE *fd);
220
221 /* Set PA EEPROM definition */
222 int c7200_pa_set_eeprom(c7200_t *router,u_int pa_bay,
223 const struct c7200_eeprom *eeprom);
224
225 /* Unset PA EEPROM definition (empty bay) */
226 int c7200_pa_unset_eeprom(c7200_t *router,u_int pa_bay);
227
228 /* Check if a bay has a port adapter */
229 int c7200_pa_check_eeprom(c7200_t *router,u_int pa_bay);
230
231 /* Get bay info */
232 struct c7200_pa_bay *c7200_pa_get_info(c7200_t *router,u_int pa_bay);
233
234 /* Get PA type */
235 char *c7200_pa_get_type(c7200_t *router,u_int pa_bay);
236
237 /* Get driver info about the specified slot */
238 void *c7200_pa_get_drvinfo(c7200_t *router,u_int pa_bay);
239
240 /* Set driver info for the specified slot */
241 int c7200_pa_set_drvinfo(c7200_t *router,u_int pa_bay,void *drv_info);
242
243 /* Add a PA binding */
244 int c7200_pa_add_binding(c7200_t *router,char *dev_type,u_int pa_bay);
245
246 /* Remove a PA binding */
247 int c7200_pa_remove_binding(c7200_t *router,u_int pa_bay);
248
249 /* Find a NIO binding */
250 struct c7200_nio_binding *
251 c7200_pa_find_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
252
253 /* Add a network IO binding */
254 int c7200_pa_add_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id,
255 char *nio_name);
256
257 /* Remove a NIO binding */
258 int c7200_pa_remove_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id);
259
260 /* Remove all NIO bindings for the specified PA */
261 int c7200_pa_remove_all_nio_bindings(c7200_t *router,u_int pa_bay);
262
263 /* Enable a Network IO descriptor for a Port Adapter */
264 int c7200_pa_enable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
265
266 /* Disable Network IO descriptor of a Port Adapter */
267 int c7200_pa_disable_nio(c7200_t *router,u_int pa_bay,u_int port_id);
268
269 /* Enable all NIO of the specified PA */
270 int c7200_pa_enable_all_nio(c7200_t *router,u_int pa_bay);
271
272 /* Disable all NIO of the specified PA */
273 int c7200_pa_disable_all_nio(c7200_t *router,u_int pa_bay);
274
275 /* Initialize a Port Adapter */
276 int c7200_pa_init(c7200_t *router,u_int pa_bay);
277
278 /* Shutdown a Port Adapter */
279 int c7200_pa_shutdown(c7200_t *router,u_int pa_bay);
280
281 /* Shutdown all PA of a router */
282 int c7200_pa_shutdown_all(c7200_t *router);
283
284 /* Create a Port Adapter (command line) */
285 int c7200_cmd_pa_create(c7200_t *router,char *str);
286
287 /* Add a Network IO descriptor binding (command line) */
288 int c7200_cmd_add_nio(c7200_t *router,char *str);
289
290 /* Show the list of available PA drivers */
291 void c7200_pa_show_drivers(void);
292
293 /* Get an NPE driver */
294 struct c7200_npe_driver *c7200_npe_get_driver(char *npe_type);
295
296 /* Set the NPE type */
297 int c7200_npe_set_type(c7200_t *router,char *npe_type);
298
299 /* Show the list of available NPE drivers */
300 void c7200_npe_show_drivers(void);
301
302 /* Set Midplane type */
303 int c7200_midplane_set_type(c7200_t *router,char *midplane_type);
304
305 /* Set chassis MAC address */
306 int c7200_midplane_set_mac_addr(c7200_t *router,char *mac_addr);
307
308 /* Show C7200 hardware info */
309 void c7200_show_hardware(c7200_t *router);
310
311 /* Initialize default parameters for a C7200 */
312 void c7200_init_defaults(c7200_t *router);
313
314 /* Initialize the C7200 Platform */
315 int c7200_init_platform(c7200_t *router);
316
317 /* Boot the IOS image */
318 int c7200_boot_ios(c7200_t *router);
319
320 /* Initialize a Cisco 7200 instance */
321 int c7200_init_instance(c7200_t *router);
322
323 /* Stop a Cisco 7200 instance */
324 int c7200_stop_instance(c7200_t *router);
325
326 /* Trigger an OIR event */
327 int c7200_trigger_oir_event(c7200_t *router,u_int slot_mask);
328
329 /* Initialize a new PA while the virtual router is online (OIR) */
330 int c7200_pa_init_online(c7200_t *router,u_int pa_bay);
331
332 /* Stop a PA while the virtual router is online (OIR) */
333 int c7200_pa_stop_online(c7200_t *router,u_int pa_bay);
334
335 /* dev_c7200_iofpga_init() */
336 int dev_c7200_iofpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
337
338 /* dev_mpfpga_init() */
339 int dev_c7200_mpfpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
340
341 /* PA drivers */
342 extern struct c7200_pa_driver dev_c7200_io_fe_driver;
343 extern struct c7200_pa_driver dev_c7200_pa_fe_tx_driver;
344 extern struct c7200_pa_driver dev_c7200_pa_4e_driver;
345 extern struct c7200_pa_driver dev_c7200_pa_8e_driver;
346 extern struct c7200_pa_driver dev_c7200_pa_4t_driver;
347 extern struct c7200_pa_driver dev_c7200_pa_8t_driver;
348 extern struct c7200_pa_driver dev_c7200_pa_a1_driver;
349 extern struct c7200_pa_driver dev_c7200_pa_pos_oc3_driver;
350 extern struct c7200_pa_driver dev_c7200_pa_4b_driver;
351
352 #endif

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