/[dynamips]/trunk/dev_clpd6729.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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upstream/dynamips-0.2.6-RC5/dev_clpd6729.c revision 6 by dpavlin, Sat Oct 6 16:09:07 2007 UTC upstream/dynamips-0.2.7-RC1/dev_clpd6729.c revision 7 by dpavlin, Sat Oct 6 16:23:47 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   * Cisco C7200 (Predator) simulation platform.   * Cisco router simulation platform.
3   * Copyright (c) 2005,2006 Christophe Fillot.  All rights reserved.   * Copyright (c) 2005,2006 Christophe Fillot.  All rights reserved.
4   *   *
5   * Cirrus Logic PD6729 PCI-to-PCMCIA host adapter.   * Cirrus Logic PD6729 PCI-to-PCMCIA host adapter.
# Line 13  Line 13 
13  #include <time.h>  #include <time.h>
14  #include <errno.h>  #include <errno.h>
15    
16  #include "mips64.h"  #include "cpu.h"
17    #include "vm.h"
18  #include "dynamips.h"  #include "dynamips.h"
19  #include "memory.h"  #include "memory.h"
20  #include "device.h"  #include "device.h"
# Line 50  struct clpd6729_data { Line 51  struct clpd6729_data {
51  };  };
52    
53  /* Handle access to a base register */  /* Handle access to a base register */
54  static void clpd6729_base_reg_access(cpu_mips_t *cpu,struct clpd6729_data *d,  static void clpd6729_base_reg_access(cpu_gen_t *cpu,struct clpd6729_data *d,
55                                       u_int op_type,m_uint64_t *data)                                       u_int op_type,m_uint64_t *data)
56  {  {
57     u_int slot_id,reg;     u_int slot_id,reg;
# Line 58  static void clpd6729_base_reg_access(cpu Line 59  static void clpd6729_base_reg_access(cpu
59  #if DEBUG_ACCESS  #if DEBUG_ACCESS
60     if (op_type == MTS_READ) {     if (op_type == MTS_READ) {
61        cpu_log(cpu,"CLPD6729","reading reg 0x%2.2x at pc=0x%llx\n",        cpu_log(cpu,"CLPD6729","reading reg 0x%2.2x at pc=0x%llx\n",
62                d->base_index,cpu->pc);                d->base_index,cpu_get_pc(cpu));
63     } else {     } else {
64        cpu_log(cpu,"CLPD6729","writing reg 0x%2.2x, data=0x%llx at pc=0x%llx\n",        cpu_log(cpu,"CLPD6729","writing reg 0x%2.2x, data=0x%llx at pc=0x%llx\n",
65                d->base_index,*data,cpu->pc);                d->base_index,*data,cpu_get_pc(cpu));
66     }     }
67  #endif  #endif
68    
# Line 107  static void clpd6729_base_reg_access(cpu Line 108  static void clpd6729_base_reg_access(cpu
108        case CLPD6729_REG_EXT_INDEX:        case CLPD6729_REG_EXT_INDEX:
109           if (op_type == MTS_WRITE) {           if (op_type == MTS_WRITE) {
110              cpu_log(cpu,"CLPD6729","ext reg index 0x%2.2llx at pc=0x%llx\n",              cpu_log(cpu,"CLPD6729","ext reg index 0x%2.2llx at pc=0x%llx\n",
111                      *data,cpu->pc);                      *data,cpu_get_pc(cpu));
112           }           }
113           break;           break;
114    
# Line 127  static void clpd6729_base_reg_access(cpu Line 128  static void clpd6729_base_reg_access(cpu
128  /*  /*
129   * dev_clpd6729_io_access()   * dev_clpd6729_io_access()
130   */   */
131  static void *dev_clpd6729_io_access(cpu_mips_t *cpu,struct vdevice *dev,  static void *dev_clpd6729_io_access(cpu_gen_t *cpu,struct vdevice *dev,
132                                      m_uint32_t offset,u_int op_size,                                      m_uint32_t offset,u_int op_size,
133                                      u_int op_type,m_uint64_t *data)                                      u_int op_type,m_uint64_t *data)
134  {  {
# Line 136  static void *dev_clpd6729_io_access(cpu_ Line 137  static void *dev_clpd6729_io_access(cpu_
137  #if DEBUG_ACCESS  #if DEBUG_ACCESS
138     if (op_type == MTS_READ) {     if (op_type == MTS_READ) {
139        cpu_log(cpu,dev->name,"reading at offset 0x%x, pc=0x%llx\n",        cpu_log(cpu,dev->name,"reading at offset 0x%x, pc=0x%llx\n",
140                offset,cpu->pc);                offset,cpu_get_pc(cpu));
141     } else {     } else {
142        cpu_log(cpu,dev->name,"writing at offset 0x%x, pc=0x%llx, data=0x%llx\n",        cpu_log(cpu,dev->name,"writing at offset 0x%x, pc=0x%llx, data=0x%llx\n",
143                offset,cpu->pc,*data);                offset,cpu_get_pc(cpu),*data);
144     }     }
145  #endif  #endif
146    
# Line 217  int dev_clpd6729_init(vm_instance_t *vm, Line 218  int dev_clpd6729_init(vm_instance_t *vm,
218    
219     vm_object_add(vm,&d->vm_obj);     vm_object_add(vm,&d->vm_obj);
220    
221    #if 1
222     /* PCMCIA disk test */     /* PCMCIA disk test */
223     if (vm->pcmcia_disk_size[0])     if (vm->pcmcia_disk_size[0])
224        d->slot_obj[0] = dev_pcmcia_disk_init(vm,"disk0",0x40000000ULL,0x4000000,        d->slot_obj[0] = dev_pcmcia_disk_init(vm,"disk0",0x40000000ULL,0x200000,
225                                              vm->pcmcia_disk_size[0],0);                                              vm->pcmcia_disk_size[0],0);
226    
227     if (vm->pcmcia_disk_size[1])     if (vm->pcmcia_disk_size[1])
228        d->slot_obj[1] = dev_pcmcia_disk_init(vm,"disk1",0x44000000ULL,0x4000000,        d->slot_obj[1] = dev_pcmcia_disk_init(vm,"disk1",0x44000000ULL,0x200000,
229                                              vm->pcmcia_disk_size[1],0);                                              vm->pcmcia_disk_size[1],0);
230    #endif
231    
232    #if 0
233       /* PCMCIA disk test */
234       if (vm->pcmcia_disk_size[0])
235          d->slot_obj[0] = dev_pcmcia_disk_init(vm,"disk0",0xd8000000ULL,0x200000,
236                                                vm->pcmcia_disk_size[0],0);
237    
238       if (vm->pcmcia_disk_size[1])
239          d->slot_obj[1] = dev_pcmcia_disk_init(vm,"disk1",0xdc000000ULL,0x200000,
240                                                vm->pcmcia_disk_size[1],0);
241    #endif
242    
243     return(0);     return(0);
244  }  }
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