/[dynamips]/trunk/dev_c6sup1.h
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Annotation of /trunk/dev_c6sup1.h

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Revision 12 - (hide annotations)
Sat Oct 6 16:45:40 2007 UTC (12 years ago) by dpavlin
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1 dpavlin 11 /*
2     * Cisco router simulation platform.
3     * Copyright (c) 2007 Christophe Fillot (cf@utc.fr)
4     *
5     * Generic Cisco C6k-SUP1 routines and definitions (EEPROM,...).
6     */
7    
8     #ifndef __DEV_C6SUP1_H__
9     #define __DEV_C6SUP1_H__
10    
11     #include <pthread.h>
12    
13     #include "utils.h"
14     #include "net.h"
15     #include "device.h"
16     #include "pci_dev.h"
17     #include "nmc93cX6.h"
18     #include "net_io.h"
19     #include "vm.h"
20    
21     /* Default MSFC1 parameters */
22     #define C6SUP1_DEFAULT_RAM_SIZE 128
23     #define C6SUP1_DEFAULT_ROM_SIZE 4
24     #define C6SUP1_DEFAULT_NVRAM_SIZE 512
25     #define C6SUP1_DEFAULT_CONF_REG 0x2102
26     #define C6SUP1_DEFAULT_CLOCK_DIV 4
27     #define C6SUP1_DEFAULT_RAM_MMAP 1
28    
29     /* EOBC + IBC */
30     #define C6SUP1_MAX_PA_BAYS 2
31    
32     /* Maximum slots on 6513 */
33     #define C6SUP1_MAX_SLOTS 13
34    
35     /* MSFC1 Timer IRQ (virtual) */
36     #define C6SUP1_VTIMER_IRQ 0
37    
38     /* MSFC1 DUART Interrupt */
39     #define C6SUP1_DUART_IRQ 5
40    
41     /* MSFC1 Network I/O Interrupt */
42     #define C6SUP1_NETIO_IRQ 2
43    
44     /* MSFC1 PA Management Interrupt handler */
45     #define C6SUP1_PA_MGMT_IRQ 3
46    
47     /* MSFC1 GT64k DMA/Timer Interrupt */
48     #define C6SUP1_GT64K_IRQ 4
49    
50     /* MSFC1 Error/OIR Interrupt */
51     #define C6SUP1_OIR_IRQ 6
52    
53     /* Network IRQ */
54     #define C6SUP1_NETIO_IRQ_BASE 32
55     #define C6SUP1_NETIO_IRQ_END \
56     (C6SUP1_NETIO_IRQ_BASE + C6SUP1_MAX_PA_BAYS - 1)
57    
58     /* MSFC1 base ram limit (256 Mb) */
59     #define C6SUP1_BASE_RAM_LIMIT 256
60    
61     /* MSFC1 common device addresses */
62     #define C6SUP1_GT64K_ADDR 0x14000000ULL
63     #define C6SUP1_GT64K_SEC_ADDR 0x15000000ULL
64     #define C6SUP1_BOOTFLASH_ADDR 0x1a000000ULL
65     #define C6SUP1_NVRAM_ADDR 0x1e000000ULL
66     #define C6SUP1_IOFPGA_ADDR 0x1e840000ULL
67     #define C6SUP1_MPFPGA_ADDR 0x1e880000ULL
68     #define C6SUP1_BITBUCKET_ADDR 0x1f000000ULL
69     #define C6SUP1_ROM_ADDR 0x1fc00000ULL
70     #define C6SUP1_IOMEM_ADDR 0x20000000ULL
71     #define C6SUP1_SRAM_ADDR 0x4b000000ULL
72     #define C6SUP1_BSWAP_ADDR 0xc0000000ULL
73     #define C6SUP1_PCI_IO_ADDR 0x100000000ULL
74    
75     /* SRAM size */
76     #define C6SUP1_SRAM_SIZE (4096*1024)
77    
78     /* Reserved space for ROM in NVRAM */
79     #define C6SUP1_NVRAM_ROM_RES_SIZE 2048
80    
81     /* MSFC1 physical address bus mask: keep only the lower 33 bits */
82     #define C6SUP1_ADDR_BUS_MASK 0x1ffffffffULL
83    
84     /* MSFC1 ELF Platform ID */
85     #define C6SUP1_ELF_MACHINE_ID 0x19
86    
87     #define VM_C6SUP1(vm) ((c6sup1_t *)vm->hw_data)
88    
89     /* MSFC1 router */
90     typedef struct c6sup1_router c6sup1_t;
91    
92     /* MSFC1 router */
93     struct c6sup1_router {
94     /* Chassis MAC address */
95     n_eth_addr_t mac_addr;
96    
97     /* Associated VM instance */
98     vm_instance_t *vm;
99    
100     /* Midplane FPGA */
101     struct c6sup1_mpfpga_data *mpfpga_data;
102    
103     /* Slots EEPROM data */
104     struct cisco_eeprom slot_eeprom[C6SUP1_MAX_SLOTS];
105    
106     /* Backplane, Supervisor and Slot EEPROM groups */
107     struct nmc93cX6_group bp_eeprom_group;
108     struct nmc93cX6_group sup_eeprom_group;
109     struct nmc93cX6_group slot_eeprom_group;
110    
111     /* Slot of this supervisor */
112     u_int sup_slot;
113     };
114    
115     /* Initialize EEPROM groups */
116     void c6sup1_init_eeprom_groups(c6sup1_t *router);
117    
118     /* Get network IRQ for specified slot/port */
119     u_int c6sup1_net_irq_for_slot_port(u_int slot,u_int port);
120    
121     /* Show the list of available PA drivers */
122     void c6sup1_pa_show_drivers(void);
123    
124     /* Set chassis MAC address */
125     int c6sup1_midplane_set_mac_addr(c6sup1_t *router,char *mac_addr);
126    
127     /* Show MSFC1 hardware info */
128     void c6sup1_show_hardware(c6sup1_t *router);
129    
130     /* dev_c6sup1_iofpga_init() */
131     int dev_c6sup1_iofpga_init(c6sup1_t *router,m_uint64_t paddr,m_uint32_t len);
132    
133     /* dev_mpfpga_init() */
134     int dev_c6sup1_mpfpga_init(c6sup1_t *router,m_uint64_t paddr,m_uint32_t len);
135    
136     /* Register the c6sup1 platform */
137     int c6sup1_platform_register(void);
138    
139     #endif

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